xref: /netbsd-src/sys/arch/amiga/dev/bzscvar.h (revision 78f74058b20de327d6506886607dd01e8a0f2853)
1*78f74058Ssnj /*	$NetBSD: bzscvar.h,v 1.6 2009/10/21 23:53:38 snj Exp $	*/
2974e9f6eSveego 
321d667c8Schopps /*
466e9e901Smhitch  * Copyright (c) 1997 Michael L. Hitch.
566e9e901Smhitch  * All rights reserved.
621d667c8Schopps  *
721d667c8Schopps  * Redistribution and use in source and binary forms, with or without
821d667c8Schopps  * modification, are permitted provided that the following conditions
921d667c8Schopps  * are met:
1021d667c8Schopps  * 1. Redistributions of source code must retain the above copyright
1121d667c8Schopps  *    notice, this list of conditions and the following disclaimer.
1221d667c8Schopps  * 2. Redistributions in binary form must reproduce the above copyright
1321d667c8Schopps  *    notice, this list of conditions and the following disclaimer in the
1421d667c8Schopps  *    documentation and/or other materials provided with the distribution.
1521d667c8Schopps  *
1621d667c8Schopps  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1721d667c8Schopps  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1821d667c8Schopps  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1921d667c8Schopps  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2021d667c8Schopps  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2121d667c8Schopps  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2221d667c8Schopps  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2321d667c8Schopps  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2421d667c8Schopps  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2521d667c8Schopps  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2621d667c8Schopps  */
2721d667c8Schopps 
2821d667c8Schopps struct bzsc_softc {
2966e9e901Smhitch 	struct ncr53c9x_softc	sc_ncr53c9x;	/* glue to MI code */
3021d667c8Schopps 
3166e9e901Smhitch 	struct isr	sc_isr;			/* Interrupt chain struct */
3266e9e901Smhitch 
3378a1d236Stsutsui 	volatile uint8_t *sc_reg;		/* the registers */
3478a1d236Stsutsui 	volatile uint8_t *sc_dmabase;
3566e9e901Smhitch 
3666e9e901Smhitch 	int		sc_active;		/* Pseudo-DMA state vars */
3766e9e901Smhitch 	int		sc_datain;
3866e9e901Smhitch 	int		sc_tc;
3966e9e901Smhitch 	size_t		sc_dmasize;
4066e9e901Smhitch 	size_t		sc_dmatrans;
4178a1d236Stsutsui 	uint8_t		**sc_dmaaddr;
4266e9e901Smhitch 	size_t		*sc_pdmalen;
43744246faSis 	paddr_t		sc_pa;
4466e9e901Smhitch 
4578a1d236Stsutsui 	uint8_t		sc_pad1[18];		/* XXX */
4678a1d236Stsutsui 	uint8_t		sc_alignbuf[256];
4778a1d236Stsutsui 	uint8_t		sc_pad2[16];
4878a1d236Stsutsui 	uint8_t		sc_hardbits;
4978a1d236Stsutsui 	uint8_t		sc_portbits;
5078a1d236Stsutsui 	uint8_t		sc_xfr_align;
5166e9e901Smhitch };
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