1 /* $NetBSD: mcontext.h,v 1.11 2008/10/26 00:08:15 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Klaus Klein. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _AMD64_MCONTEXT_H_ 33 #define _AMD64_MCONTEXT_H_ 34 35 #ifdef __x86_64__ 36 37 #include <machine/frame_regs.h> 38 39 /* 40 * General register state 41 */ 42 #define GREG_OFFSETS(reg, REG, idx) _REG_##REG = idx, 43 enum { _FRAME_GREG(GREG_OFFSETS) _NGREG = 26 }; 44 #undef GREG_OFFSETS 45 46 typedef unsigned long __greg_t; 47 typedef __greg_t __gregset_t[_NGREG]; 48 49 /* These names are for compatibility */ 50 #define _REG_URSP _REG_RSP 51 #define _REG_RFL _REG_RFLAGS 52 53 /* 54 * Floating point register state 55 */ 56 typedef char __fpregset_t[512]; 57 58 /* 59 * The padding below is to make __fpregs have a 16-byte aligned offset 60 * within ucontext_t. 61 */ 62 63 typedef struct { 64 __gregset_t __gregs; 65 long __pad; 66 __fpregset_t __fpregs; 67 } mcontext_t; 68 69 #define _UC_UCONTEXT_ALIGN (~0xf) 70 71 #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_RSP] - 128) 72 #define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_RIP]) 73 #define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_RAX]) 74 75 #define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) 76 77 /* 78 * mcontext extensions to handle signal delivery. 79 */ 80 #define _UC_SETSTACK 0x00010000 81 #define _UC_CLRSTACK 0x00020000 82 83 84 #ifdef _KERNEL 85 86 /* 87 * 32bit context definitions. 88 */ 89 90 #define _NGREG32 19 91 typedef unsigned int __greg32_t; 92 typedef __greg32_t __gregset32_t[_NGREG32]; 93 94 #define _REG32_GS 0 95 #define _REG32_FS 1 96 #define _REG32_ES 2 97 #define _REG32_DS 3 98 #define _REG32_EDI 4 99 #define _REG32_ESI 5 100 #define _REG32_EBP 6 101 #define _REG32_ESP 7 102 #define _REG32_EBX 8 103 #define _REG32_EDX 9 104 #define _REG32_ECX 10 105 #define _REG32_EAX 11 106 #define _REG32_TRAPNO 12 107 #define _REG32_ERR 13 108 #define _REG32_EIP 14 109 #define _REG32_CS 15 110 #define _REG32_EFL 16 111 #define _REG32_UESP 17 112 #define _REG32_SS 18 113 114 #define _UC_MACHINE32_SP(uc) ((uc)->uc_mcontext.__gregs[_REG32_UESP]) 115 116 /* 117 * Floating point register state 118 */ 119 typedef struct fxsave64 __fpregset32_t; 120 121 typedef struct { 122 __gregset32_t __gregs; 123 __fpregset32_t __fpregs; 124 } mcontext32_t; 125 126 #define _UC_MACHINE_PAD32 5 127 128 struct trapframe; 129 struct lwp; 130 int check_mcontext(struct lwp *, const mcontext_t *, struct trapframe *); 131 132 #endif /* _KERNEL */ 133 134 #else /* __x86_64__ */ 135 136 #include <i386/mcontext.h> 137 138 #endif /* __x86_64__ */ 139 140 #endif /* !_AMD64_MCONTEXT_H_ */ 141