1 /* $NetBSD: mcontext.h,v 1.20 2019/12/27 00:32:16 kamil Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Klaus Klein. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _AMD64_MCONTEXT_H_ 33 #define _AMD64_MCONTEXT_H_ 34 35 #ifdef __x86_64__ 36 37 #include <machine/frame_regs.h> 38 39 /* 40 * General register state 41 */ 42 #define GREG_OFFSETS(reg, REG, idx) _REG_##REG = idx, 43 enum { _FRAME_GREG(GREG_OFFSETS) _NGREG = 26 }; 44 #undef GREG_OFFSETS 45 46 typedef unsigned long __greg_t; 47 typedef __greg_t __gregset_t[_NGREG]; 48 49 /* These names are for compatibility */ 50 #define _REG_URSP _REG_RSP 51 #define _REG_RFL _REG_RFLAGS 52 53 /* 54 * Floating point register state 55 * The format of __fpregset_t is that of the fxsave instruction 56 * which requires 16 byte alignment. However the mcontext version 57 * is never directly accessed. 58 */ 59 typedef char __fpregset_t[512] __aligned(8); 60 61 typedef struct { 62 __gregset_t __gregs; 63 __greg_t _mc_tlsbase; 64 __fpregset_t __fpregs; 65 } mcontext_t; 66 67 #define _UC_UCONTEXT_ALIGN (~0xf) 68 69 /* AMD64 ABI 128-bytes "red zone". */ 70 #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_RSP] - 128) 71 #define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_RBP]) 72 #define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_RIP]) 73 #define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_RAX]) 74 75 #define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) 76 77 #define _UC_TLSBASE 0x00080000 78 79 /* 80 * mcontext extensions to handle signal delivery. 81 */ 82 #define _UC_SETSTACK 0x00010000 83 #define _UC_CLRSTACK 0x00020000 84 85 #define __UCONTEXT_SIZE 784 86 87 #if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || \ 88 defined(__LIBPTHREAD_SOURCE__) 89 #include <sys/tls.h> 90 91 __BEGIN_DECLS 92 static __inline void * 93 __lwp_getprivate_fast(void) 94 { 95 void *__tmp; 96 97 __asm volatile("movq %%fs:0, %0" : "=r" (__tmp)); 98 99 return __tmp; 100 } 101 __END_DECLS 102 103 #endif 104 105 #ifdef _KERNEL 106 107 /* 108 * 32bit context definitions. 109 */ 110 111 #define _NGREG32 19 112 typedef unsigned int __greg32_t; 113 typedef __greg32_t __gregset32_t[_NGREG32]; 114 115 #define _REG32_GS 0 116 #define _REG32_FS 1 117 #define _REG32_ES 2 118 #define _REG32_DS 3 119 #define _REG32_EDI 4 120 #define _REG32_ESI 5 121 #define _REG32_EBP 6 122 #define _REG32_ESP 7 123 #define _REG32_EBX 8 124 #define _REG32_EDX 9 125 #define _REG32_ECX 10 126 #define _REG32_EAX 11 127 #define _REG32_TRAPNO 12 128 #define _REG32_ERR 13 129 #define _REG32_EIP 14 130 #define _REG32_CS 15 131 #define _REG32_EFL 16 132 #define _REG32_UESP 17 133 #define _REG32_SS 18 134 135 #define _UC_MACHINE32_SP(uc) ((uc)->uc_mcontext.__gregs[_REG32_UESP]) 136 137 /* 138 * Floating point register state 139 */ 140 typedef struct { 141 union { 142 struct { 143 int __fp_state[27]; /* Environment and registers */ 144 } __fpchip_state; 145 struct { 146 char __fp_xmm[512]; 147 } __fp_xmm_state; 148 } __fp_reg_set; 149 int __fp_pad[33]; /* Historic padding */ 150 } __fpregset32_t; 151 152 typedef struct { 153 __gregset32_t __gregs; 154 __fpregset32_t __fpregs; 155 uint32_t _mc_tlsbase; 156 } mcontext32_t; 157 158 #define _UC_FXSAVE 0x20 /* FP state is in FXSAVE format in XMM space */ 159 160 #define _UC_MACHINE32_PAD 4 161 #define __UCONTEXT32_SIZE 776 162 163 #endif /* _KERNEL */ 164 165 #else /* __x86_64__ */ 166 167 #include <i386/mcontext.h> 168 169 #endif /* __x86_64__ */ 170 171 #endif /* !_AMD64_MCONTEXT_H_ */ 172