xref: /netbsd-src/sys/arch/amd64/include/frameasm.h (revision 87d689fb734c654d2486f87f7be32f1b53ecdbec)
1 /*	$NetBSD: frameasm.h,v 1.28 2018/01/11 09:00:04 maxv Exp $	*/
2 
3 #ifndef _AMD64_MACHINE_FRAMEASM_H
4 #define _AMD64_MACHINE_FRAMEASM_H
5 
6 #ifdef _KERNEL_OPT
7 #include "opt_xen.h"
8 #include "opt_svs.h"
9 #endif
10 
11 /*
12  * Macros to define pushing/popping frames for interrupts, traps
13  * and system calls. Currently all the same; will diverge later.
14  */
15 
16 #ifdef XEN
17 #define HYPERVISOR_iret hypercall_page + (__HYPERVISOR_iret * 32)
18 /* Xen do not need swapgs, done by hypervisor */
19 #define swapgs
20 #define iretq	pushq $0 ; jmp HYPERVISOR_iret
21 #define	XEN_ONLY2(x,y)	x,y
22 #define	NOT_XEN(x)
23 
24 #define CLI(temp_reg) \
25  	movq CPUVAR(VCPU),%r ## temp_reg ;			\
26 	movb $1,EVTCHN_UPCALL_MASK(%r ## temp_reg);
27 
28 #define STI(temp_reg) \
29  	movq CPUVAR(VCPU),%r ## temp_reg ;			\
30 	movb $0,EVTCHN_UPCALL_MASK(%r ## temp_reg);
31 
32 #else /* XEN */
33 #define	XEN_ONLY2(x,y)
34 #define	NOT_XEN(x)	x
35 #define CLI(temp_reg) cli
36 #define STI(temp_reg) sti
37 #endif	/* XEN */
38 
39 #define HP_NAME_CLAC		1
40 #define HP_NAME_STAC		2
41 #define HP_NAME_NOLOCK		3
42 #define HP_NAME_RETFENCE	4
43 
44 #define HOTPATCH(name, size) \
45 123:						; \
46 	.section	.rodata.hotpatch, "a"	; \
47 	.byte		name			; \
48 	.byte		size			; \
49 	.quad		123b			; \
50 	.previous
51 
52 #define SMAP_ENABLE \
53 	HOTPATCH(HP_NAME_CLAC, 3)		; \
54 	.byte 0x0F, 0x1F, 0x00			; \
55 
56 #define SMAP_DISABLE \
57 	HOTPATCH(HP_NAME_STAC, 3)		; \
58 	.byte 0x0F, 0x1F, 0x00			; \
59 
60 #define	SWAPGS	NOT_XEN(swapgs)
61 
62 /*
63  * These are used on interrupt or trap entry or exit.
64  */
65 #define INTR_SAVE_GPRS \
66 	movq	%rdi,TF_RDI(%rsp)	; \
67 	movq	%rsi,TF_RSI(%rsp)	; \
68 	movq	%rdx,TF_RDX(%rsp)	; \
69 	movq	%rcx,TF_RCX(%rsp)	; \
70 	movq	%r8,TF_R8(%rsp)		; \
71 	movq	%r9,TF_R9(%rsp)		; \
72 	movq	%r10,TF_R10(%rsp)	; \
73 	movq	%r11,TF_R11(%rsp)	; \
74 	movq	%r12,TF_R12(%rsp)	; \
75 	movq	%r13,TF_R13(%rsp)	; \
76 	movq	%r14,TF_R14(%rsp)	; \
77 	movq	%r15,TF_R15(%rsp)	; \
78 	movq	%rbp,TF_RBP(%rsp)	; \
79 	movq	%rbx,TF_RBX(%rsp)	; \
80 	movq	%rax,TF_RAX(%rsp)
81 
82 #define	INTR_RESTORE_GPRS \
83 	movq	TF_RDI(%rsp),%rdi	; \
84 	movq	TF_RSI(%rsp),%rsi	; \
85 	movq	TF_RDX(%rsp),%rdx	; \
86 	movq	TF_RCX(%rsp),%rcx	; \
87 	movq	TF_R8(%rsp),%r8		; \
88 	movq	TF_R9(%rsp),%r9		; \
89 	movq	TF_R10(%rsp),%r10	; \
90 	movq	TF_R11(%rsp),%r11	; \
91 	movq	TF_R12(%rsp),%r12	; \
92 	movq	TF_R13(%rsp),%r13	; \
93 	movq	TF_R14(%rsp),%r14	; \
94 	movq	TF_R15(%rsp),%r15	; \
95 	movq	TF_RBP(%rsp),%rbp	; \
96 	movq	TF_RBX(%rsp),%rbx	; \
97 	movq	TF_RAX(%rsp),%rax
98 
99 #ifdef SVS
100 #define SVS_ENTER \
101 	pushq	%rax			; \
102 	movq	CPUVAR(KPDIRPA),%rax	; \
103 	movq	%rax,%cr3		; \
104 	popq	%rax
105 #define SVS_LEAVE \
106 	pushq	%rax			; \
107 	movq	CPUVAR(UPDIRPA),%rax	; \
108 	movq	%rax,%cr3		; \
109 	popq	%rax
110 #define SVS_ENTER_NOSTACK \
111 	movq	%rax,CPUVAR(SCRATCH)	; \
112 	movq	CPUVAR(KPDIRPA),%rax	; \
113 	movq	%rax,%cr3		; \
114 	movq	CPUVAR(SCRATCH),%rax
115 #define SVS_LEAVE_NOSTACK \
116 	movq	%rax,CPUVAR(SCRATCH)	; \
117 	movq	CPUVAR(UPDIRPA),%rax	; \
118 	movq	%rax,%cr3		; \
119 	movq	CPUVAR(SCRATCH),%rax
120 #else
121 #define SVS_ENTER	/* nothing */
122 #define SVS_LEAVE	/* nothing */
123 #define SVS_ENTER_NOSTACK	/* nothing */
124 #define SVS_LEAVE_NOSTACK	/* nothing */
125 #endif
126 
127 #define	INTRENTRY_L(kernel_trap, usertrap) \
128 	subq	$TF_REGSIZE,%rsp	; \
129 	INTR_SAVE_GPRS			; \
130 	cld				; \
131 	SMAP_ENABLE			; \
132 	testb	$SEL_UPL,TF_CS(%rsp)	; \
133 	je	kernel_trap		; \
134 usertrap				; \
135 	SWAPGS				; \
136 	SVS_ENTER			; \
137 	movw	%gs,TF_GS(%rsp)		; \
138 	movw	%fs,TF_FS(%rsp)		; \
139 	movw	%es,TF_ES(%rsp)		; \
140 	movw	%ds,TF_DS(%rsp)
141 
142 #define	INTRENTRY \
143 	INTRENTRY_L(98f,)		; \
144 98:
145 
146 #define INTRFASTEXIT \
147 	jmp	intrfastexit
148 
149 #define INTR_RECURSE_HWFRAME \
150 	movq	%rsp,%r10		; \
151 	movl	%ss,%r11d		; \
152 	pushq	%r11			; \
153 	pushq	%r10			; \
154 	pushfq				; \
155 	movl	%cs,%r11d		; \
156 	pushq	%r11			; \
157 /* XEN: We must fixup CS, as even kernel mode runs at CPL 3 */ \
158  	XEN_ONLY2(andb	$0xfc,(%rsp);)	  \
159 	pushq	%r13			;
160 
161 #define	DO_DEFERRED_SWITCH \
162 	cmpl	$0, CPUVAR(WANT_PMAPLOAD)		; \
163 	jz	1f					; \
164 	call	_C_LABEL(do_pmap_load)			; \
165 1:
166 
167 #define	CHECK_DEFERRED_SWITCH \
168 	cmpl	$0, CPUVAR(WANT_PMAPLOAD)
169 
170 #define CHECK_ASTPENDING(reg)	cmpl	$0, L_MD_ASTPENDING(reg)
171 #define CLEAR_ASTPENDING(reg)	movl	$0, L_MD_ASTPENDING(reg)
172 
173 #endif /* _AMD64_MACHINE_FRAMEASM_H */
174