xref: /netbsd-src/sys/arch/amd64/include/fenv.h (revision cf7d1cf56d8552021e37bfbd7e47621aa1fdee7c)
1*cf7d1cf5Sdsl /*	$NetBSD: fenv.h,v 1.3 2014/02/12 23:04:43 dsl Exp $	*/
27f1183f2Sjoerg /*-
37f1183f2Sjoerg  * Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
47f1183f2Sjoerg  * All rights reserved.
57f1183f2Sjoerg  *
67f1183f2Sjoerg  * Redistribution and use in source and binary forms, with or without
77f1183f2Sjoerg  * modification, are permitted provided that the following conditions
87f1183f2Sjoerg  * are met:
97f1183f2Sjoerg  * 1. Redistributions of source code must retain the above copyright
107f1183f2Sjoerg  *    notice, this list of conditions and the following disclaimer.
117f1183f2Sjoerg  * 2. Redistributions in binary form must reproduce the above copyright
127f1183f2Sjoerg  *    notice, this list of conditions and the following disclaimer in the
137f1183f2Sjoerg  *    documentation and/or other materials provided with the distribution.
147f1183f2Sjoerg  *
157f1183f2Sjoerg  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
167f1183f2Sjoerg  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
177f1183f2Sjoerg  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
187f1183f2Sjoerg  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
197f1183f2Sjoerg  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
207f1183f2Sjoerg  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
217f1183f2Sjoerg  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
227f1183f2Sjoerg  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
237f1183f2Sjoerg  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
247f1183f2Sjoerg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
257f1183f2Sjoerg  * SUCH DAMAGE.
267f1183f2Sjoerg  */
277f1183f2Sjoerg 
287f1183f2Sjoerg #ifndef _AMD64_FENV_H_
297f1183f2Sjoerg #define _AMD64_FENV_H_
307f1183f2Sjoerg 
31*cf7d1cf5Sdsl #ifndef _KERNEL
327f1183f2Sjoerg #include <sys/stdint.h>
33*cf7d1cf5Sdsl #endif
347f1183f2Sjoerg 
35*cf7d1cf5Sdsl /* Default x87 control word. */
36*cf7d1cf5Sdsl #define __INITIAL_NPXCW__       0x037f
37*cf7d1cf5Sdsl /* Modern NetBSD uses the default control word.. */
38*cf7d1cf5Sdsl #define __NetBSD_NPXCW__        __INITIAL_NPXCW__
39*cf7d1cf5Sdsl /* NetBSD before 6.99.26 forced IEEE double precision. */
40*cf7d1cf5Sdsl #define __NetBSD_COMPAT_NPXCW__ 0x127f
41*cf7d1cf5Sdsl 
42*cf7d1cf5Sdsl /* Default values for the mxcsr. All traps masked. */
43*cf7d1cf5Sdsl #define __INITIAL_MXCSR__       0x1f80
44*cf7d1cf5Sdsl 
45*cf7d1cf5Sdsl #ifndef _KERNEL
467f1183f2Sjoerg /*
477f1183f2Sjoerg  * Each symbol representing a floating point exception expands to an integer
487f1183f2Sjoerg  * constant expression with values, such that bitwise-inclusive ORs of _all
497f1183f2Sjoerg  * combinations_ of the constants result in distinct values.
507f1183f2Sjoerg  *
517f1183f2Sjoerg  * We use such values that allow direct bitwise operations on FPU/SSE registers.
527f1183f2Sjoerg  */
537f1183f2Sjoerg #define	FE_INVALID	0x01	/* 000000000001 */
547f1183f2Sjoerg #define	FE_DENORMAL	0x02	/* 000000000010 */
557f1183f2Sjoerg #define	FE_DIVBYZERO	0x04	/* 000000000100 */
567f1183f2Sjoerg #define	FE_OVERFLOW	0x08	/* 000000001000 */
577f1183f2Sjoerg #define	FE_UNDERFLOW	0x10	/* 000000010000 */
587f1183f2Sjoerg #define	FE_INEXACT	0x20	/* 000000100000 */
597f1183f2Sjoerg 
607f1183f2Sjoerg /*
617f1183f2Sjoerg  * The following symbol is simply the bitwise-inclusive OR of all floating-point
627f1183f2Sjoerg  * exception constants defined above
637f1183f2Sjoerg  */
647f1183f2Sjoerg #define FE_ALL_EXCEPT   \
657f1183f2Sjoerg   (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
667f1183f2Sjoerg 
677f1183f2Sjoerg /*
687f1183f2Sjoerg  * Each symbol representing the rounding direction, expands to an integer
697f1183f2Sjoerg  * constant expression whose value is distinct non-negative value.
707f1183f2Sjoerg  *
717f1183f2Sjoerg  * We use such values that allow direct bitwise operations on FPU/SSE registers.
727f1183f2Sjoerg  */
737f1183f2Sjoerg #define	FE_TONEAREST	0x000	/* 000000000000 */
747f1183f2Sjoerg #define	FE_DOWNWARD	0x400	/* 010000000000 */
757f1183f2Sjoerg #define	FE_UPWARD	0x800	/* 100000000000 */
767f1183f2Sjoerg #define	FE_TOWARDZERO	0xC00	/* 110000000000 */
777f1183f2Sjoerg 
787f1183f2Sjoerg /*
797f1183f2Sjoerg  * As compared to the x87 control word, the SSE unit's control word
807f1183f2Sjoerg  * has the rounding control bits offset by 3 and the exception mask
817f1183f2Sjoerg  * bits offset by 7.
827f1183f2Sjoerg  */
837f1183f2Sjoerg #define	_X87_ROUNDING_MASK	0xC00		/* 110000000000 */
847f1183f2Sjoerg #define	_SSE_ROUNDING_MASK	(0xC00 << 3)
857f1183f2Sjoerg #define	_SSE_ROUND_SHIFT	3
867f1183f2Sjoerg #define	_SSE_EMASK_SHIFT	7
877f1183f2Sjoerg 
887f1183f2Sjoerg /*
897f1183f2Sjoerg  * fenv_t represents the entire floating-point environment
907f1183f2Sjoerg  */
917f1183f2Sjoerg typedef struct {
927f1183f2Sjoerg 	struct {
937f1183f2Sjoerg 		uint32_t control;	/* Control word register */
947f1183f2Sjoerg 		uint32_t status;	/* Status word register */
957f1183f2Sjoerg 		uint32_t tag;		/* Tag word register */
967f1183f2Sjoerg 		uint32_t others[4];	/* EIP, Pointer Selector, etc */
977f1183f2Sjoerg 	} x87;
987f1183f2Sjoerg 
997f1183f2Sjoerg 	uint32_t mxcsr;			/* Control and status register */
1007f1183f2Sjoerg } fenv_t;
1017f1183f2Sjoerg 
1027f1183f2Sjoerg extern fenv_t		__fe_dfl_env;
1037f1183f2Sjoerg #define FE_DFL_ENV      ((const fenv_t *) &__fe_dfl_env)
1047f1183f2Sjoerg 
1057f1183f2Sjoerg /*
1067f1183f2Sjoerg  * fexcept_t represents the floating-point status flags collectively, including
1077f1183f2Sjoerg  * any status the implementation associates with the flags.
1087f1183f2Sjoerg  *
1097f1183f2Sjoerg  * A floating-point status flag is a system variable whose value is set (but
1107f1183f2Sjoerg  * never cleared) when a floating-point exception is raised, which occurs as a
1117f1183f2Sjoerg  * side effect of exceptional floating-point arithmetic to provide auxiliary
1127f1183f2Sjoerg  * information.
1137f1183f2Sjoerg  *
1147f1183f2Sjoerg  * A floating-point control mode is a system variable whose value may be set by
1157f1183f2Sjoerg  * the user to affect the subsequent behavior of floating-point arithmetic.
1167f1183f2Sjoerg  */
1177f1183f2Sjoerg typedef uint32_t fexcept_t;
118*cf7d1cf5Sdsl #endif
1197f1183f2Sjoerg 
1207f1183f2Sjoerg #endif /* ! _AMD64_FENV_H_ */
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