xref: /netbsd-src/sys/arch/amd64/include/cpu.h (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: cpu.h,v 1.35 2007/12/09 20:27:44 jmcneill Exp $	*/
2 
3 /*-
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
35  */
36 
37 #ifndef _AMD64_CPU_H_
38 #define _AMD64_CPU_H_
39 
40 #if defined(_KERNEL)
41 #if defined(_KERNEL_OPT)
42 #include "opt_multiprocessor.h"
43 #include "opt_lockdebug.h"
44 #include "opt_xen.h"
45 #endif
46 
47 /*
48  * Definitions unique to x86-64 cpu support.
49  */
50 #include <machine/frame.h>
51 #include <machine/segments.h>
52 #include <machine/tss.h>
53 #include <machine/intrdefs.h>
54 #include <x86/cacheinfo.h>
55 
56 #include <sys/device.h>
57 #include <sys/simplelock.h>
58 #include <sys/cpu_data.h>
59 #include <sys/cc_microtime.h>
60 
61 struct pmap;
62 
63 struct cpu_info {
64 	struct device *ci_dev;
65 	struct cpu_info *ci_self;
66 
67 	/*
68 	 * Will be accessed by other CPUs.
69 	 */
70 	struct cpu_info *ci_next;
71 	struct lwp *ci_curlwp;
72 	struct pmap_cpu *ci_pmap_cpu;
73 	struct lwp *ci_fpcurlwp;
74 	int ci_fpsaving;
75 	u_int ci_cpuid;
76 	int ci_cpumask;			/* (1 << CPU ID) */
77 	u_int ci_apicid;
78 	struct cpu_data ci_data;	/* MI per-cpu data */
79 	struct cc_microtime_state ci_cc;/* cc_microtime state */
80 
81 	/*
82 	 * Private members.
83 	 */
84 	struct evcnt ci_tlb_evcnt;	/* tlb shootdown counter */
85 	struct pmap *ci_pmap;		/* current pmap */
86 	int ci_need_tlbwait;		/* need to wait for TLB invalidations */
87 	int ci_want_pmapload;		/* pmap_load() is needed */
88 	volatile int ci_tlbstate;	/* one of TLBSTATE_ states. see below */
89 #define	TLBSTATE_VALID	0	/* all user tlbs are valid */
90 #define	TLBSTATE_LAZY	1	/* tlbs are valid but won't be kept uptodate */
91 #define	TLBSTATE_STALE	2	/* we might have stale user tlbs */
92 	u_int64_t ci_scratch;
93 #ifdef XEN
94 	struct iplsource *ci_isources[NIPL];
95 #else
96 	struct intrsource *ci_isources[MAX_INTR_SOURCES];
97 #endif
98 	volatile int	ci_mtx_count;	/* Negative count of spin mutexes */
99 	volatile int	ci_mtx_oldspl;	/* Old SPL at this ci_idepth */
100 
101 	/* The following must be aligned for cmpxchg8b. */
102 	struct {
103 		uint32_t	ipending;
104 		int		ilevel;
105 	} ci_istate __aligned(8);
106 #define ci_ipending	ci_istate.ipending
107 #define	ci_ilevel	ci_istate.ilevel
108 
109 	int		ci_idepth;
110 	u_int32_t	ci_imask[NIPL];
111 	u_int32_t	ci_iunmask[NIPL];
112 
113 	paddr_t 	ci_idle_pcb_paddr;
114 	u_int		ci_flags;
115 	u_int32_t	ci_ipis;
116 
117 	int32_t		ci_cpuid_level;
118 	uint32_t	ci_signature;
119 	uint32_t	ci_feature_flags;
120 	uint32_t	ci_feature2_flags;
121 	uint32_t	ci_vendor[4];	 /* vendor string */
122 	u_int64_t	ci_tsc_freq;
123 	volatile uint32_t	ci_lapic_counter;
124 
125 	const struct cpu_functions *ci_func;
126 	void (*cpu_setup)(struct cpu_info *);
127 	void (*ci_info)(struct cpu_info *);
128 
129 	int		ci_want_resched;
130 	struct trapframe *ci_ddb_regs;
131 
132 	struct x86_cache_info ci_cinfo[CAI_COUNT];
133 
134 	char		*ci_gdt;
135 
136 	struct x86_64_tss	ci_doubleflt_tss;
137 	struct x86_64_tss	ci_ddbipi_tss;
138 
139 	char *ci_doubleflt_stack;
140 	char *ci_ddbipi_stack;
141 
142 	struct evcnt ci_ipi_events[X86_NIPI];
143 };
144 
145 #define CPUF_BSP	0x0001		/* CPU is the original BSP */
146 #define CPUF_AP		0x0002		/* CPU is an AP */
147 #define CPUF_SP		0x0004		/* CPU is only processor */
148 #define CPUF_PRIMARY	0x0008		/* CPU is active primary processor */
149 
150 #define CPUF_PRESENT	0x1000		/* CPU is present */
151 #define CPUF_RUNNING	0x2000		/* CPU is running */
152 #define CPUF_PAUSE	0x4000		/* CPU is paused in DDB */
153 #define CPUF_GO		0x8000		/* CPU should start running */
154 
155 
156 extern struct cpu_info cpu_info_primary;
157 extern struct cpu_info *cpu_info_list;
158 
159 #define CPU_INFO_ITERATOR		int
160 #define CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpu_info_list; \
161 					ci != NULL; ci = ci->ci_next
162 
163 #define X86_MAXPROCS		32	/* bitmask; can be bumped to 64 */
164 
165 #define CPU_STARTUP(_ci)	((_ci)->ci_func->start(_ci))
166 #define CPU_STOP(_ci)		((_ci)->ci_func->stop(_ci))
167 #define CPU_START_CLEANUP(_ci)	((_ci)->ci_func->cleanup(_ci))
168 
169 #if defined(__GNUC__) && defined(_KERNEL)
170 static struct cpu_info *x86_curcpu(void);
171 static lwp_t *x86_curlwp(void);
172 
173 __inline static struct cpu_info * __attribute__((__unused__))
174 x86_curcpu(void)
175 {
176 	struct cpu_info *ci;
177 
178 	__asm volatile("movq %%gs:%1, %0" :
179 	    "=r" (ci) :
180 	    "m"
181 	    (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self)));
182 	return ci;
183 }
184 
185 __inline static lwp_t * __attribute__((__unused__))
186 x86_curlwp(void)
187 {
188 	lwp_t *l;
189 
190 	__asm volatile("movq %%gs:%1, %0" :
191 	    "=r" (l) :
192 	    "m"
193 	    (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp)));
194 	return l;
195 }
196 #else	/* __GNUC__ && _KERNEL */
197 /* For non-GCC and LKMs */
198 struct cpu_info	*x86_curcpu(void);
199 lwp_t	*x86_curlwp(void);
200 #endif	/* __GNUC__ && _KERNEL */
201 
202 #define cpu_number()	(curcpu()->ci_cpuid)
203 
204 #define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
205 
206 extern struct cpu_info *cpu_info[X86_MAXPROCS];
207 
208 void cpu_boot_secondary_processors(void);
209 void cpu_init_idle_lwps(void);
210 
211 #define aston(l)	((l)->l_md.md_astpending = 1)
212 
213 extern u_int32_t cpus_attached;
214 
215 #define curcpu()	x86_curcpu()
216 #define curlwp		x86_curlwp()
217 #define curpcb		(&curlwp->l_addr->u_pcb)
218 
219 /*
220  * Arguments to hardclock, softclock and statclock
221  * encapsulate the previous machine state in an opaque
222  * clockframe; for now, use generic intrframe.
223  */
224 struct clockframe {
225 	struct intrframe cf_if;
226 };
227 
228 #define	CLKF_USERMODE(frame)	USERMODE((frame)->cf_if.if_cs, (frame)->cf_if.if_rflags)
229 #define CLKF_PC(frame)		((frame)->cf_if.if_rip)
230 #define CLKF_INTR(frame)	(curcpu()->ci_idepth > 0)
231 
232 /*
233  * This is used during profiling to integrate system time.  It can safely
234  * assume that the process is resident.
235  */
236 #define LWP_PC(l)		((l)->l_md.md_regs->tf_rip)
237 
238 /*
239  * Give a profiling tick to the current process when the user profiling
240  * buffer pages are invalid.  On the i386, request an ast to send us
241  * through trap(), marking the proc as needing a profiling tick.
242  */
243 extern void cpu_need_proftick(struct lwp *);
244 
245 /*
246  * Notify an LWP that it has a signal pending, process as soon as possible.
247  */
248 extern void cpu_signotify(struct lwp *);
249 
250 /*
251  * We need a machine-independent name for this.
252  */
253 extern void (*delay_func)(unsigned int);
254 
255 #define DELAY(x)		(*delay_func)(x)
256 #define delay(x)		(*delay_func)(x)
257 
258 
259 /*
260  * pull in #defines for kinds of processors
261  */
262 
263 extern int biosbasemem;
264 extern int biosextmem;
265 extern int cpu;
266 extern int cpu_feature;
267 extern int cpu_feature2;
268 extern int cpu_id;
269 extern int cpuid_level;
270 extern char cpu_vendorname[];
271 
272 /* identcpu.c */
273 
274 void	identifycpu(struct cpu_info *);
275 void cpu_probe_features(struct cpu_info *);
276 
277 /* machdep.c */
278 void	dumpconf(void);
279 int	cpu_maxproc(void);
280 void	cpu_reset(void);
281 void	x86_64_proc0_tss_ldt_init(void);
282 void	x86_64_init_pcb_tss_ldt(struct cpu_info *);
283 void	cpu_proc_fork(struct proc *, struct proc *);
284 
285 struct region_descriptor;
286 void	lgdt(struct region_descriptor *);
287 #ifdef XEN
288 void	lgdt_finish(void);
289 #endif
290 void	fillw(short, void *, size_t);
291 
292 struct pcb;
293 void	savectx(struct pcb *);
294 void	lwp_trampoline(void);
295 void	child_trampoline(void);
296 
297 #ifdef XEN
298 void	startrtclock(void);
299 void	xen_delay(unsigned int);
300 void	xen_initclocks(void);
301 #else
302 /* clock.c */
303 void	initrtclock(u_long);
304 void	startrtclock(void);
305 void	i8254_delay(unsigned int);
306 void	i8254_microtime(struct timeval *);
307 void	i8254_initclocks(void);
308 #endif
309 
310 void cpu_init_msrs(struct cpu_info *, bool);
311 
312 
313 /* vm_machdep.c */
314 int kvtop(void *);
315 
316 /* trap.c */
317 void	child_return(void *);
318 
319 /* consinit.c */
320 void kgdb_port_init(void);
321 
322 /* bus_machdep.c */
323 void x86_bus_space_init(void);
324 void x86_bus_space_mallocok(void);
325 
326 #endif /* _KERNEL */
327 
328 #include <machine/psl.h>
329 
330 /*
331  * CTL_MACHDEP definitions.
332  */
333 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
334 #define	CPU_BIOSBASEMEM		2	/* int: bios-reported base mem (K) */
335 #define	CPU_BIOSEXTMEM		3	/* int: bios-reported ext. mem (K) */
336 #define	CPU_NKPDE		4	/* int: number of kernel PDEs */
337 #define	CPU_BOOTED_KERNEL	5	/* string: booted kernel name */
338 #define CPU_DISKINFO		6	/* disk geometry information */
339 #define CPU_FPU_PRESENT		7	/* FPU is present */
340 #define	CPU_MAXID		8	/* number of valid machdep ids */
341 
342 #define	CTL_MACHDEP_NAMES { \
343 	{ 0, 0 }, \
344 	{ "console_device", CTLTYPE_STRUCT }, \
345 	{ "biosbasemem", CTLTYPE_INT }, \
346 	{ "biosextmem", CTLTYPE_INT }, \
347 	{ "nkpde", CTLTYPE_INT }, \
348 	{ "booted_kernel", CTLTYPE_STRING }, \
349 	{ "diskinfo", CTLTYPE_STRUCT }, \
350 	{ "fpu_present", CTLTYPE_INT }, \
351 }
352 
353 
354 /*
355  * Structure for CPU_DISKINFO sysctl call.
356  * XXX this should be somewhere else.
357  */
358 #define MAX_BIOSDISKS	16
359 
360 struct disklist {
361 	int dl_nbiosdisks;			   /* number of bios disks */
362 	struct biosdisk_info {
363 		int bi_dev;			   /* BIOS device # (0x80 ..) */
364 		int bi_cyl;			   /* cylinders on disk */
365 		int bi_head;			   /* heads per track */
366 		int bi_sec;			   /* sectors per track */
367 		u_int64_t bi_lbasecs;		   /* total sec. (iff ext13) */
368 #define BIFLAG_INVALID		0x01
369 #define BIFLAG_EXTINT13		0x02
370 		int bi_flags;
371 	} dl_biosdisks[MAX_BIOSDISKS];
372 
373 	int dl_nnativedisks;			   /* number of native disks */
374 	struct nativedisk_info {
375 		char ni_devname[16];		   /* native device name */
376 		int ni_nmatches; 		   /* # of matches w/ BIOS */
377 		int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
378 	} dl_nativedisks[1];			   /* actually longer */
379 };
380 
381 #endif /* !_AMD64_CPU_H_ */
382