xref: /netbsd-src/sys/arch/amd64/include/cpu.h (revision 7fa608457b817eca6e0977b37f758ae064f3c99c)
1 /*	$NetBSD: cpu.h,v 1.31 2007/10/29 01:35:37 ad Exp $	*/
2 
3 /*-
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
35  */
36 
37 #ifndef _AMD64_CPU_H_
38 #define _AMD64_CPU_H_
39 
40 #if defined(_KERNEL)
41 #if defined(_KERNEL_OPT)
42 #include "opt_multiprocessor.h"
43 #include "opt_lockdebug.h"
44 #endif
45 
46 /*
47  * Definitions unique to x86-64 cpu support.
48  */
49 #include <machine/frame.h>
50 #include <machine/segments.h>
51 #include <machine/tss.h>
52 #include <machine/intrdefs.h>
53 #include <x86/cacheinfo.h>
54 
55 #include <sys/device.h>
56 #include <sys/simplelock.h>
57 #include <sys/cpu_data.h>
58 #include <sys/cc_microtime.h>
59 
60 struct pmap;
61 
62 struct cpu_info {
63 	struct device *ci_dev;
64 	struct cpu_info *ci_self;
65 
66 	/*
67 	 * Will be accessed by other CPUs.
68 	 */
69 	struct cpu_info *ci_next;
70 	struct lwp *ci_curlwp;
71 	struct pmap_cpu *ci_pmap_cpu;
72 	struct lwp *ci_fpcurlwp;
73 	int ci_fpsaving;
74 	u_int ci_cpuid;
75 	int ci_cpumask;			/* (1 << CPU ID) */
76 	u_int ci_apicid;
77 	struct cpu_data ci_data;	/* MI per-cpu data */
78 	struct cc_microtime_state ci_cc;/* cc_microtime state */
79 
80 	/*
81 	 * Private members.
82 	 */
83 	struct evcnt ci_tlb_evcnt;	/* tlb shootdown counter */
84 	struct pmap *ci_pmap;		/* current pmap */
85 	int ci_need_tlbwait;		/* need to wait for TLB invalidations */
86 	int ci_want_pmapload;		/* pmap_load() is needed */
87 	volatile int ci_tlbstate;	/* one of TLBSTATE_ states. see below */
88 #define	TLBSTATE_VALID	0	/* all user tlbs are valid */
89 #define	TLBSTATE_LAZY	1	/* tlbs are valid but won't be kept uptodate */
90 #define	TLBSTATE_STALE	2	/* we might have stale user tlbs */
91 	u_int64_t ci_scratch;
92 	struct intrsource *ci_isources[MAX_INTR_SOURCES];
93 	volatile int	ci_mtx_count;	/* Negative count of spin mutexes */
94 	volatile int	ci_mtx_oldspl;	/* Old SPL at this ci_idepth */
95 
96 	/* The following must be aligned for cmpxchg8b. */
97 	struct {
98 		uint32_t	ipending;
99 		int		ilevel;
100 	} ci_istate __aligned(8);
101 #define ci_ipending	ci_istate.ipending
102 #define	ci_ilevel	ci_istate.ilevel
103 
104 	int		ci_idepth;
105 	u_int32_t	ci_imask[NIPL];
106 	u_int32_t	ci_iunmask[NIPL];
107 
108 	paddr_t 	ci_idle_pcb_paddr;
109 	u_int		ci_flags;
110 	u_int32_t	ci_ipis;
111 
112 	int32_t		ci_cpuid_level;
113 	uint32_t	ci_signature;
114 	uint32_t	ci_feature_flags;
115 	uint32_t	ci_feature2_flags;
116 	uint32_t	ci_vendor[4];	 /* vendor string */
117 	u_int64_t	ci_tsc_freq;
118 
119 	const struct cpu_functions *ci_func;
120 	void (*cpu_setup)(struct cpu_info *);
121 	void (*ci_info)(struct cpu_info *);
122 
123 	int		ci_want_resched;
124 	struct trapframe *ci_ddb_regs;
125 
126 	struct x86_cache_info ci_cinfo[CAI_COUNT];
127 
128 	char		*ci_gdt;
129 
130 	struct x86_64_tss	ci_doubleflt_tss;
131 	struct x86_64_tss	ci_ddbipi_tss;
132 
133 	char *ci_doubleflt_stack;
134 	char *ci_ddbipi_stack;
135 
136 	struct evcnt ci_ipi_events[X86_NIPI];
137 };
138 
139 #define CPUF_BSP	0x0001		/* CPU is the original BSP */
140 #define CPUF_AP		0x0002		/* CPU is an AP */
141 #define CPUF_SP		0x0004		/* CPU is only processor */
142 #define CPUF_PRIMARY	0x0008		/* CPU is active primary processor */
143 
144 #define CPUF_PRESENT	0x1000		/* CPU is present */
145 #define CPUF_RUNNING	0x2000		/* CPU is running */
146 #define CPUF_PAUSE	0x4000		/* CPU is paused in DDB */
147 #define CPUF_GO		0x8000		/* CPU should start running */
148 
149 
150 extern struct cpu_info cpu_info_primary;
151 extern struct cpu_info *cpu_info_list;
152 
153 #define CPU_INFO_ITERATOR		int
154 #define CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpu_info_list; \
155 					ci != NULL; ci = ci->ci_next
156 
157 #define X86_MAXPROCS		32	/* bitmask; can be bumped to 64 */
158 
159 #define CPU_STARTUP(_ci)	((_ci)->ci_func->start(_ci))
160 #define CPU_STOP(_ci)		((_ci)->ci_func->stop(_ci))
161 #define CPU_START_CLEANUP(_ci)	((_ci)->ci_func->cleanup(_ci))
162 
163 #if defined(__GNUC__) && defined(_KERNEL)
164 static struct cpu_info *x86_curcpu(void);
165 static lwp_t *x86_curlwp(void);
166 
167 __inline static struct cpu_info * __attribute__((__unused__))
168 x86_curcpu(void)
169 {
170 	struct cpu_info *ci;
171 
172 	__asm volatile("movq %%gs:%1, %0" :
173 	    "=r" (ci) :
174 	    "m"
175 	    (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self)));
176 	return ci;
177 }
178 
179 __inline static lwp_t * __attribute__((__unused__))
180 x86_curlwp(void)
181 {
182 	lwp_t *l;
183 
184 	__asm volatile("movq %%gs:%1, %0" :
185 	    "=r" (l) :
186 	    "m"
187 	    (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp)));
188 	return l;
189 }
190 #else	/* __GNUC__ && _KERNEL */
191 /* For non-GCC and LKMs */
192 struct cpu_info	*x86_curcpu(void);
193 lwp_t	*x86_curlwp(void);
194 #endif	/* __GNUC__ && _KERNEL */
195 
196 #define cpu_number()	(curcpu()->ci_cpuid)
197 
198 #define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
199 
200 extern struct cpu_info *cpu_info[X86_MAXPROCS];
201 
202 void cpu_boot_secondary_processors(void);
203 void cpu_init_idle_lwps(void);
204 
205 #define aston(l)	((l)->l_md.md_astpending = 1)
206 
207 extern u_int32_t cpus_attached;
208 
209 #define curcpu()	x86_curcpu()
210 #define curlwp		x86_curlwp()
211 #define curpcb		(&curlwp->l_addr->u_pcb)
212 
213 /*
214  * Arguments to hardclock, softclock and statclock
215  * encapsulate the previous machine state in an opaque
216  * clockframe; for now, use generic intrframe.
217  */
218 struct clockframe {
219 	struct intrframe cf_if;
220 };
221 
222 #define	CLKF_USERMODE(frame)	USERMODE((frame)->cf_if.if_cs, (frame)->cf_if.if_rflags)
223 #define CLKF_PC(frame)		((frame)->cf_if.if_rip)
224 #define CLKF_INTR(frame)	(curcpu()->ci_idepth > 0)
225 
226 /*
227  * This is used during profiling to integrate system time.  It can safely
228  * assume that the process is resident.
229  */
230 #define LWP_PC(l)		((l)->l_md.md_regs->tf_rip)
231 
232 /*
233  * Give a profiling tick to the current process when the user profiling
234  * buffer pages are invalid.  On the i386, request an ast to send us
235  * through trap(), marking the proc as needing a profiling tick.
236  */
237 extern void cpu_need_proftick(struct lwp *);
238 
239 /*
240  * Notify an LWP that it has a signal pending, process as soon as possible.
241  */
242 extern void cpu_signotify(struct lwp *);
243 
244 /*
245  * We need a machine-independent name for this.
246  */
247 extern void (*delay_func)(unsigned int);
248 
249 #define DELAY(x)		(*delay_func)(x)
250 #define delay(x)		(*delay_func)(x)
251 
252 
253 /*
254  * pull in #defines for kinds of processors
255  */
256 
257 extern int biosbasemem;
258 extern int biosextmem;
259 extern int cpu;
260 extern int cpu_feature;
261 extern int cpu_feature2;
262 extern int cpu_id;
263 extern char cpu_vendor[];
264 extern int cpuid_level;
265 
266 /* identcpu.c */
267 
268 void	identifycpu(struct cpu_info *);
269 void cpu_probe_features(struct cpu_info *);
270 
271 /* machdep.c */
272 void	dumpconf(void);
273 int	cpu_maxproc(void);
274 void	cpu_reset(void);
275 void	x86_64_proc0_tss_ldt_init(void);
276 void	x86_64_init_pcb_tss_ldt(struct cpu_info *);
277 void	cpu_proc_fork(struct proc *, struct proc *);
278 
279 struct region_descriptor;
280 void	lgdt(struct region_descriptor *);
281 void	fillw(short, void *, size_t);
282 
283 struct pcb;
284 void	savectx(struct pcb *);
285 void	lwp_trampoline(void);
286 void	child_trampoline(void);
287 
288 /* clock.c */
289 void	initrtclock(u_long);
290 void	startrtclock(void);
291 void	i8254_delay(unsigned int);
292 void	i8254_microtime(struct timeval *);
293 void	i8254_initclocks(void);
294 
295 void cpu_init_msrs(struct cpu_info *);
296 
297 
298 /* vm_machdep.c */
299 int kvtop(void *);
300 
301 /* trap.c */
302 void	child_return(void *);
303 
304 /* consinit.c */
305 void kgdb_port_init(void);
306 
307 /* bus_machdep.c */
308 void x86_bus_space_init(void);
309 void x86_bus_space_mallocok(void);
310 
311 #endif /* _KERNEL */
312 
313 #include <machine/psl.h>
314 
315 /*
316  * CTL_MACHDEP definitions.
317  */
318 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
319 #define	CPU_BIOSBASEMEM		2	/* int: bios-reported base mem (K) */
320 #define	CPU_BIOSEXTMEM		3	/* int: bios-reported ext. mem (K) */
321 #define	CPU_NKPDE		4	/* int: number of kernel PDEs */
322 #define	CPU_BOOTED_KERNEL	5	/* string: booted kernel name */
323 #define CPU_DISKINFO		6	/* disk geometry information */
324 #define CPU_FPU_PRESENT		7	/* FPU is present */
325 #define	CPU_MAXID		8	/* number of valid machdep ids */
326 
327 #define	CTL_MACHDEP_NAMES { \
328 	{ 0, 0 }, \
329 	{ "console_device", CTLTYPE_STRUCT }, \
330 	{ "biosbasemem", CTLTYPE_INT }, \
331 	{ "biosextmem", CTLTYPE_INT }, \
332 	{ "nkpde", CTLTYPE_INT }, \
333 	{ "booted_kernel", CTLTYPE_STRING }, \
334 	{ "diskinfo", CTLTYPE_STRUCT }, \
335 	{ "fpu_present", CTLTYPE_INT }, \
336 }
337 
338 
339 /*
340  * Structure for CPU_DISKINFO sysctl call.
341  * XXX this should be somewhere else.
342  */
343 #define MAX_BIOSDISKS	16
344 
345 struct disklist {
346 	int dl_nbiosdisks;			   /* number of bios disks */
347 	struct biosdisk_info {
348 		int bi_dev;			   /* BIOS device # (0x80 ..) */
349 		int bi_cyl;			   /* cylinders on disk */
350 		int bi_head;			   /* heads per track */
351 		int bi_sec;			   /* sectors per track */
352 		u_int64_t bi_lbasecs;		   /* total sec. (iff ext13) */
353 #define BIFLAG_INVALID		0x01
354 #define BIFLAG_EXTINT13		0x02
355 		int bi_flags;
356 	} dl_biosdisks[MAX_BIOSDISKS];
357 
358 	int dl_nnativedisks;			   /* number of native disks */
359 	struct nativedisk_info {
360 		char ni_devname[16];		   /* native device name */
361 		int ni_nmatches; 		   /* # of matches w/ BIOS */
362 		int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
363 	} dl_nativedisks[1];			   /* actually longer */
364 };
365 
366 #endif /* !_AMD64_CPU_H_ */
367