1 /* $NetBSD: tc_3000_500.c,v 1.32 2014/03/26 08:09:06 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_500.c,v 1.32 2014/03/26 08:09:06 christos Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 39 #include <machine/autoconf.h> 40 #include <machine/pte.h> 41 #include <machine/rpb.h> 42 43 #include <dev/tc/tcvar.h> 44 #include <alpha/tc/tc_conf.h> 45 #include <alpha/tc/tc_3000_500.h> 46 47 #include "wsdisplay.h" 48 #include "sfb.h" 49 50 #if NSFB > 0 51 extern int sfb_cnattach(tc_addr_t); 52 #endif 53 54 void tc_3000_500_intr_setup(void); 55 void tc_3000_500_intr_establish(device_t, void *, 56 tc_intrlevel_t, int (*)(void *), void *); 57 void tc_3000_500_intr_disestablish(device_t, void *); 58 void tc_3000_500_iointr(void *, unsigned long); 59 60 int tc_3000_500_intrnull(void *); 61 int tc_3000_500_fb_cnattach(uint64_t); 62 63 #define C(x) ((void *)(u_long)x) 64 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 65 66 struct tc_slotdesc tc_3000_500_slots[] = { 67 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */ 68 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */ 69 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */ 70 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */ 71 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */ 72 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */ 73 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */ 74 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */ 75 }; 76 int tc_3000_500_nslots = 77 sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]); 78 79 struct tc_builtin tc_3000_500_graphics_builtins[] = { 80 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 81 { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), }, 82 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 83 }; 84 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) / 85 sizeof(tc_3000_500_graphics_builtins[0]); 86 87 struct tc_builtin tc_3000_500_nographics_builtins[] = { 88 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 89 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 90 }; 91 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) / 92 sizeof(tc_3000_500_nographics_builtins[0]); 93 94 uint32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = { 95 TC_3000_500_IR_OPT0, 96 TC_3000_500_IR_OPT1, 97 TC_3000_500_IR_OPT2, 98 TC_3000_500_IR_OPT3, 99 TC_3000_500_IR_OPT4, 100 TC_3000_500_IR_OPT5, 101 TC_3000_500_IR_TCDS, 102 TC_3000_500_IR_IOASIC, 103 TC_3000_500_IR_CXTURBO, 104 }; 105 106 struct tcintr { 107 int (*tci_func)(void *); 108 void *tci_arg; 109 struct evcnt tci_evcnt; 110 } tc_3000_500_intr[TC_3000_500_NCOOKIES]; 111 112 uint32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */ 113 114 void 115 tc_3000_500_intr_setup(void) 116 { 117 char *cp; 118 u_long i; 119 120 /* 121 * Disable all slot interrupts. Note that this cannot 122 * actually disable CXTurbo, TCDS, and IOASIC interrupts. 123 */ 124 tc_3000_500_imask = *(volatile uint32_t *)TC_3000_500_IMR_READ; 125 for (i = 0; i < TC_3000_500_NCOOKIES; i++) 126 tc_3000_500_imask |= tc_3000_500_intrbits[i]; 127 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 128 tc_mb(); 129 130 /* 131 * Set up interrupt handlers. 132 */ 133 for (i = 0; i < TC_3000_500_NCOOKIES; i++) { 134 static const size_t len = 12; 135 tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull; 136 tc_3000_500_intr[i].tci_arg = (void *)i; 137 138 cp = malloc(len, M_DEVBUF, M_NOWAIT); 139 if (cp == NULL) 140 panic("tc_3000_500_intr_setup"); 141 snprintf(cp, len, "slot %lu", i); 142 evcnt_attach_dynamic(&tc_3000_500_intr[i].tci_evcnt, 143 EVCNT_TYPE_INTR, NULL, "tc", cp); 144 } 145 } 146 147 const struct evcnt * 148 tc_3000_500_intr_evcnt(device_t tcadev, void *cookie) 149 { 150 u_long dev = (u_long)cookie; 151 152 #ifdef DIAGNOSTIC 153 /* XXX bounds-check cookie. */ 154 #endif 155 156 return (&tc_3000_500_intr[dev].tci_evcnt); 157 } 158 159 void 160 tc_3000_500_intr_establish(device_t tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg) 161 { 162 u_long dev = (u_long)cookie; 163 164 #ifdef DIAGNOSTIC 165 /* XXX bounds-check cookie. */ 166 #endif 167 168 if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull) 169 panic("tc_3000_500_intr_establish: cookie %lu twice", dev); 170 171 tc_3000_500_intr[dev].tci_func = func; 172 tc_3000_500_intr[dev].tci_arg = arg; 173 174 tc_3000_500_imask &= ~tc_3000_500_intrbits[dev]; 175 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 176 tc_mb(); 177 } 178 179 void 180 tc_3000_500_intr_disestablish(device_t tcadev, void *cookie) 181 { 182 u_long dev = (u_long)cookie; 183 184 #ifdef DIAGNOSTIC 185 /* XXX bounds-check cookie. */ 186 #endif 187 188 if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull) 189 panic("tc_3000_500_intr_disestablish: cookie %lu bad intr", 190 dev); 191 192 tc_3000_500_imask |= tc_3000_500_intrbits[dev]; 193 *(volatile uint32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 194 tc_mb(); 195 196 tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull; 197 tc_3000_500_intr[dev].tci_arg = (void *)dev; 198 } 199 200 int 201 tc_3000_500_intrnull(void *val) 202 { 203 204 panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld", 205 (u_long)val); 206 } 207 208 void 209 tc_3000_500_iointr(void *arg, unsigned long vec) 210 { 211 uint32_t ir; 212 int ifound; 213 214 #ifdef DIAGNOSTIC 215 int s; 216 if (vec != 0x800) 217 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 218 s = splhigh(); 219 if (s != ALPHA_PSL_IPL_IO) 220 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 221 ALPHA_PSL_IPL_IO); 222 splx(s); 223 #endif 224 225 do { 226 tc_syncbus(); 227 ir = *(volatile uint32_t *)TC_3000_500_IR_CLEAR; 228 229 /* Ignore interrupts that we haven't enabled. */ 230 ir &= ~(tc_3000_500_imask & 0x1ff); 231 232 ifound = 0; 233 234 #define INCRINTRCNT(slot) tc_3000_500_intr[slot].tci_evcnt.ev_count++ 235 236 #define CHECKINTR(slot) \ 237 if (ir & tc_3000_500_intrbits[slot]) { \ 238 ifound = 1; \ 239 INCRINTRCNT(slot); \ 240 (*tc_3000_500_intr[slot].tci_func) \ 241 (tc_3000_500_intr[slot].tci_arg); \ 242 } 243 /* Do them in order of priority; highest slot # first. */ 244 CHECKINTR(TC_3000_500_DEV_CXTURBO); 245 CHECKINTR(TC_3000_500_DEV_IOASIC); 246 CHECKINTR(TC_3000_500_DEV_TCDS); 247 CHECKINTR(TC_3000_500_DEV_OPT5); 248 CHECKINTR(TC_3000_500_DEV_OPT4); 249 CHECKINTR(TC_3000_500_DEV_OPT3); 250 CHECKINTR(TC_3000_500_DEV_OPT2); 251 CHECKINTR(TC_3000_500_DEV_OPT1); 252 CHECKINTR(TC_3000_500_DEV_OPT0); 253 #undef CHECKINTR 254 255 #ifdef DIAGNOSTIC 256 #define PRINTINTR(msg, bits) \ 257 if (ir & bits) \ 258 printf(msg); 259 PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2); 260 PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE); 261 PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K); 262 PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET); 263 PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR); 264 PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG); 265 PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE); 266 PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE); 267 PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT); 268 PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK); 269 PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR); 270 PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG); 271 PRINTINTR("Scatter/gather parity error\n", 272 TC_3000_500_IR_SGPAR); 273 #undef PRINTINTR 274 #endif 275 } while (ifound); 276 } 277 278 #if NWSDISPLAY > 0 279 /* 280 * tc_3000_500_fb_cnattach -- 281 * Attempt to map the CTB output device to a slot and attach the 282 * framebuffer as the output side of the console. 283 */ 284 int 285 tc_3000_500_fb_cnattach(uint64_t turbo_slot) 286 { 287 uint32_t output_slot; 288 289 output_slot = turbo_slot & 0xffffffff; 290 291 if (output_slot >= tc_3000_500_nslots) { 292 return EINVAL; 293 } 294 295 if (hwrpb->rpb_variation & SV_GRAPHICS) { 296 if (output_slot == 0) { 297 #if NSFB > 0 298 sfb_cnattach(KV(0x1e0000000) + 0x02000000); 299 return 0; 300 #else 301 return ENXIO; 302 #endif 303 } 304 } else { 305 /* 306 * Slots 0-2 in the tc_3000_500_slots array are only 307 * on the 500 models that also have the CXTurbo 308 * (500/800/900) and a total of 6 TC slots. For the 309 * 400/600/700, slots 0-2 are in table locations 3-5, so 310 * offset the CTB slot by 3 to get the address in our table. 311 */ 312 output_slot += 3; 313 } 314 return tc_fb_cnattach(tc_3000_500_slots[output_slot-1].tcs_addr); 315 } 316 #endif /* NWSDISPLAY */ 317 318 #if 0 319 /* 320 * tc_3000_500_ioslot -- 321 * Set the PBS bits for devices on the TC. 322 */ 323 void 324 tc_3000_500_ioslot(uint32_t slot, uint32_t flags, int set) 325 { 326 volatile uint32_t *iosp; 327 uint32_t ios; 328 int s; 329 330 iosp = (volatile uint32_t *)TC_3000_500_IOSLOT; 331 ios = *iosp; 332 flags <<= (slot * 3); 333 if (set) 334 ios |= flags; 335 else 336 ios &= ~flags; 337 s = splhigh(); 338 *iosp = ios; 339 tc_mb(); 340 splx(s); 341 } 342 #endif 343