1 /* $NetBSD: pci_swiz_bus_mem_chipdep.c,v 1.38 2003/07/14 23:25:40 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 41 * All rights reserved. 42 * 43 * Author: Chris G. Demetriou 44 * 45 * Permission to use, copy, modify and distribute this software and 46 * its documentation is hereby granted, provided that both the copyright 47 * notice and this permission notice appear in all copies of the 48 * software, derivative works or modified versions, and any portions 49 * thereof, and that both notices appear in supporting documentation. 50 * 51 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 52 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 53 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 54 * 55 * Carnegie Mellon requests users of this software to return to 56 * 57 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 58 * School of Computer Science 59 * Carnegie Mellon University 60 * Pittsburgh PA 15213-3890 61 * 62 * any improvements or extensions that they make and grant Carnegie the 63 * rights to redistribute these changes. 64 */ 65 66 /* 67 * Common PCI Chipset "bus I/O" functions, for chipsets which have to 68 * deal with only a single PCI interface chip in a machine. 69 * 70 * uses: 71 * CHIP name of the 'chip' it's being compiled for. 72 * CHIP_D_MEM_W1_SYS_START Dense Mem space base to use. 73 * CHIP_D_MEM_EX_STORE 74 * If defined, device-provided static storage area 75 * for the dense memory space extent. If this is 76 * defined, CHIP_D_MEM_EX_STORE_SIZE must also be 77 * defined. If this is not defined, a static area 78 * will be declared. 79 * CHIP_D_MEM_EX_STORE_SIZE 80 * Size of the device-provided static storage area 81 * for the dense memory space extent. 82 * CHIP_S_MEM_BASE Sparse Mem space base to use. 83 * CHIP_S_MEM_EX_STORE 84 * If defined, device-provided static storage area 85 * for the sparse memory space extent. If this is 86 * defined, CHIP_S_MEM_EX_STORE_SIZE must also be 87 * defined. If this is not defined, a static area 88 * will be declared. 89 * CHIP_S_MEM_EX_STORE_SIZE 90 * Size of the device-provided static storage area 91 * for the sparse memory space extent. 92 */ 93 94 #include <sys/cdefs.h> 95 __KERNEL_RCSID(1, "$NetBSD: pci_swiz_bus_mem_chipdep.c,v 1.38 2003/07/14 23:25:40 lukem Exp $"); 96 97 #include <sys/extent.h> 98 99 #define __C(A,B) __CONCAT(A,B) 100 #define __S(S) __STRING(S) 101 102 /* mapping/unmapping */ 103 int __C(CHIP,_mem_map) __P((void *, bus_addr_t, bus_size_t, int, 104 bus_space_handle_t *, int)); 105 void __C(CHIP,_mem_unmap) __P((void *, bus_space_handle_t, 106 bus_size_t, int)); 107 int __C(CHIP,_mem_subregion) __P((void *, bus_space_handle_t, 108 bus_size_t, bus_size_t, bus_space_handle_t *)); 109 110 int __C(CHIP,_mem_translate) __P((void *, bus_addr_t, bus_size_t, 111 int, struct alpha_bus_space_translation *)); 112 int __C(CHIP,_mem_get_window) __P((void *, int, 113 struct alpha_bus_space_translation *)); 114 115 /* allocation/deallocation */ 116 int __C(CHIP,_mem_alloc) __P((void *, bus_addr_t, bus_addr_t, 117 bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *, 118 bus_space_handle_t *)); 119 void __C(CHIP,_mem_free) __P((void *, bus_space_handle_t, 120 bus_size_t)); 121 122 /* get kernel virtual address */ 123 void * __C(CHIP,_mem_vaddr) __P((void *, bus_space_handle_t)); 124 125 /* mmap for user */ 126 paddr_t __C(CHIP,_mem_mmap) __P((void *, bus_addr_t, off_t, int, int)); 127 128 /* barrier */ 129 inline void __C(CHIP,_mem_barrier) __P((void *, bus_space_handle_t, 130 bus_size_t, bus_size_t, int)); 131 132 /* read (single) */ 133 inline u_int8_t __C(CHIP,_mem_read_1) __P((void *, bus_space_handle_t, 134 bus_size_t)); 135 inline u_int16_t __C(CHIP,_mem_read_2) __P((void *, bus_space_handle_t, 136 bus_size_t)); 137 inline u_int32_t __C(CHIP,_mem_read_4) __P((void *, bus_space_handle_t, 138 bus_size_t)); 139 inline u_int64_t __C(CHIP,_mem_read_8) __P((void *, bus_space_handle_t, 140 bus_size_t)); 141 142 /* read multiple */ 143 void __C(CHIP,_mem_read_multi_1) __P((void *, bus_space_handle_t, 144 bus_size_t, u_int8_t *, bus_size_t)); 145 void __C(CHIP,_mem_read_multi_2) __P((void *, bus_space_handle_t, 146 bus_size_t, u_int16_t *, bus_size_t)); 147 void __C(CHIP,_mem_read_multi_4) __P((void *, bus_space_handle_t, 148 bus_size_t, u_int32_t *, bus_size_t)); 149 void __C(CHIP,_mem_read_multi_8) __P((void *, bus_space_handle_t, 150 bus_size_t, u_int64_t *, bus_size_t)); 151 152 /* read region */ 153 void __C(CHIP,_mem_read_region_1) __P((void *, bus_space_handle_t, 154 bus_size_t, u_int8_t *, bus_size_t)); 155 void __C(CHIP,_mem_read_region_2) __P((void *, bus_space_handle_t, 156 bus_size_t, u_int16_t *, bus_size_t)); 157 void __C(CHIP,_mem_read_region_4) __P((void *, bus_space_handle_t, 158 bus_size_t, u_int32_t *, bus_size_t)); 159 void __C(CHIP,_mem_read_region_8) __P((void *, bus_space_handle_t, 160 bus_size_t, u_int64_t *, bus_size_t)); 161 162 /* write (single) */ 163 inline void __C(CHIP,_mem_write_1) __P((void *, bus_space_handle_t, 164 bus_size_t, u_int8_t)); 165 inline void __C(CHIP,_mem_write_2) __P((void *, bus_space_handle_t, 166 bus_size_t, u_int16_t)); 167 inline void __C(CHIP,_mem_write_4) __P((void *, bus_space_handle_t, 168 bus_size_t, u_int32_t)); 169 inline void __C(CHIP,_mem_write_8) __P((void *, bus_space_handle_t, 170 bus_size_t, u_int64_t)); 171 172 /* write multiple */ 173 void __C(CHIP,_mem_write_multi_1) __P((void *, bus_space_handle_t, 174 bus_size_t, const u_int8_t *, bus_size_t)); 175 void __C(CHIP,_mem_write_multi_2) __P((void *, bus_space_handle_t, 176 bus_size_t, const u_int16_t *, bus_size_t)); 177 void __C(CHIP,_mem_write_multi_4) __P((void *, bus_space_handle_t, 178 bus_size_t, const u_int32_t *, bus_size_t)); 179 void __C(CHIP,_mem_write_multi_8) __P((void *, bus_space_handle_t, 180 bus_size_t, const u_int64_t *, bus_size_t)); 181 182 /* write region */ 183 void __C(CHIP,_mem_write_region_1) __P((void *, bus_space_handle_t, 184 bus_size_t, const u_int8_t *, bus_size_t)); 185 void __C(CHIP,_mem_write_region_2) __P((void *, bus_space_handle_t, 186 bus_size_t, const u_int16_t *, bus_size_t)); 187 void __C(CHIP,_mem_write_region_4) __P((void *, bus_space_handle_t, 188 bus_size_t, const u_int32_t *, bus_size_t)); 189 void __C(CHIP,_mem_write_region_8) __P((void *, bus_space_handle_t, 190 bus_size_t, const u_int64_t *, bus_size_t)); 191 192 /* set multiple */ 193 void __C(CHIP,_mem_set_multi_1) __P((void *, bus_space_handle_t, 194 bus_size_t, u_int8_t, bus_size_t)); 195 void __C(CHIP,_mem_set_multi_2) __P((void *, bus_space_handle_t, 196 bus_size_t, u_int16_t, bus_size_t)); 197 void __C(CHIP,_mem_set_multi_4) __P((void *, bus_space_handle_t, 198 bus_size_t, u_int32_t, bus_size_t)); 199 void __C(CHIP,_mem_set_multi_8) __P((void *, bus_space_handle_t, 200 bus_size_t, u_int64_t, bus_size_t)); 201 202 /* set region */ 203 void __C(CHIP,_mem_set_region_1) __P((void *, bus_space_handle_t, 204 bus_size_t, u_int8_t, bus_size_t)); 205 void __C(CHIP,_mem_set_region_2) __P((void *, bus_space_handle_t, 206 bus_size_t, u_int16_t, bus_size_t)); 207 void __C(CHIP,_mem_set_region_4) __P((void *, bus_space_handle_t, 208 bus_size_t, u_int32_t, bus_size_t)); 209 void __C(CHIP,_mem_set_region_8) __P((void *, bus_space_handle_t, 210 bus_size_t, u_int64_t, bus_size_t)); 211 212 /* copy */ 213 void __C(CHIP,_mem_copy_region_1) __P((void *, bus_space_handle_t, 214 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 215 void __C(CHIP,_mem_copy_region_2) __P((void *, bus_space_handle_t, 216 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 217 void __C(CHIP,_mem_copy_region_4) __P((void *, bus_space_handle_t, 218 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 219 void __C(CHIP,_mem_copy_region_8) __P((void *, bus_space_handle_t, 220 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 221 222 #ifdef CHIP_D_MEM_W1_SYS_START 223 #ifndef CHIP_D_MEM_EX_STORE 224 static long 225 __C(CHIP,_dmem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 226 #define CHIP_D_MEM_EX_STORE(v) (__C(CHIP,_dmem_ex_storage)) 227 #define CHIP_D_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_dmem_ex_storage)) 228 #endif 229 #endif /* CHIP_D_MEM_W1_SYS_START */ 230 231 #ifndef CHIP_S_MEM_EX_STORE 232 static long 233 __C(CHIP,_smem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 234 #define CHIP_S_MEM_EX_STORE(v) (__C(CHIP,_smem_ex_storage)) 235 #define CHIP_S_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_smem_ex_storage)) 236 #endif 237 238 #ifndef CHIP_ADDR_SHIFT 239 #define CHIP_ADDR_SHIFT 5 240 #endif 241 242 #ifndef CHIP_SIZE_SHIFT 243 #define CHIP_SIZE_SHIFT 3 244 #endif 245 246 void 247 __C(CHIP,_bus_mem_init)(t, v) 248 bus_space_tag_t t; 249 void *v; 250 { 251 #ifdef CHIP_D_MEM_W1_SYS_START 252 struct extent *dex; 253 #endif 254 struct extent *sex; 255 256 /* 257 * Initialize the bus space tag. 258 */ 259 260 /* cookie */ 261 t->abs_cookie = v; 262 263 /* mapping/unmapping */ 264 t->abs_map = __C(CHIP,_mem_map); 265 t->abs_unmap = __C(CHIP,_mem_unmap); 266 t->abs_subregion = __C(CHIP,_mem_subregion); 267 268 t->abs_translate = __C(CHIP,_mem_translate); 269 t->abs_get_window = __C(CHIP,_mem_get_window); 270 271 /* allocation/deallocation */ 272 t->abs_alloc = __C(CHIP,_mem_alloc); 273 t->abs_free = __C(CHIP,_mem_free); 274 275 /* get kernel virtual address */ 276 t->abs_vaddr = __C(CHIP,_mem_vaddr); 277 278 /* mmap for user */ 279 t->abs_mmap = __C(CHIP,_mem_mmap); 280 281 /* barrier */ 282 t->abs_barrier = __C(CHIP,_mem_barrier); 283 284 /* read (single) */ 285 t->abs_r_1 = __C(CHIP,_mem_read_1); 286 t->abs_r_2 = __C(CHIP,_mem_read_2); 287 t->abs_r_4 = __C(CHIP,_mem_read_4); 288 t->abs_r_8 = __C(CHIP,_mem_read_8); 289 290 /* read multiple */ 291 t->abs_rm_1 = __C(CHIP,_mem_read_multi_1); 292 t->abs_rm_2 = __C(CHIP,_mem_read_multi_2); 293 t->abs_rm_4 = __C(CHIP,_mem_read_multi_4); 294 t->abs_rm_8 = __C(CHIP,_mem_read_multi_8); 295 296 /* read region */ 297 t->abs_rr_1 = __C(CHIP,_mem_read_region_1); 298 t->abs_rr_2 = __C(CHIP,_mem_read_region_2); 299 t->abs_rr_4 = __C(CHIP,_mem_read_region_4); 300 t->abs_rr_8 = __C(CHIP,_mem_read_region_8); 301 302 /* write (single) */ 303 t->abs_w_1 = __C(CHIP,_mem_write_1); 304 t->abs_w_2 = __C(CHIP,_mem_write_2); 305 t->abs_w_4 = __C(CHIP,_mem_write_4); 306 t->abs_w_8 = __C(CHIP,_mem_write_8); 307 308 /* write multiple */ 309 t->abs_wm_1 = __C(CHIP,_mem_write_multi_1); 310 t->abs_wm_2 = __C(CHIP,_mem_write_multi_2); 311 t->abs_wm_4 = __C(CHIP,_mem_write_multi_4); 312 t->abs_wm_8 = __C(CHIP,_mem_write_multi_8); 313 314 /* write region */ 315 t->abs_wr_1 = __C(CHIP,_mem_write_region_1); 316 t->abs_wr_2 = __C(CHIP,_mem_write_region_2); 317 t->abs_wr_4 = __C(CHIP,_mem_write_region_4); 318 t->abs_wr_8 = __C(CHIP,_mem_write_region_8); 319 320 /* set multiple */ 321 t->abs_sm_1 = __C(CHIP,_mem_set_multi_1); 322 t->abs_sm_2 = __C(CHIP,_mem_set_multi_2); 323 t->abs_sm_4 = __C(CHIP,_mem_set_multi_4); 324 t->abs_sm_8 = __C(CHIP,_mem_set_multi_8); 325 326 /* set region */ 327 t->abs_sr_1 = __C(CHIP,_mem_set_region_1); 328 t->abs_sr_2 = __C(CHIP,_mem_set_region_2); 329 t->abs_sr_4 = __C(CHIP,_mem_set_region_4); 330 t->abs_sr_8 = __C(CHIP,_mem_set_region_8); 331 332 /* copy */ 333 t->abs_c_1 = __C(CHIP,_mem_copy_region_1); 334 t->abs_c_2 = __C(CHIP,_mem_copy_region_2); 335 t->abs_c_4 = __C(CHIP,_mem_copy_region_4); 336 t->abs_c_8 = __C(CHIP,_mem_copy_region_8); 337 338 #ifdef CHIP_D_MEM_W1_SYS_START 339 /* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */ 340 dex = extent_create(__S(__C(CHIP,_bus_dmem)), 0x0UL, 341 0xffffffffffffffffUL, M_DEVBUF, 342 (caddr_t)CHIP_D_MEM_EX_STORE(v), CHIP_D_MEM_EX_STORE_SIZE(v), 343 EX_NOWAIT); 344 extent_alloc_region(dex, 0, 0xffffffffffffffffUL, EX_NOWAIT); 345 346 #ifdef CHIP_D_MEM_W1_BUS_START 347 #ifdef EXTENT_DEBUG 348 printf("dmem: freeing from 0x%lx to 0x%lx\n", 349 CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v)); 350 #endif 351 extent_free(dex, CHIP_D_MEM_W1_BUS_START(v), 352 CHIP_D_MEM_W1_BUS_END(v) - CHIP_D_MEM_W1_BUS_START(v) + 1, 353 EX_NOWAIT); 354 #endif 355 356 #ifdef EXTENT_DEBUG 357 extent_print(dex); 358 #endif 359 CHIP_D_MEM_EXTENT(v) = dex; 360 #endif /* CHIP_D_MEM_W1_SYS_START */ 361 362 /* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */ 363 sex = extent_create(__S(__C(CHIP,_bus_smem)), 0x0UL, 364 0xffffffffffffffffUL, M_DEVBUF, 365 (caddr_t)CHIP_S_MEM_EX_STORE(v), CHIP_S_MEM_EX_STORE_SIZE(v), 366 EX_NOWAIT); 367 extent_alloc_region(sex, 0, 0xffffffffffffffffUL, EX_NOWAIT); 368 369 #ifdef CHIP_S_MEM_W1_BUS_START 370 #ifdef EXTENT_DEBUG 371 printf("smem: freeing from 0x%lx to 0x%lx\n", 372 CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v)); 373 #endif 374 extent_free(sex, CHIP_S_MEM_W1_BUS_START(v), 375 CHIP_S_MEM_W1_BUS_END(v) - CHIP_S_MEM_W1_BUS_START(v) + 1, 376 EX_NOWAIT); 377 #endif 378 #ifdef CHIP_S_MEM_W2_BUS_START 379 if (CHIP_S_MEM_W2_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v)) { 380 #ifdef EXTENT_DEBUG 381 printf("smem: freeing from 0x%lx to 0x%lx\n", 382 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 383 #endif 384 extent_free(sex, CHIP_S_MEM_W2_BUS_START(v), 385 CHIP_S_MEM_W2_BUS_END(v) - CHIP_S_MEM_W2_BUS_START(v) + 1, 386 EX_NOWAIT); 387 } else { 388 #ifdef EXTENT_DEBUG 389 printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n", 390 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 391 #endif 392 } 393 #endif 394 #ifdef CHIP_S_MEM_W3_BUS_START 395 if (CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v) && 396 CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W2_BUS_START(v)) { 397 #ifdef EXTENT_DEBUG 398 printf("smem: freeing from 0x%lx to 0x%lx\n", 399 CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v)); 400 #endif 401 extent_free(sex, CHIP_S_MEM_W3_BUS_START(v), 402 CHIP_S_MEM_W3_BUS_END(v) - CHIP_S_MEM_W3_BUS_START(v) + 1, 403 EX_NOWAIT); 404 } else { 405 #ifdef EXTENT_DEBUG 406 printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n", 407 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 408 #endif 409 } 410 #endif 411 412 #ifdef EXTENT_DEBUG 413 extent_print(sex); 414 #endif 415 CHIP_S_MEM_EXTENT(v) = sex; 416 } 417 418 #ifdef CHIP_D_MEM_W1_SYS_START 419 static int __C(CHIP,_xlate_addr_to_dense_handle) __P((void *, 420 bus_addr_t, bus_space_handle_t *)); 421 static int __C(CHIP,_xlate_dense_handle_to_addr) __P((void *, 422 bus_space_handle_t, bus_addr_t *)); 423 #endif /* CHIP_D_MEM_W1_SYS_START */ 424 static int __C(CHIP,_xlate_addr_to_sparse_handle) __P((void *, 425 bus_addr_t, bus_space_handle_t *)); 426 static int __C(CHIP,_xlate_sparse_handle_to_addr) __P((void *, 427 bus_space_handle_t, bus_addr_t *)); 428 429 #ifdef CHIP_D_MEM_W1_SYS_START 430 static int 431 __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, memhp) 432 void *v; 433 bus_addr_t memaddr; 434 bus_space_handle_t *memhp; 435 { 436 #ifdef CHIP_D_MEM_W1_BUS_START 437 if (memaddr >= CHIP_D_MEM_W1_BUS_START(v) && 438 memaddr <= CHIP_D_MEM_W1_BUS_END(v)) { 439 if (memhp != NULL) 440 *memhp = 441 ALPHA_PHYS_TO_K0SEG(CHIP_D_MEM_W1_SYS_START(v)) + 442 (memaddr - CHIP_D_MEM_W1_BUS_START(v)); 443 return (1); 444 } else 445 #endif 446 return (0); 447 } 448 449 static int 450 __C(CHIP,_xlate_dense_handle_to_addr)(v, memh, memaddrp) 451 void *v; 452 bus_space_handle_t memh; 453 bus_addr_t *memaddrp; 454 { 455 456 memh = ALPHA_K0SEG_TO_PHYS(memh); 457 458 #ifdef CHIP_D_MEM_W1_BUS_START 459 if (memh >= CHIP_D_MEM_W1_SYS_START(v) && 460 memh <= CHIP_D_MEM_W1_SYS_END(v)) { 461 *memaddrp = CHIP_D_MEM_W1_BUS_START(v) + 462 (memh - CHIP_D_MEM_W1_SYS_START(v)); 463 return (1); 464 } else 465 #endif 466 return (0); 467 } 468 #endif /* CHIP_D_MEM_W1_SYS_START */ 469 470 static int 471 __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp) 472 void *v; 473 bus_addr_t memaddr; 474 bus_space_handle_t *memhp; 475 { 476 477 #ifdef CHIP_S_MEM_W1_BUS_START 478 if (memaddr >= CHIP_S_MEM_W1_BUS_START(v) && 479 memaddr <= CHIP_S_MEM_W1_BUS_END(v)) { 480 if (memhp != NULL) 481 *memhp = 482 (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_SYS_START(v)) >> 483 CHIP_ADDR_SHIFT) + 484 (memaddr - CHIP_S_MEM_W1_BUS_START(v)); 485 return (1); 486 } else 487 #endif 488 #ifdef CHIP_S_MEM_W2_BUS_START 489 if (memaddr >= CHIP_S_MEM_W2_BUS_START(v) && 490 memaddr <= CHIP_S_MEM_W2_BUS_END(v)) { 491 if (memhp != NULL) 492 *memhp = 493 (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_SYS_START(v)) >> 494 CHIP_ADDR_SHIFT) + 495 (memaddr - CHIP_S_MEM_W2_BUS_START(v)); 496 return (1); 497 } else 498 #endif 499 #ifdef CHIP_S_MEM_W3_BUS_START 500 if (memaddr >= CHIP_S_MEM_W3_BUS_START(v) && 501 memaddr <= CHIP_S_MEM_W3_BUS_END(v)) { 502 if (memhp != NULL) 503 *memhp = 504 (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_SYS_START(v)) >> 505 CHIP_ADDR_SHIFT) + 506 (memaddr - CHIP_S_MEM_W3_BUS_START(v)); 507 return (1); 508 } else 509 #endif 510 return (0); 511 } 512 513 static int 514 __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, memaddrp) 515 void *v; 516 bus_space_handle_t memh; 517 bus_addr_t *memaddrp; 518 { 519 520 memh = ALPHA_K0SEG_TO_PHYS(memh << CHIP_ADDR_SHIFT) >> CHIP_ADDR_SHIFT; 521 522 #ifdef CHIP_S_MEM_W1_BUS_START 523 if ((memh << CHIP_ADDR_SHIFT) >= CHIP_S_MEM_W1_SYS_START(v) && 524 (memh << CHIP_ADDR_SHIFT) <= CHIP_S_MEM_W1_SYS_END(v)) { 525 *memaddrp = CHIP_S_MEM_W1_BUS_START(v) + 526 (memh - (CHIP_S_MEM_W1_SYS_START(v) >> CHIP_ADDR_SHIFT)); 527 return (1); 528 } else 529 #endif 530 #ifdef CHIP_S_MEM_W2_BUS_START 531 if ((memh << CHIP_ADDR_SHIFT) >= CHIP_S_MEM_W2_SYS_START(v) && 532 (memh << CHIP_ADDR_SHIFT) <= CHIP_S_MEM_W2_SYS_END(v)) { 533 *memaddrp = CHIP_S_MEM_W2_BUS_START(v) + 534 (memh - (CHIP_S_MEM_W2_SYS_START(v) >> CHIP_ADDR_SHIFT)); 535 return (1); 536 } else 537 #endif 538 #ifdef CHIP_S_MEM_W3_BUS_START 539 if ((memh << CHIP_ADDR_SHIFT) >= CHIP_S_MEM_W3_SYS_START(v) && 540 (memh << CHIP_ADDR_SHIFT) <= CHIP_S_MEM_W3_SYS_END(v)) { 541 *memaddrp = CHIP_S_MEM_W3_BUS_START(v) + 542 (memh - (CHIP_S_MEM_W3_SYS_START(v) >> CHIP_ADDR_SHIFT)); 543 return (1); 544 } else 545 #endif 546 return (0); 547 } 548 549 int 550 __C(CHIP,_mem_translate)(v, memaddr, memlen, flags, abst) 551 void *v; 552 bus_addr_t memaddr; 553 bus_size_t memlen; 554 int flags; 555 struct alpha_bus_space_translation *abst; 556 { 557 558 /* XXX */ 559 return (EOPNOTSUPP); 560 } 561 562 int 563 __C(CHIP,_mem_get_window)(v, window, abst) 564 void *v; 565 int window; 566 struct alpha_bus_space_translation *abst; 567 { 568 569 #ifdef CHIP_D_MEM_W1_BUS_START 570 #define FIRST_SPARSE 1 571 #else 572 #define FIRST_SPARSE 0 573 #endif 574 575 switch (window) { 576 #ifdef CHIP_D_MEM_W1_BUS_START 577 case 0: 578 abst->abst_bus_start = CHIP_D_MEM_W1_BUS_START(v); 579 abst->abst_bus_end = CHIP_D_MEM_W1_BUS_END(v); 580 abst->abst_sys_start = CHIP_D_MEM_W1_SYS_START(v); 581 abst->abst_sys_end = CHIP_D_MEM_W1_SYS_END(v); 582 abst->abst_addr_shift = 0; 583 abst->abst_size_shift = 0; 584 abst->abst_flags = ABST_DENSE; 585 break; 586 #endif 587 588 #ifdef CHIP_S_MEM_W1_BUS_START 589 case (FIRST_SPARSE): 590 abst->abst_bus_start = CHIP_S_MEM_W1_BUS_START(v); 591 abst->abst_bus_end = CHIP_S_MEM_W1_BUS_END(v); 592 abst->abst_sys_start = CHIP_S_MEM_W1_SYS_START(v); 593 abst->abst_sys_end = CHIP_S_MEM_W1_SYS_END(v); 594 abst->abst_addr_shift = CHIP_ADDR_SHIFT; 595 abst->abst_size_shift = CHIP_SIZE_SHIFT; 596 abst->abst_flags = 0; 597 break; 598 #endif 599 600 #ifdef CHIP_S_MEM_W2_BUS_START 601 case (FIRST_SPARSE + 1): 602 abst->abst_bus_start = CHIP_S_MEM_W2_BUS_START(v); 603 abst->abst_bus_end = CHIP_S_MEM_W2_BUS_END(v); 604 abst->abst_sys_start = CHIP_S_MEM_W2_SYS_START(v); 605 abst->abst_sys_end = CHIP_S_MEM_W2_SYS_END(v); 606 abst->abst_addr_shift = CHIP_ADDR_SHIFT; 607 abst->abst_size_shift = CHIP_SIZE_SHIFT; 608 abst->abst_flags = 0; 609 break; 610 #endif 611 612 #ifdef CHIP_S_MEM_W3_BUS_START 613 case (FIRST_SPARSE + 2): 614 abst->abst_bus_start = CHIP_S_MEM_W3_BUS_START(v); 615 abst->abst_bus_end = CHIP_S_MEM_W3_BUS_END(v); 616 abst->abst_sys_start = CHIP_S_MEM_W3_SYS_START(v); 617 abst->abst_sys_end = CHIP_S_MEM_W3_SYS_END(v); 618 abst->abst_addr_shift = CHIP_ADDR_SHIFT; 619 abst->abst_size_shift = CHIP_SIZE_SHIFT; 620 abst->abst_flags = 0; 621 break; 622 #endif 623 } 624 625 #undef FIRST_SPARSE 626 627 return (0); 628 } 629 630 int 631 __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct) 632 void *v; 633 bus_addr_t memaddr; 634 bus_size_t memsize; 635 int flags; 636 bus_space_handle_t *memhp; 637 int acct; 638 { 639 bus_space_handle_t dh = 0, sh = 0; /* XXX -Wuninitialized */ 640 int didd, dids, errord, errors, mustd, musts; 641 int prefectchable = flags & BUS_SPACE_MAP_PREFETCHABLE; 642 int linear = flags & BUS_SPACE_MAP_LINEAR; 643 644 /* 645 * XXX Too hairy to not do accounting in this space. Nothing 646 * XXX much uses this anyhow (only ISA PnP does, and only via 647 * XXX a machine-dependent hook), so we don't have to care. 648 */ 649 if (acct == 0) 650 return (EOPNOTSUPP); 651 652 #ifdef CHIP_D_MEM_W1_SYS_START 653 mustd = 1; 654 if (!__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, NULL)) { 655 /* 656 * This address isn't mapped into dense space; don't 657 * require it. 658 */ 659 mustd = 0; 660 } 661 #else 662 mustd = 0; 663 #endif 664 665 /* No prefectchable space without dense. */ 666 if (mustd == 0) 667 prefectchable = 0; 668 669 /* 670 * We must have dense space to map memory linearly. 671 */ 672 if (linear && !prefectchable) 673 return (EOPNOTSUPP); 674 675 musts = (prefectchable == 0); 676 if (!__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, NULL)) { 677 /* 678 * This address isn't mapped into sparse space; don't 679 * require it. 680 */ 681 musts = 0; 682 } 683 684 /* 685 * If this address isn't mapped into dense or sparse, we lose. 686 */ 687 if (mustd == 0 && musts == 0) { 688 #ifdef EXTENT_DEBUG 689 printf("mem: address 0x%lx not in dense or sparse space\n", 690 memaddr); 691 #endif 692 return (EINVAL); 693 } 694 695 #ifdef EXTENT_DEBUG 696 printf("mem: allocating 0x%lx to 0x%lx\n", memaddr, 697 memaddr + memsize - 1); 698 printf("mem: %s dense, %s sparse\n", mustd ? "need" : "want", 699 musts ? "need" : "want"); 700 #endif 701 #ifdef CHIP_D_MEM_W1_SYS_START 702 errord = extent_alloc_region(CHIP_D_MEM_EXTENT(v), memaddr, memsize, 703 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 704 #else 705 errord = EINVAL; 706 #endif 707 didd = (errord == 0); 708 errors = extent_alloc_region(CHIP_S_MEM_EXTENT(v), memaddr, memsize, 709 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 710 dids = (errors == 0); 711 712 #ifdef EXTENT_DEBUG 713 if (!didd) 714 printf("mem: failed to get dense (%d)\n", errord); 715 if (!dids) 716 printf("mem: failed to get sparse (%d)\n", errors); 717 #endif 718 719 if ((mustd && !didd) || (musts && !dids)) 720 goto bad; 721 722 #ifdef CHIP_D_MEM_W1_SYS_START 723 if (didd && !__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, &dh)) { 724 printf("\n"); 725 #ifdef CHIP_D_MEM_W1_BUS_START 726 printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 727 CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v)); 728 #endif 729 panic("%s: don't know how to map %lx prefectchable", 730 __S(__C(CHIP,_mem_map)), memaddr); 731 } 732 #endif /* CHIP_D_MEM_W1_SYS_START */ 733 734 if (dids && !__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, &sh)) { 735 printf("\n"); 736 #ifdef CHIP_S_MEM_W1_BUS_START 737 printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 738 CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v)); 739 #endif 740 #ifdef CHIP_S_MEM_W2_BUS_START 741 printf("%s: window[2]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 742 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 743 #endif 744 #ifdef CHIP_S_MEM_W3_BUS_START 745 printf("%s: window[3]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 746 CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v)); 747 #endif 748 panic("%s: don't know how to map %lx non-prefectchable", 749 __S(__C(CHIP,_mem_map)), memaddr); 750 } 751 752 if (prefectchable) 753 *memhp = dh; 754 else 755 *memhp = sh; 756 return (0); 757 758 bad: 759 #ifdef EXTENT_DEBUG 760 printf("mem: failed\n"); 761 #endif 762 #ifdef CHIP_D_MEM_W1_SYS_START 763 if (didd) { 764 #ifdef EXTENT_DEBUG 765 printf("mem: freeing dense\n"); 766 #endif 767 if (extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize, 768 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 769 printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n", 770 __S(__C(CHIP,_mem_map)), memaddr, 771 memaddr + memsize - 1); 772 } 773 } 774 #endif /* CHIP_D_MEM_W1_SYS_START */ 775 if (dids) { 776 #ifdef EXTENT_DEBUG 777 printf("mem: freeing sparse\n"); 778 #endif 779 if (extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize, 780 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 781 printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n", 782 __S(__C(CHIP,_mem_map)), memaddr, 783 memaddr + memsize - 1); 784 } 785 } 786 787 #ifdef EXTENT_DEBUG 788 #ifdef CHIP_D_MEM_W1_SYS_START 789 extent_print(CHIP_D_MEM_EXTENT(v)); 790 #endif 791 extent_print(CHIP_S_MEM_EXTENT(v)); 792 #endif 793 794 /* 795 * return dense error if we needed it but couldn't get it, else 796 * sparse error. The error _has_ to be one of the two... 797 */ 798 return (mustd && !didd ? errord : (musts && !dids ? errors : EINVAL)); 799 } 800 801 void 802 __C(CHIP,_mem_unmap)(v, memh, memsize, acct) 803 void *v; 804 bus_space_handle_t memh; 805 bus_size_t memsize; 806 int acct; 807 { 808 bus_addr_t memaddr; 809 #ifdef CHIP_D_MEM_W1_SYS_START 810 bus_space_handle_t temph; 811 #endif 812 int sparse, haves, haved; 813 814 if (acct == 0) 815 return; 816 817 #ifdef EXTENT_DEBUG 818 printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize); 819 #endif 820 821 /* 822 * Find out what space we're in. 823 */ 824 sparse = ((memh >> 63) == 0); 825 826 /* 827 * Find out what address we're in in that space. 828 */ 829 haves = haved = 0; 830 if (sparse) 831 haves = __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, 832 &memaddr); 833 #ifdef CHIP_D_MEM_W1_SYS_START 834 else 835 haved = __C(CHIP,_xlate_dense_handle_to_addr)(v, memh, 836 &memaddr); 837 #endif /* CHIP_D_MEM_W1_SYS_START */ 838 839 if (!haves && !haved) 840 panic("%s: couldn't get addr from %s handle 0x%lx", 841 __S(__C(CHIP,_mem_unmap)), sparse ? "sparse" : "dense", 842 memh); 843 844 #ifdef CHIP_D_MEM_W1_SYS_START 845 /* 846 * Find out were/if that address lives in the other space. 847 */ 848 if (sparse) 849 haved = __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, 850 &temph); 851 else 852 haves = __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, 853 &temph); 854 #endif /* CHIP_D_MEM_W1_SYS_START */ 855 856 /* 857 * Free any ranges we have. 858 */ 859 #ifdef EXTENT_DEBUG 860 printf("mem: it's at 0x%lx (%sdense, %ssparse)\n", memaddr, 861 haved ? "" : "not ", haves ? "" : "not "); 862 #endif 863 #ifdef CHIP_D_MEM_W1_SYS_START 864 if (haved && extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize, 865 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 866 printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n", 867 __S(__C(CHIP,_mem_map)), memaddr, 868 memaddr + memsize - 1); 869 } 870 #endif 871 if (haves && extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize, 872 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 873 printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n", 874 __S(__C(CHIP,_mem_map)), memaddr, 875 memaddr + memsize - 1); 876 } 877 } 878 879 int 880 __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh) 881 void *v; 882 bus_space_handle_t memh, *nmemh; 883 bus_size_t offset, size; 884 { 885 886 *nmemh = memh + offset; 887 return (0); 888 } 889 890 int 891 __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags, 892 addrp, bshp) 893 void *v; 894 bus_addr_t rstart, rend, *addrp; 895 bus_size_t size, align, boundary; 896 int flags; 897 bus_space_handle_t *bshp; 898 { 899 900 /* XXX XXX XXX XXX XXX XXX */ 901 panic("%s not implemented", __S(__C(CHIP,_mem_alloc))); 902 } 903 904 void 905 __C(CHIP,_mem_free)(v, bsh, size) 906 void *v; 907 bus_space_handle_t bsh; 908 bus_size_t size; 909 { 910 911 /* XXX XXX XXX XXX XXX XXX */ 912 panic("%s not implemented", __S(__C(CHIP,_mem_free))); 913 } 914 915 void * 916 __C(CHIP,_mem_vaddr)(v, bsh) 917 void *v; 918 bus_space_handle_t bsh; 919 { 920 #ifdef CHIP_D_MEM_W1_SYS_START 921 /* 922 * XXX should check that the range was mapped 923 * with BUS_SPACE_MAP_LINEAR for sanity 924 */ 925 if ((bsh >> 63) != 0) 926 return ((void *)bsh); 927 #endif 928 return (0); 929 } 930 931 paddr_t 932 __C(CHIP,_mem_mmap)(v, addr, off, prot, flags) 933 void *v; 934 bus_addr_t addr; 935 off_t off; 936 int prot; 937 int flags; 938 { 939 bus_space_handle_t dh = 0, sh = 0; /* XXX -Wuninitialized */ 940 int linear = flags & BUS_SPACE_MAP_LINEAR; 941 int haved = 0, haves = 0; 942 943 #ifdef CHIP_D_MEM_W1_SYS_START 944 if (__C(CHIP,_xlate_addr_to_dense_handle)(v, addr + off, &dh)) { 945 haved = 1; 946 dh = ALPHA_K0SEG_TO_PHYS(dh); 947 } 948 #endif 949 if (__C(CHIP,_xlate_addr_to_sparse_handle)(v, addr + off, &sh)) { 950 haves = 1; 951 sh = ALPHA_K0SEG_TO_PHYS(sh); 952 } 953 954 if (linear) { 955 if (haved == 0) 956 return (-1); 957 return (alpha_btop(dh)); 958 } 959 960 if (haves == 0) 961 return (-1); 962 return (alpha_btop(sh)); 963 } 964 965 inline void 966 __C(CHIP,_mem_barrier)(v, h, o, l, f) 967 void *v; 968 bus_space_handle_t h; 969 bus_size_t o, l; 970 int f; 971 { 972 973 if ((f & BUS_SPACE_BARRIER_READ) != 0) 974 alpha_mb(); 975 else if ((f & BUS_SPACE_BARRIER_WRITE) != 0) 976 alpha_wmb(); 977 } 978 979 inline u_int8_t 980 __C(CHIP,_mem_read_1)(v, memh, off) 981 void *v; 982 bus_space_handle_t memh; 983 bus_size_t off; 984 { 985 register bus_space_handle_t tmpmemh; 986 register u_int32_t *port, val; 987 register u_int8_t rval; 988 register int offset; 989 990 alpha_mb(); 991 992 #ifdef CHIP_D_MEM_W1_SYS_START 993 if ((memh >> 63) != 0) 994 return (*(u_int8_t *)(memh + off)); 995 #endif 996 997 tmpmemh = memh + off; 998 offset = tmpmemh & 3; 999 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1000 (0 << CHIP_SIZE_SHIFT)); 1001 val = *port; 1002 rval = ((val) >> (8 * offset)) & 0xff; 1003 1004 return rval; 1005 } 1006 1007 inline u_int16_t 1008 __C(CHIP,_mem_read_2)(v, memh, off) 1009 void *v; 1010 bus_space_handle_t memh; 1011 bus_size_t off; 1012 { 1013 register bus_space_handle_t tmpmemh; 1014 register u_int32_t *port, val; 1015 register u_int16_t rval; 1016 register int offset; 1017 1018 alpha_mb(); 1019 1020 #ifdef CHIP_D_MEM_W1_SYS_START 1021 if ((memh >> 63) != 0) 1022 return (*(u_int16_t *)(memh + off)); 1023 #endif 1024 1025 tmpmemh = memh + off; 1026 offset = tmpmemh & 3; 1027 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1028 (1 << CHIP_SIZE_SHIFT)); 1029 val = *port; 1030 rval = ((val) >> (8 * offset)) & 0xffff; 1031 1032 return rval; 1033 } 1034 1035 inline u_int32_t 1036 __C(CHIP,_mem_read_4)(v, memh, off) 1037 void *v; 1038 bus_space_handle_t memh; 1039 bus_size_t off; 1040 { 1041 register bus_space_handle_t tmpmemh; 1042 register u_int32_t *port, val; 1043 register u_int32_t rval; 1044 register int offset; 1045 1046 alpha_mb(); 1047 1048 #ifdef CHIP_D_MEM_W1_SYS_START 1049 if ((memh >> 63) != 0) 1050 return (*(u_int32_t *)(memh + off)); 1051 #endif 1052 1053 tmpmemh = memh + off; 1054 offset = tmpmemh & 3; 1055 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1056 (3 << CHIP_SIZE_SHIFT)); 1057 val = *port; 1058 #if 0 1059 rval = ((val) >> (8 * offset)) & 0xffffffff; 1060 #else 1061 rval = val; 1062 #endif 1063 1064 return rval; 1065 } 1066 1067 inline u_int64_t 1068 __C(CHIP,_mem_read_8)(v, memh, off) 1069 void *v; 1070 bus_space_handle_t memh; 1071 bus_size_t off; 1072 { 1073 1074 alpha_mb(); 1075 1076 #ifdef CHIP_D_MEM_W1_SYS_START 1077 if ((memh >> 63) != 0) 1078 return (*(u_int64_t *)(memh + off)); 1079 #endif 1080 1081 /* XXX XXX XXX */ 1082 panic("%s not implemented", __S(__C(CHIP,_mem_read_8))); 1083 } 1084 1085 #define CHIP_mem_read_multi_N(BYTES,TYPE) \ 1086 void \ 1087 __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \ 1088 void *v; \ 1089 bus_space_handle_t h; \ 1090 bus_size_t o, c; \ 1091 TYPE *a; \ 1092 { \ 1093 \ 1094 while (c-- > 0) { \ 1095 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 1096 BUS_SPACE_BARRIER_READ); \ 1097 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 1098 } \ 1099 } 1100 CHIP_mem_read_multi_N(1,u_int8_t) 1101 CHIP_mem_read_multi_N(2,u_int16_t) 1102 CHIP_mem_read_multi_N(4,u_int32_t) 1103 CHIP_mem_read_multi_N(8,u_int64_t) 1104 1105 #define CHIP_mem_read_region_N(BYTES,TYPE) \ 1106 void \ 1107 __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \ 1108 void *v; \ 1109 bus_space_handle_t h; \ 1110 bus_size_t o, c; \ 1111 TYPE *a; \ 1112 { \ 1113 \ 1114 while (c-- > 0) { \ 1115 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 1116 o += sizeof *a; \ 1117 } \ 1118 } 1119 CHIP_mem_read_region_N(1,u_int8_t) 1120 CHIP_mem_read_region_N(2,u_int16_t) 1121 CHIP_mem_read_region_N(4,u_int32_t) 1122 CHIP_mem_read_region_N(8,u_int64_t) 1123 1124 inline void 1125 __C(CHIP,_mem_write_1)(v, memh, off, val) 1126 void *v; 1127 bus_space_handle_t memh; 1128 bus_size_t off; 1129 u_int8_t val; 1130 { 1131 register bus_space_handle_t tmpmemh; 1132 register u_int32_t *port, nval; 1133 register int offset; 1134 1135 #ifdef CHIP_D_MEM_W1_SYS_START 1136 if ((memh >> 63) != 0) 1137 (*(u_int8_t *)(memh + off)) = val; 1138 else 1139 #endif 1140 { 1141 tmpmemh = memh + off; 1142 offset = tmpmemh & 3; 1143 nval = val << (8 * offset); 1144 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1145 (0 << CHIP_SIZE_SHIFT)); 1146 *port = nval; 1147 } 1148 alpha_mb(); 1149 } 1150 1151 inline void 1152 __C(CHIP,_mem_write_2)(v, memh, off, val) 1153 void *v; 1154 bus_space_handle_t memh; 1155 bus_size_t off; 1156 u_int16_t val; 1157 { 1158 register bus_space_handle_t tmpmemh; 1159 register u_int32_t *port, nval; 1160 register int offset; 1161 1162 #ifdef CHIP_D_MEM_W1_SYS_START 1163 if ((memh >> 63) != 0) 1164 (*(u_int16_t *)(memh + off)) = val; 1165 else 1166 #endif 1167 { 1168 tmpmemh = memh + off; 1169 offset = tmpmemh & 3; 1170 nval = val << (8 * offset); 1171 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1172 (1 << CHIP_SIZE_SHIFT)); 1173 *port = nval; 1174 } 1175 alpha_mb(); 1176 } 1177 1178 inline void 1179 __C(CHIP,_mem_write_4)(v, memh, off, val) 1180 void *v; 1181 bus_space_handle_t memh; 1182 bus_size_t off; 1183 u_int32_t val; 1184 { 1185 register bus_space_handle_t tmpmemh; 1186 register u_int32_t *port, nval; 1187 register int offset; 1188 1189 #ifdef CHIP_D_MEM_W1_SYS_START 1190 if ((memh >> 63) != 0) 1191 (*(u_int32_t *)(memh + off)) = val; 1192 else 1193 #endif 1194 { 1195 tmpmemh = memh + off; 1196 offset = tmpmemh & 3; 1197 nval = val /*<< (8 * offset)*/; 1198 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1199 (3 << CHIP_SIZE_SHIFT)); 1200 *port = nval; 1201 } 1202 alpha_mb(); 1203 } 1204 1205 inline void 1206 __C(CHIP,_mem_write_8)(v, memh, off, val) 1207 void *v; 1208 bus_space_handle_t memh; 1209 bus_size_t off; 1210 u_int64_t val; 1211 { 1212 1213 #ifdef CHIP_D_MEM_W1_SYS_START 1214 if ((memh >> 63) != 0) 1215 (*(u_int64_t *)(memh + off)) = val; 1216 else 1217 #endif 1218 { 1219 /* XXX XXX XXX */ 1220 panic("%s not implemented", 1221 __S(__C(CHIP,_mem_write_8))); 1222 } 1223 alpha_mb(); 1224 } 1225 1226 #define CHIP_mem_write_multi_N(BYTES,TYPE) \ 1227 void \ 1228 __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \ 1229 void *v; \ 1230 bus_space_handle_t h; \ 1231 bus_size_t o, c; \ 1232 const TYPE *a; \ 1233 { \ 1234 \ 1235 while (c-- > 0) { \ 1236 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 1237 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 1238 BUS_SPACE_BARRIER_WRITE); \ 1239 } \ 1240 } 1241 CHIP_mem_write_multi_N(1,u_int8_t) 1242 CHIP_mem_write_multi_N(2,u_int16_t) 1243 CHIP_mem_write_multi_N(4,u_int32_t) 1244 CHIP_mem_write_multi_N(8,u_int64_t) 1245 1246 #define CHIP_mem_write_region_N(BYTES,TYPE) \ 1247 void \ 1248 __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \ 1249 void *v; \ 1250 bus_space_handle_t h; \ 1251 bus_size_t o, c; \ 1252 const TYPE *a; \ 1253 { \ 1254 \ 1255 while (c-- > 0) { \ 1256 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 1257 o += sizeof *a; \ 1258 } \ 1259 } 1260 CHIP_mem_write_region_N(1,u_int8_t) 1261 CHIP_mem_write_region_N(2,u_int16_t) 1262 CHIP_mem_write_region_N(4,u_int32_t) 1263 CHIP_mem_write_region_N(8,u_int64_t) 1264 1265 #define CHIP_mem_set_multi_N(BYTES,TYPE) \ 1266 void \ 1267 __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \ 1268 void *v; \ 1269 bus_space_handle_t h; \ 1270 bus_size_t o, c; \ 1271 TYPE val; \ 1272 { \ 1273 \ 1274 while (c-- > 0) { \ 1275 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 1276 __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \ 1277 BUS_SPACE_BARRIER_WRITE); \ 1278 } \ 1279 } 1280 CHIP_mem_set_multi_N(1,u_int8_t) 1281 CHIP_mem_set_multi_N(2,u_int16_t) 1282 CHIP_mem_set_multi_N(4,u_int32_t) 1283 CHIP_mem_set_multi_N(8,u_int64_t) 1284 1285 #define CHIP_mem_set_region_N(BYTES,TYPE) \ 1286 void \ 1287 __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \ 1288 void *v; \ 1289 bus_space_handle_t h; \ 1290 bus_size_t o, c; \ 1291 TYPE val; \ 1292 { \ 1293 \ 1294 while (c-- > 0) { \ 1295 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 1296 o += sizeof val; \ 1297 } \ 1298 } 1299 CHIP_mem_set_region_N(1,u_int8_t) 1300 CHIP_mem_set_region_N(2,u_int16_t) 1301 CHIP_mem_set_region_N(4,u_int32_t) 1302 CHIP_mem_set_region_N(8,u_int64_t) 1303 1304 #define CHIP_mem_copy_region_N(BYTES) \ 1305 void \ 1306 __C(__C(CHIP,_mem_copy_region_),BYTES)(v, h1, o1, h2, o2, c) \ 1307 void *v; \ 1308 bus_space_handle_t h1, h2; \ 1309 bus_size_t o1, o2, c; \ 1310 { \ 1311 bus_size_t o; \ 1312 \ 1313 if ((h1 >> 63) != 0 && (h2 >> 63) != 0) { \ 1314 memmove((void *)(h2 + o2), (void *)(h1 + o1), c * BYTES); \ 1315 return; \ 1316 } \ 1317 \ 1318 if ((h1 + o1) >= (h2 + o2)) { \ 1319 /* src after dest: copy forward */ \ 1320 for (o = 0; c != 0; c--, o += BYTES) \ 1321 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 1322 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 1323 } else { \ 1324 /* dest after src: copy backwards */ \ 1325 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 1326 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 1327 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 1328 } \ 1329 } 1330 CHIP_mem_copy_region_N(1) 1331 CHIP_mem_copy_region_N(2) 1332 CHIP_mem_copy_region_N(4) 1333 CHIP_mem_copy_region_N(8) 1334