1 /* $NetBSD: pci_swiz_bus_mem_chipdep.c,v 1.35 2000/04/17 17:30:48 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 41 * All rights reserved. 42 * 43 * Author: Chris G. Demetriou 44 * 45 * Permission to use, copy, modify and distribute this software and 46 * its documentation is hereby granted, provided that both the copyright 47 * notice and this permission notice appear in all copies of the 48 * software, derivative works or modified versions, and any portions 49 * thereof, and that both notices appear in supporting documentation. 50 * 51 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 52 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 53 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 54 * 55 * Carnegie Mellon requests users of this software to return to 56 * 57 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 58 * School of Computer Science 59 * Carnegie Mellon University 60 * Pittsburgh PA 15213-3890 61 * 62 * any improvements or extensions that they make and grant Carnegie the 63 * rights to redistribute these changes. 64 */ 65 66 /* 67 * Common PCI Chipset "bus I/O" functions, for chipsets which have to 68 * deal with only a single PCI interface chip in a machine. 69 * 70 * uses: 71 * CHIP name of the 'chip' it's being compiled for. 72 * CHIP_D_MEM_W1_SYS_START Dense Mem space base to use. 73 * CHIP_D_MEM_EX_STORE 74 * If defined, device-provided static storage area 75 * for the dense memory space extent. If this is 76 * defined, CHIP_D_MEM_EX_STORE_SIZE must also be 77 * defined. If this is not defined, a static area 78 * will be declared. 79 * CHIP_D_MEM_EX_STORE_SIZE 80 * Size of the device-provided static storage area 81 * for the dense memory space extent. 82 * CHIP_S_MEM_BASE Sparse Mem space base to use. 83 * CHIP_S_MEM_EX_STORE 84 * If defined, device-provided static storage area 85 * for the sparse memory space extent. If this is 86 * defined, CHIP_S_MEM_EX_STORE_SIZE must also be 87 * defined. If this is not defined, a static area 88 * will be declared. 89 * CHIP_S_MEM_EX_STORE_SIZE 90 * Size of the device-provided static storage area 91 * for the sparse memory space extent. 92 */ 93 94 #include <sys/extent.h> 95 96 #define __C(A,B) __CONCAT(A,B) 97 #define __S(S) __STRING(S) 98 99 /* mapping/unmapping */ 100 int __C(CHIP,_mem_map) __P((void *, bus_addr_t, bus_size_t, int, 101 bus_space_handle_t *, int)); 102 void __C(CHIP,_mem_unmap) __P((void *, bus_space_handle_t, 103 bus_size_t, int)); 104 int __C(CHIP,_mem_subregion) __P((void *, bus_space_handle_t, 105 bus_size_t, bus_size_t, bus_space_handle_t *)); 106 107 int __C(CHIP,_mem_translate) __P((void *, bus_addr_t, bus_size_t, 108 int, struct alpha_bus_space_translation *)); 109 int __C(CHIP,_mem_get_window) __P((void *, int, 110 struct alpha_bus_space_translation *)); 111 112 /* allocation/deallocation */ 113 int __C(CHIP,_mem_alloc) __P((void *, bus_addr_t, bus_addr_t, 114 bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *, 115 bus_space_handle_t *)); 116 void __C(CHIP,_mem_free) __P((void *, bus_space_handle_t, 117 bus_size_t)); 118 119 /* get kernel virtual address */ 120 void * __C(CHIP,_mem_vaddr) __P((void *, bus_space_handle_t)); 121 122 /* barrier */ 123 inline void __C(CHIP,_mem_barrier) __P((void *, bus_space_handle_t, 124 bus_size_t, bus_size_t, int)); 125 126 /* read (single) */ 127 inline u_int8_t __C(CHIP,_mem_read_1) __P((void *, bus_space_handle_t, 128 bus_size_t)); 129 inline u_int16_t __C(CHIP,_mem_read_2) __P((void *, bus_space_handle_t, 130 bus_size_t)); 131 inline u_int32_t __C(CHIP,_mem_read_4) __P((void *, bus_space_handle_t, 132 bus_size_t)); 133 inline u_int64_t __C(CHIP,_mem_read_8) __P((void *, bus_space_handle_t, 134 bus_size_t)); 135 136 /* read multiple */ 137 void __C(CHIP,_mem_read_multi_1) __P((void *, bus_space_handle_t, 138 bus_size_t, u_int8_t *, bus_size_t)); 139 void __C(CHIP,_mem_read_multi_2) __P((void *, bus_space_handle_t, 140 bus_size_t, u_int16_t *, bus_size_t)); 141 void __C(CHIP,_mem_read_multi_4) __P((void *, bus_space_handle_t, 142 bus_size_t, u_int32_t *, bus_size_t)); 143 void __C(CHIP,_mem_read_multi_8) __P((void *, bus_space_handle_t, 144 bus_size_t, u_int64_t *, bus_size_t)); 145 146 /* read region */ 147 void __C(CHIP,_mem_read_region_1) __P((void *, bus_space_handle_t, 148 bus_size_t, u_int8_t *, bus_size_t)); 149 void __C(CHIP,_mem_read_region_2) __P((void *, bus_space_handle_t, 150 bus_size_t, u_int16_t *, bus_size_t)); 151 void __C(CHIP,_mem_read_region_4) __P((void *, bus_space_handle_t, 152 bus_size_t, u_int32_t *, bus_size_t)); 153 void __C(CHIP,_mem_read_region_8) __P((void *, bus_space_handle_t, 154 bus_size_t, u_int64_t *, bus_size_t)); 155 156 /* write (single) */ 157 inline void __C(CHIP,_mem_write_1) __P((void *, bus_space_handle_t, 158 bus_size_t, u_int8_t)); 159 inline void __C(CHIP,_mem_write_2) __P((void *, bus_space_handle_t, 160 bus_size_t, u_int16_t)); 161 inline void __C(CHIP,_mem_write_4) __P((void *, bus_space_handle_t, 162 bus_size_t, u_int32_t)); 163 inline void __C(CHIP,_mem_write_8) __P((void *, bus_space_handle_t, 164 bus_size_t, u_int64_t)); 165 166 /* write multiple */ 167 void __C(CHIP,_mem_write_multi_1) __P((void *, bus_space_handle_t, 168 bus_size_t, const u_int8_t *, bus_size_t)); 169 void __C(CHIP,_mem_write_multi_2) __P((void *, bus_space_handle_t, 170 bus_size_t, const u_int16_t *, bus_size_t)); 171 void __C(CHIP,_mem_write_multi_4) __P((void *, bus_space_handle_t, 172 bus_size_t, const u_int32_t *, bus_size_t)); 173 void __C(CHIP,_mem_write_multi_8) __P((void *, bus_space_handle_t, 174 bus_size_t, const u_int64_t *, bus_size_t)); 175 176 /* write region */ 177 void __C(CHIP,_mem_write_region_1) __P((void *, bus_space_handle_t, 178 bus_size_t, const u_int8_t *, bus_size_t)); 179 void __C(CHIP,_mem_write_region_2) __P((void *, bus_space_handle_t, 180 bus_size_t, const u_int16_t *, bus_size_t)); 181 void __C(CHIP,_mem_write_region_4) __P((void *, bus_space_handle_t, 182 bus_size_t, const u_int32_t *, bus_size_t)); 183 void __C(CHIP,_mem_write_region_8) __P((void *, bus_space_handle_t, 184 bus_size_t, const u_int64_t *, bus_size_t)); 185 186 /* set multiple */ 187 void __C(CHIP,_mem_set_multi_1) __P((void *, bus_space_handle_t, 188 bus_size_t, u_int8_t, bus_size_t)); 189 void __C(CHIP,_mem_set_multi_2) __P((void *, bus_space_handle_t, 190 bus_size_t, u_int16_t, bus_size_t)); 191 void __C(CHIP,_mem_set_multi_4) __P((void *, bus_space_handle_t, 192 bus_size_t, u_int32_t, bus_size_t)); 193 void __C(CHIP,_mem_set_multi_8) __P((void *, bus_space_handle_t, 194 bus_size_t, u_int64_t, bus_size_t)); 195 196 /* set region */ 197 void __C(CHIP,_mem_set_region_1) __P((void *, bus_space_handle_t, 198 bus_size_t, u_int8_t, bus_size_t)); 199 void __C(CHIP,_mem_set_region_2) __P((void *, bus_space_handle_t, 200 bus_size_t, u_int16_t, bus_size_t)); 201 void __C(CHIP,_mem_set_region_4) __P((void *, bus_space_handle_t, 202 bus_size_t, u_int32_t, bus_size_t)); 203 void __C(CHIP,_mem_set_region_8) __P((void *, bus_space_handle_t, 204 bus_size_t, u_int64_t, bus_size_t)); 205 206 /* copy */ 207 void __C(CHIP,_mem_copy_region_1) __P((void *, bus_space_handle_t, 208 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 209 void __C(CHIP,_mem_copy_region_2) __P((void *, bus_space_handle_t, 210 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 211 void __C(CHIP,_mem_copy_region_4) __P((void *, bus_space_handle_t, 212 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 213 void __C(CHIP,_mem_copy_region_8) __P((void *, bus_space_handle_t, 214 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 215 216 #ifdef CHIP_D_MEM_W1_SYS_START 217 #ifndef CHIP_D_MEM_EX_STORE 218 static long 219 __C(CHIP,_dmem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 220 #define CHIP_D_MEM_EX_STORE(v) (__C(CHIP,_dmem_ex_storage)) 221 #define CHIP_D_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_dmem_ex_storage)) 222 #endif 223 #endif /* CHIP_D_MEM_W1_SYS_START */ 224 225 #ifndef CHIP_S_MEM_EX_STORE 226 static long 227 __C(CHIP,_smem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 228 #define CHIP_S_MEM_EX_STORE(v) (__C(CHIP,_smem_ex_storage)) 229 #define CHIP_S_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_smem_ex_storage)) 230 #endif 231 232 #ifndef CHIP_ADDR_SHIFT 233 #define CHIP_ADDR_SHIFT 5 234 #endif 235 236 #ifndef CHIP_SIZE_SHIFT 237 #define CHIP_SIZE_SHIFT 3 238 #endif 239 240 void 241 __C(CHIP,_bus_mem_init)(t, v) 242 bus_space_tag_t t; 243 void *v; 244 { 245 #ifdef CHIP_D_MEM_W1_SYS_START 246 struct extent *dex; 247 #endif 248 struct extent *sex; 249 250 /* 251 * Initialize the bus space tag. 252 */ 253 254 /* cookie */ 255 t->abs_cookie = v; 256 257 /* mapping/unmapping */ 258 t->abs_map = __C(CHIP,_mem_map); 259 t->abs_unmap = __C(CHIP,_mem_unmap); 260 t->abs_subregion = __C(CHIP,_mem_subregion); 261 262 t->abs_translate = __C(CHIP,_mem_translate); 263 t->abs_get_window = __C(CHIP,_mem_get_window); 264 265 /* allocation/deallocation */ 266 t->abs_alloc = __C(CHIP,_mem_alloc); 267 t->abs_free = __C(CHIP,_mem_free); 268 269 /* get kernel virtual address */ 270 t->abs_vaddr = __C(CHIP,_mem_vaddr); 271 272 /* barrier */ 273 t->abs_barrier = __C(CHIP,_mem_barrier); 274 275 /* read (single) */ 276 t->abs_r_1 = __C(CHIP,_mem_read_1); 277 t->abs_r_2 = __C(CHIP,_mem_read_2); 278 t->abs_r_4 = __C(CHIP,_mem_read_4); 279 t->abs_r_8 = __C(CHIP,_mem_read_8); 280 281 /* read multiple */ 282 t->abs_rm_1 = __C(CHIP,_mem_read_multi_1); 283 t->abs_rm_2 = __C(CHIP,_mem_read_multi_2); 284 t->abs_rm_4 = __C(CHIP,_mem_read_multi_4); 285 t->abs_rm_8 = __C(CHIP,_mem_read_multi_8); 286 287 /* read region */ 288 t->abs_rr_1 = __C(CHIP,_mem_read_region_1); 289 t->abs_rr_2 = __C(CHIP,_mem_read_region_2); 290 t->abs_rr_4 = __C(CHIP,_mem_read_region_4); 291 t->abs_rr_8 = __C(CHIP,_mem_read_region_8); 292 293 /* write (single) */ 294 t->abs_w_1 = __C(CHIP,_mem_write_1); 295 t->abs_w_2 = __C(CHIP,_mem_write_2); 296 t->abs_w_4 = __C(CHIP,_mem_write_4); 297 t->abs_w_8 = __C(CHIP,_mem_write_8); 298 299 /* write multiple */ 300 t->abs_wm_1 = __C(CHIP,_mem_write_multi_1); 301 t->abs_wm_2 = __C(CHIP,_mem_write_multi_2); 302 t->abs_wm_4 = __C(CHIP,_mem_write_multi_4); 303 t->abs_wm_8 = __C(CHIP,_mem_write_multi_8); 304 305 /* write region */ 306 t->abs_wr_1 = __C(CHIP,_mem_write_region_1); 307 t->abs_wr_2 = __C(CHIP,_mem_write_region_2); 308 t->abs_wr_4 = __C(CHIP,_mem_write_region_4); 309 t->abs_wr_8 = __C(CHIP,_mem_write_region_8); 310 311 /* set multiple */ 312 t->abs_sm_1 = __C(CHIP,_mem_set_multi_1); 313 t->abs_sm_2 = __C(CHIP,_mem_set_multi_2); 314 t->abs_sm_4 = __C(CHIP,_mem_set_multi_4); 315 t->abs_sm_8 = __C(CHIP,_mem_set_multi_8); 316 317 /* set region */ 318 t->abs_sr_1 = __C(CHIP,_mem_set_region_1); 319 t->abs_sr_2 = __C(CHIP,_mem_set_region_2); 320 t->abs_sr_4 = __C(CHIP,_mem_set_region_4); 321 t->abs_sr_8 = __C(CHIP,_mem_set_region_8); 322 323 /* copy */ 324 t->abs_c_1 = __C(CHIP,_mem_copy_region_1); 325 t->abs_c_2 = __C(CHIP,_mem_copy_region_2); 326 t->abs_c_4 = __C(CHIP,_mem_copy_region_4); 327 t->abs_c_8 = __C(CHIP,_mem_copy_region_8); 328 329 #ifdef CHIP_D_MEM_W1_SYS_START 330 /* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */ 331 dex = extent_create(__S(__C(CHIP,_bus_dmem)), 0x0UL, 332 0xffffffffffffffffUL, M_DEVBUF, 333 (caddr_t)CHIP_D_MEM_EX_STORE(v), CHIP_D_MEM_EX_STORE_SIZE(v), 334 EX_NOWAIT); 335 extent_alloc_region(dex, 0, 0xffffffffffffffffUL, EX_NOWAIT); 336 337 #ifdef CHIP_D_MEM_W1_BUS_START 338 #ifdef EXTENT_DEBUG 339 printf("dmem: freeing from 0x%lx to 0x%lx\n", 340 CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v)); 341 #endif 342 extent_free(dex, CHIP_D_MEM_W1_BUS_START(v), 343 CHIP_D_MEM_W1_BUS_END(v) - CHIP_D_MEM_W1_BUS_START(v) + 1, 344 EX_NOWAIT); 345 #endif 346 347 #ifdef EXTENT_DEBUG 348 extent_print(dex); 349 #endif 350 CHIP_D_MEM_EXTENT(v) = dex; 351 #endif /* CHIP_D_MEM_W1_SYS_START */ 352 353 /* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */ 354 sex = extent_create(__S(__C(CHIP,_bus_smem)), 0x0UL, 355 0xffffffffffffffffUL, M_DEVBUF, 356 (caddr_t)CHIP_S_MEM_EX_STORE(v), CHIP_S_MEM_EX_STORE_SIZE(v), 357 EX_NOWAIT); 358 extent_alloc_region(sex, 0, 0xffffffffffffffffUL, EX_NOWAIT); 359 360 #ifdef CHIP_S_MEM_W1_BUS_START 361 #ifdef EXTENT_DEBUG 362 printf("smem: freeing from 0x%lx to 0x%lx\n", 363 CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v)); 364 #endif 365 extent_free(sex, CHIP_S_MEM_W1_BUS_START(v), 366 CHIP_S_MEM_W1_BUS_END(v) - CHIP_S_MEM_W1_BUS_START(v) + 1, 367 EX_NOWAIT); 368 #endif 369 #ifdef CHIP_S_MEM_W2_BUS_START 370 if (CHIP_S_MEM_W2_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v)) { 371 #ifdef EXTENT_DEBUG 372 printf("smem: freeing from 0x%lx to 0x%lx\n", 373 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 374 #endif 375 extent_free(sex, CHIP_S_MEM_W2_BUS_START(v), 376 CHIP_S_MEM_W2_BUS_END(v) - CHIP_S_MEM_W2_BUS_START(v) + 1, 377 EX_NOWAIT); 378 } else { 379 #ifdef EXTENT_DEBUG 380 printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n", 381 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 382 #endif 383 } 384 #endif 385 #ifdef CHIP_S_MEM_W3_BUS_START 386 if (CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v) && 387 CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W2_BUS_START(v)) { 388 #ifdef EXTENT_DEBUG 389 printf("smem: freeing from 0x%lx to 0x%lx\n", 390 CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v)); 391 #endif 392 extent_free(sex, CHIP_S_MEM_W3_BUS_START(v), 393 CHIP_S_MEM_W3_BUS_END(v) - CHIP_S_MEM_W3_BUS_START(v) + 1, 394 EX_NOWAIT); 395 } else { 396 #ifdef EXTENT_DEBUG 397 printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n", 398 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 399 #endif 400 } 401 #endif 402 403 #ifdef EXTENT_DEBUG 404 extent_print(sex); 405 #endif 406 CHIP_S_MEM_EXTENT(v) = sex; 407 } 408 409 #ifdef CHIP_D_MEM_W1_SYS_START 410 static int __C(CHIP,_xlate_addr_to_dense_handle) __P((void *, 411 bus_addr_t, bus_space_handle_t *)); 412 static int __C(CHIP,_xlate_dense_handle_to_addr) __P((void *, 413 bus_space_handle_t, bus_addr_t *)); 414 #endif /* CHIP_D_MEM_W1_SYS_START */ 415 static int __C(CHIP,_xlate_addr_to_sparse_handle) __P((void *, 416 bus_addr_t, bus_space_handle_t *)); 417 static int __C(CHIP,_xlate_sparse_handle_to_addr) __P((void *, 418 bus_space_handle_t, bus_addr_t *)); 419 420 #ifdef CHIP_D_MEM_W1_SYS_START 421 static int 422 __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, memhp) 423 void *v; 424 bus_addr_t memaddr; 425 bus_space_handle_t *memhp; 426 { 427 #ifdef CHIP_D_MEM_W1_BUS_START 428 if (memaddr >= CHIP_D_MEM_W1_BUS_START(v) && 429 memaddr <= CHIP_D_MEM_W1_BUS_END(v)) { 430 if (memhp != NULL) 431 *memhp = 432 ALPHA_PHYS_TO_K0SEG(CHIP_D_MEM_W1_SYS_START(v)) + 433 (memaddr - CHIP_D_MEM_W1_BUS_START(v)); 434 return (1); 435 } else 436 #endif 437 return (0); 438 } 439 440 static int 441 __C(CHIP,_xlate_dense_handle_to_addr)(v, memh, memaddrp) 442 void *v; 443 bus_space_handle_t memh; 444 bus_addr_t *memaddrp; 445 { 446 447 memh = ALPHA_K0SEG_TO_PHYS(memh); 448 449 #ifdef CHIP_D_MEM_W1_BUS_START 450 if (memh >= CHIP_D_MEM_W1_SYS_START(v) && 451 memh <= CHIP_D_MEM_W1_SYS_END(v)) { 452 *memaddrp = CHIP_D_MEM_W1_BUS_START(v) + 453 (memh - CHIP_D_MEM_W1_SYS_START(v)); 454 return (1); 455 } else 456 #endif 457 return (0); 458 } 459 #endif /* CHIP_D_MEM_W1_SYS_START */ 460 461 static int 462 __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp) 463 void *v; 464 bus_addr_t memaddr; 465 bus_space_handle_t *memhp; 466 { 467 468 #ifdef CHIP_S_MEM_W1_BUS_START 469 if (memaddr >= CHIP_S_MEM_W1_BUS_START(v) && 470 memaddr <= CHIP_S_MEM_W1_BUS_END(v)) { 471 if (memhp != NULL) 472 *memhp = 473 (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_SYS_START(v)) >> 474 CHIP_ADDR_SHIFT) + 475 (memaddr - CHIP_S_MEM_W1_BUS_START(v)); 476 return (1); 477 } else 478 #endif 479 #ifdef CHIP_S_MEM_W2_BUS_START 480 if (memaddr >= CHIP_S_MEM_W2_BUS_START(v) && 481 memaddr <= CHIP_S_MEM_W2_BUS_END(v)) { 482 if (memhp != NULL) 483 *memhp = 484 (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_SYS_START(v)) >> 485 CHIP_ADDR_SHIFT) + 486 (memaddr - CHIP_S_MEM_W2_BUS_START(v)); 487 return (1); 488 } else 489 #endif 490 #ifdef CHIP_S_MEM_W3_BUS_START 491 if (memaddr >= CHIP_S_MEM_W3_BUS_START(v) && 492 memaddr <= CHIP_S_MEM_W3_BUS_END(v)) { 493 if (memhp != NULL) 494 *memhp = 495 (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_SYS_START(v)) >> 496 CHIP_ADDR_SHIFT) + 497 (memaddr - CHIP_S_MEM_W3_BUS_START(v)); 498 return (1); 499 } else 500 #endif 501 return (0); 502 } 503 504 static int 505 __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, memaddrp) 506 void *v; 507 bus_space_handle_t memh; 508 bus_addr_t *memaddrp; 509 { 510 511 memh = ALPHA_K0SEG_TO_PHYS(memh << CHIP_ADDR_SHIFT) >> CHIP_ADDR_SHIFT; 512 513 #ifdef CHIP_S_MEM_W1_BUS_START 514 if ((memh << CHIP_ADDR_SHIFT) >= CHIP_S_MEM_W1_SYS_START(v) && 515 (memh << CHIP_ADDR_SHIFT) <= CHIP_S_MEM_W1_SYS_END(v)) { 516 *memaddrp = CHIP_S_MEM_W1_BUS_START(v) + 517 (memh - (CHIP_S_MEM_W1_SYS_START(v) >> CHIP_ADDR_SHIFT)); 518 return (1); 519 } else 520 #endif 521 #ifdef CHIP_S_MEM_W2_BUS_START 522 if ((memh << CHIP_ADDR_SHIFT) >= CHIP_S_MEM_W2_SYS_START(v) && 523 (memh << CHIP_ADDR_SHIFT) <= CHIP_S_MEM_W2_SYS_END(v)) { 524 *memaddrp = CHIP_S_MEM_W2_BUS_START(v) + 525 (memh - (CHIP_S_MEM_W2_SYS_START(v) >> CHIP_ADDR_SHIFT)); 526 return (1); 527 } else 528 #endif 529 #ifdef CHIP_S_MEM_W3_BUS_START 530 if ((memh << CHIP_ADDR_SHIFT) >= CHIP_S_MEM_W3_SYS_START(v) && 531 (memh << CHIP_ADDR_SHIFT) <= CHIP_S_MEM_W3_SYS_END(v)) { 532 *memaddrp = CHIP_S_MEM_W3_BUS_START(v) + 533 (memh - (CHIP_S_MEM_W3_SYS_START(v) >> CHIP_ADDR_SHIFT)); 534 return (1); 535 } else 536 #endif 537 return (0); 538 } 539 540 int 541 __C(CHIP,_mem_translate)(v, memaddr, memlen, flags, abst) 542 void *v; 543 bus_addr_t memaddr; 544 bus_size_t memlen; 545 int flags; 546 struct alpha_bus_space_translation *abst; 547 { 548 549 /* XXX */ 550 return (EOPNOTSUPP); 551 } 552 553 int 554 __C(CHIP,_mem_get_window)(v, window, abst) 555 void *v; 556 int window; 557 struct alpha_bus_space_translation *abst; 558 { 559 560 #ifdef CHIP_D_MEM_W1_BUS_START 561 #define FIRST_SPARSE 1 562 #else 563 #define FIRST_SPARSE 0 564 #endif 565 566 switch (window) { 567 #ifdef CHIP_D_MEM_W1_BUS_START 568 case 0: 569 abst->abst_bus_start = CHIP_D_MEM_W1_BUS_START(v); 570 abst->abst_bus_end = CHIP_D_MEM_W1_BUS_END(v); 571 abst->abst_sys_start = CHIP_D_MEM_W1_SYS_START(v); 572 abst->abst_sys_end = CHIP_D_MEM_W1_SYS_END(v); 573 abst->abst_addr_shift = CHIP_ADDR_SHIFT; 574 abst->abst_size_shift = CHIP_SIZE_SHIFT; 575 abst->abst_flags = ABST_DENSE; 576 break; 577 #endif 578 579 #ifdef CHIP_S_MEM_W1_BUS_START 580 case (FIRST_SPARSE): 581 abst->abst_bus_start = CHIP_S_MEM_W1_BUS_START(v); 582 abst->abst_bus_end = CHIP_S_MEM_W1_BUS_END(v); 583 abst->abst_sys_start = CHIP_S_MEM_W1_SYS_START(v); 584 abst->abst_sys_end = CHIP_S_MEM_W1_SYS_END(v); 585 abst->abst_addr_shift = CHIP_ADDR_SHIFT; 586 abst->abst_size_shift = CHIP_SIZE_SHIFT; 587 abst->abst_flags = 0; 588 break; 589 #endif 590 591 #ifdef CHIP_S_MEM_W2_BUS_START 592 case (FIRST_SPARSE + 1): 593 abst->abst_bus_start = CHIP_S_MEM_W2_BUS_START(v); 594 abst->abst_bus_end = CHIP_S_MEM_W2_BUS_END(v); 595 abst->abst_sys_start = CHIP_S_MEM_W2_SYS_START(v); 596 abst->abst_sys_end = CHIP_S_MEM_W2_SYS_END(v); 597 abst->abst_addr_shift = CHIP_ADDR_SHIFT; 598 abst->abst_size_shift = CHIP_SIZE_SHIFT; 599 abst->abst_flags = 0; 600 break; 601 #endif 602 603 #ifdef CHIP_S_MEM_W3_BUS_START 604 case (FIRST_SPARSE + 2): 605 abst->abst_bus_start = CHIP_S_MEM_W3_BUS_START(v); 606 abst->abst_bus_end = CHIP_S_MEM_W3_BUS_END(v); 607 abst->abst_sys_start = CHIP_S_MEM_W3_SYS_START(v); 608 abst->abst_sys_end = CHIP_S_MEM_W3_SYS_END(v); 609 abst->abst_addr_shift = CHIP_ADDR_SHIFT; 610 abst->abst_size_shift = CHIP_SIZE_SHIFT; 611 abst->abst_flags = 0; 612 break; 613 #endif 614 } 615 616 #undef FIRST_SPARSE 617 618 return (0); 619 } 620 621 int 622 __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct) 623 void *v; 624 bus_addr_t memaddr; 625 bus_size_t memsize; 626 int flags; 627 bus_space_handle_t *memhp; 628 int acct; 629 { 630 bus_space_handle_t dh = 0, sh = 0; /* XXX -Wuninitialized */ 631 int didd, dids, errord, errors, mustd, musts; 632 int prefectchable = flags & BUS_SPACE_MAP_PREFETCHABLE; 633 int linear = flags & BUS_SPACE_MAP_LINEAR; 634 635 /* 636 * XXX Too hairy to not do accounting in this space. Nothing 637 * XXX much uses this anyhow (only ISA PnP does, and only via 638 * XXX a machine-dependent hook), so we don't have to care. 639 */ 640 if (acct == 0) 641 return (EOPNOTSUPP); 642 643 #ifdef CHIP_D_MEM_W1_SYS_START 644 mustd = 1; 645 if (!__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, NULL)) { 646 /* 647 * This address isn't mapped into dense space; don't 648 * require it. 649 */ 650 mustd = 0; 651 } 652 #else 653 mustd = 0; 654 #endif 655 656 /* No prefectchable space without dense. */ 657 if (mustd == 0) 658 prefectchable = 0; 659 660 /* 661 * We must have dense space to map memory linearly. 662 */ 663 if (linear && !prefectchable) 664 return (EOPNOTSUPP); 665 666 musts = (prefectchable == 0); 667 if (!__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, NULL)) { 668 /* 669 * This address isn't mapped into sparse space; don't 670 * require it. 671 */ 672 musts = 0; 673 } 674 675 /* 676 * If this address isn't mapped into dense or sparse, we lose. 677 */ 678 if (mustd == 0 && musts == 0) { 679 #ifdef EXTENT_DEBUG 680 printf("mem: address 0x%lx not in dense or sparse space\n", 681 memaddr); 682 #endif 683 return (EINVAL); 684 } 685 686 #ifdef EXTENT_DEBUG 687 printf("mem: allocating 0x%lx to 0x%lx\n", memaddr, 688 memaddr + memsize - 1); 689 printf("mem: %s dense, %s sparse\n", mustd ? "need" : "want", 690 musts ? "need" : "want"); 691 #endif 692 #ifdef CHIP_D_MEM_W1_SYS_START 693 errord = extent_alloc_region(CHIP_D_MEM_EXTENT(v), memaddr, memsize, 694 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 695 #else 696 errord = EINVAL; 697 #endif 698 didd = (errord == 0); 699 errors = extent_alloc_region(CHIP_S_MEM_EXTENT(v), memaddr, memsize, 700 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 701 dids = (errors == 0); 702 703 #ifdef EXTENT_DEBUG 704 if (!didd) 705 printf("mem: failed to get dense (%d)\n", errord); 706 if (!dids) 707 printf("mem: failed to get sparse (%d)\n", errors); 708 #endif 709 710 if ((mustd && !didd) || (musts && !dids)) 711 goto bad; 712 713 #ifdef CHIP_D_MEM_W1_SYS_START 714 if (didd && !__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, &dh)) { 715 printf("\n"); 716 #ifdef CHIP_D_MEM_W1_BUS_START 717 printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 718 CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v)); 719 #endif 720 panic("%s: don't know how to map %lx prefectchable", 721 __S(__C(CHIP,_mem_map)), memaddr); 722 } 723 #endif /* CHIP_D_MEM_W1_SYS_START */ 724 725 if (dids && !__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, &sh)) { 726 printf("\n"); 727 #ifdef CHIP_S_MEM_W1_BUS_START 728 printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 729 CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v)); 730 #endif 731 #ifdef CHIP_S_MEM_W2_BUS_START 732 printf("%s: window[2]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 733 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 734 #endif 735 #ifdef CHIP_S_MEM_W3_BUS_START 736 printf("%s: window[3]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 737 CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v)); 738 #endif 739 panic("%s: don't know how to map %lx non-prefectchable", 740 __S(__C(CHIP,_mem_map)), memaddr); 741 } 742 743 if (prefectchable) 744 *memhp = dh; 745 else 746 *memhp = sh; 747 return (0); 748 749 bad: 750 #ifdef EXTENT_DEBUG 751 printf("mem: failed\n"); 752 #endif 753 #ifdef CHIP_D_MEM_W1_SYS_START 754 if (didd) { 755 #ifdef EXTENT_DEBUG 756 printf("mem: freeing dense\n"); 757 #endif 758 if (extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize, 759 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 760 printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n", 761 __S(__C(CHIP,_mem_map)), memaddr, 762 memaddr + memsize - 1); 763 } 764 } 765 #endif /* CHIP_D_MEM_W1_SYS_START */ 766 if (dids) { 767 #ifdef EXTENT_DEBUG 768 printf("mem: freeing sparse\n"); 769 #endif 770 if (extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize, 771 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 772 printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n", 773 __S(__C(CHIP,_mem_map)), memaddr, 774 memaddr + memsize - 1); 775 } 776 } 777 778 #ifdef EXTENT_DEBUG 779 #ifdef CHIP_D_MEM_W1_SYS_START 780 extent_print(CHIP_D_MEM_EXTENT(v)); 781 #endif 782 extent_print(CHIP_S_MEM_EXTENT(v)); 783 #endif 784 785 /* 786 * return dense error if we needed it but couldn't get it, else 787 * sparse error. The error _has_ to be one of the two... 788 */ 789 return (mustd && !didd ? errord : (musts && !dids ? errors : EINVAL)); 790 } 791 792 void 793 __C(CHIP,_mem_unmap)(v, memh, memsize, acct) 794 void *v; 795 bus_space_handle_t memh; 796 bus_size_t memsize; 797 int acct; 798 { 799 bus_addr_t memaddr; 800 #ifdef CHIP_D_MEM_W1_SYS_START 801 bus_space_handle_t temph; 802 #endif 803 int sparse, haves, haved; 804 805 if (acct == 0) 806 return; 807 808 #ifdef EXTENT_DEBUG 809 printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize); 810 #endif 811 812 /* 813 * Find out what space we're in. 814 */ 815 sparse = ((memh >> 63) == 0); 816 817 /* 818 * Find out what address we're in in that space. 819 */ 820 haves = haved = 0; 821 if (sparse) 822 haves = __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, 823 &memaddr); 824 #ifdef CHIP_D_MEM_W1_SYS_START 825 else 826 haved = __C(CHIP,_xlate_dense_handle_to_addr)(v, memh, 827 &memaddr); 828 #endif /* CHIP_D_MEM_W1_SYS_START */ 829 830 if (!haves && !haved) 831 panic("%s: couldn't get addr from %s handle 0x%lx", 832 __S(__C(CHIP,_mem_unmap)), sparse ? "sparse" : "dense", 833 memh); 834 835 #ifdef CHIP_D_MEM_W1_SYS_START 836 /* 837 * Find out were/if that address lives in the other space. 838 */ 839 if (sparse) 840 haved = __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, 841 &temph); 842 else 843 haves = __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, 844 &temph); 845 #endif /* CHIP_D_MEM_W1_SYS_START */ 846 847 /* 848 * Free any ranges we have. 849 */ 850 #ifdef EXTENT_DEBUG 851 printf("mem: it's at 0x%lx (%sdense, %ssparse)\n", memaddr, 852 haved ? "" : "not ", haves ? "" : "not "); 853 #endif 854 #ifdef CHIP_D_MEM_W1_SYS_START 855 if (haved && extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize, 856 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 857 printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n", 858 __S(__C(CHIP,_mem_map)), memaddr, 859 memaddr + memsize - 1); 860 } 861 #endif 862 if (haves && extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize, 863 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 864 printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n", 865 __S(__C(CHIP,_mem_map)), memaddr, 866 memaddr + memsize - 1); 867 } 868 } 869 870 int 871 __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh) 872 void *v; 873 bus_space_handle_t memh, *nmemh; 874 bus_size_t offset, size; 875 { 876 877 *nmemh = memh + offset; 878 return (0); 879 } 880 881 int 882 __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags, 883 addrp, bshp) 884 void *v; 885 bus_addr_t rstart, rend, *addrp; 886 bus_size_t size, align, boundary; 887 int flags; 888 bus_space_handle_t *bshp; 889 { 890 891 /* XXX XXX XXX XXX XXX XXX */ 892 panic("%s not implemented", __S(__C(CHIP,_mem_alloc))); 893 } 894 895 void 896 __C(CHIP,_mem_free)(v, bsh, size) 897 void *v; 898 bus_space_handle_t bsh; 899 bus_size_t size; 900 { 901 902 /* XXX XXX XXX XXX XXX XXX */ 903 panic("%s not implemented", __S(__C(CHIP,_mem_free))); 904 } 905 906 void * 907 __C(CHIP,_mem_vaddr)(v, bsh) 908 void *v; 909 bus_space_handle_t bsh; 910 { 911 #ifdef CHIP_D_MEM_W1_SYS_START 912 /* 913 * XXX should check that the range was mapped 914 * with BUS_SPACE_MAP_LINEAR for sanity 915 */ 916 if ((bsh >> 63) != 0) 917 return ((void *)bsh); 918 #endif 919 return (0); 920 } 921 922 inline void 923 __C(CHIP,_mem_barrier)(v, h, o, l, f) 924 void *v; 925 bus_space_handle_t h; 926 bus_size_t o, l; 927 int f; 928 { 929 930 if ((f & BUS_SPACE_BARRIER_READ) != 0) 931 alpha_mb(); 932 else if ((f & BUS_SPACE_BARRIER_WRITE) != 0) 933 alpha_wmb(); 934 } 935 936 inline u_int8_t 937 __C(CHIP,_mem_read_1)(v, memh, off) 938 void *v; 939 bus_space_handle_t memh; 940 bus_size_t off; 941 { 942 register bus_space_handle_t tmpmemh; 943 register u_int32_t *port, val; 944 register u_int8_t rval; 945 register int offset; 946 947 alpha_mb(); 948 949 #ifdef CHIP_D_MEM_W1_SYS_START 950 if ((memh >> 63) != 0) 951 return (*(u_int8_t *)(memh + off)); 952 #endif 953 954 tmpmemh = memh + off; 955 offset = tmpmemh & 3; 956 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 957 (0 << CHIP_SIZE_SHIFT)); 958 val = *port; 959 rval = ((val) >> (8 * offset)) & 0xff; 960 961 return rval; 962 } 963 964 inline u_int16_t 965 __C(CHIP,_mem_read_2)(v, memh, off) 966 void *v; 967 bus_space_handle_t memh; 968 bus_size_t off; 969 { 970 register bus_space_handle_t tmpmemh; 971 register u_int32_t *port, val; 972 register u_int16_t rval; 973 register int offset; 974 975 alpha_mb(); 976 977 #ifdef CHIP_D_MEM_W1_SYS_START 978 if ((memh >> 63) != 0) 979 return (*(u_int16_t *)(memh + off)); 980 #endif 981 982 tmpmemh = memh + off; 983 offset = tmpmemh & 3; 984 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 985 (1 << CHIP_SIZE_SHIFT)); 986 val = *port; 987 rval = ((val) >> (8 * offset)) & 0xffff; 988 989 return rval; 990 } 991 992 inline u_int32_t 993 __C(CHIP,_mem_read_4)(v, memh, off) 994 void *v; 995 bus_space_handle_t memh; 996 bus_size_t off; 997 { 998 register bus_space_handle_t tmpmemh; 999 register u_int32_t *port, val; 1000 register u_int32_t rval; 1001 register int offset; 1002 1003 alpha_mb(); 1004 1005 #ifdef CHIP_D_MEM_W1_SYS_START 1006 if ((memh >> 63) != 0) 1007 return (*(u_int32_t *)(memh + off)); 1008 #endif 1009 1010 tmpmemh = memh + off; 1011 offset = tmpmemh & 3; 1012 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1013 (3 << CHIP_SIZE_SHIFT)); 1014 val = *port; 1015 #if 0 1016 rval = ((val) >> (8 * offset)) & 0xffffffff; 1017 #else 1018 rval = val; 1019 #endif 1020 1021 return rval; 1022 } 1023 1024 inline u_int64_t 1025 __C(CHIP,_mem_read_8)(v, memh, off) 1026 void *v; 1027 bus_space_handle_t memh; 1028 bus_size_t off; 1029 { 1030 1031 alpha_mb(); 1032 1033 #ifdef CHIP_D_MEM_W1_SYS_START 1034 if ((memh >> 63) != 0) 1035 return (*(u_int64_t *)(memh + off)); 1036 #endif 1037 1038 /* XXX XXX XXX */ 1039 panic("%s not implemented", __S(__C(CHIP,_mem_read_8))); 1040 } 1041 1042 #define CHIP_mem_read_multi_N(BYTES,TYPE) \ 1043 void \ 1044 __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \ 1045 void *v; \ 1046 bus_space_handle_t h; \ 1047 bus_size_t o, c; \ 1048 TYPE *a; \ 1049 { \ 1050 \ 1051 while (c-- > 0) { \ 1052 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 1053 BUS_SPACE_BARRIER_READ); \ 1054 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 1055 } \ 1056 } 1057 CHIP_mem_read_multi_N(1,u_int8_t) 1058 CHIP_mem_read_multi_N(2,u_int16_t) 1059 CHIP_mem_read_multi_N(4,u_int32_t) 1060 CHIP_mem_read_multi_N(8,u_int64_t) 1061 1062 #define CHIP_mem_read_region_N(BYTES,TYPE) \ 1063 void \ 1064 __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \ 1065 void *v; \ 1066 bus_space_handle_t h; \ 1067 bus_size_t o, c; \ 1068 TYPE *a; \ 1069 { \ 1070 \ 1071 while (c-- > 0) { \ 1072 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 1073 o += sizeof *a; \ 1074 } \ 1075 } 1076 CHIP_mem_read_region_N(1,u_int8_t) 1077 CHIP_mem_read_region_N(2,u_int16_t) 1078 CHIP_mem_read_region_N(4,u_int32_t) 1079 CHIP_mem_read_region_N(8,u_int64_t) 1080 1081 inline void 1082 __C(CHIP,_mem_write_1)(v, memh, off, val) 1083 void *v; 1084 bus_space_handle_t memh; 1085 bus_size_t off; 1086 u_int8_t val; 1087 { 1088 register bus_space_handle_t tmpmemh; 1089 register u_int32_t *port, nval; 1090 register int offset; 1091 1092 #ifdef CHIP_D_MEM_W1_SYS_START 1093 if ((memh >> 63) != 0) 1094 (*(u_int8_t *)(memh + off)) = val; 1095 else 1096 #endif 1097 { 1098 tmpmemh = memh + off; 1099 offset = tmpmemh & 3; 1100 nval = val << (8 * offset); 1101 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1102 (0 << CHIP_SIZE_SHIFT)); 1103 *port = nval; 1104 } 1105 alpha_mb(); 1106 } 1107 1108 inline void 1109 __C(CHIP,_mem_write_2)(v, memh, off, val) 1110 void *v; 1111 bus_space_handle_t memh; 1112 bus_size_t off; 1113 u_int16_t val; 1114 { 1115 register bus_space_handle_t tmpmemh; 1116 register u_int32_t *port, nval; 1117 register int offset; 1118 1119 #ifdef CHIP_D_MEM_W1_SYS_START 1120 if ((memh >> 63) != 0) 1121 (*(u_int16_t *)(memh + off)) = val; 1122 else 1123 #endif 1124 { 1125 tmpmemh = memh + off; 1126 offset = tmpmemh & 3; 1127 nval = val << (8 * offset); 1128 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1129 (1 << CHIP_SIZE_SHIFT)); 1130 *port = nval; 1131 } 1132 alpha_mb(); 1133 } 1134 1135 inline void 1136 __C(CHIP,_mem_write_4)(v, memh, off, val) 1137 void *v; 1138 bus_space_handle_t memh; 1139 bus_size_t off; 1140 u_int32_t val; 1141 { 1142 register bus_space_handle_t tmpmemh; 1143 register u_int32_t *port, nval; 1144 register int offset; 1145 1146 #ifdef CHIP_D_MEM_W1_SYS_START 1147 if ((memh >> 63) != 0) 1148 (*(u_int32_t *)(memh + off)) = val; 1149 else 1150 #endif 1151 { 1152 tmpmemh = memh + off; 1153 offset = tmpmemh & 3; 1154 nval = val /*<< (8 * offset)*/; 1155 port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) | 1156 (3 << CHIP_SIZE_SHIFT)); 1157 *port = nval; 1158 } 1159 alpha_mb(); 1160 } 1161 1162 inline void 1163 __C(CHIP,_mem_write_8)(v, memh, off, val) 1164 void *v; 1165 bus_space_handle_t memh; 1166 bus_size_t off; 1167 u_int64_t val; 1168 { 1169 1170 #ifdef CHIP_D_MEM_W1_SYS_START 1171 if ((memh >> 63) != 0) 1172 (*(u_int64_t *)(memh + off)) = val; 1173 else 1174 #endif 1175 { 1176 /* XXX XXX XXX */ 1177 panic("%s not implemented", 1178 __S(__C(CHIP,_mem_write_8))); 1179 } 1180 alpha_mb(); 1181 } 1182 1183 #define CHIP_mem_write_multi_N(BYTES,TYPE) \ 1184 void \ 1185 __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \ 1186 void *v; \ 1187 bus_space_handle_t h; \ 1188 bus_size_t o, c; \ 1189 const TYPE *a; \ 1190 { \ 1191 \ 1192 while (c-- > 0) { \ 1193 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 1194 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 1195 BUS_SPACE_BARRIER_WRITE); \ 1196 } \ 1197 } 1198 CHIP_mem_write_multi_N(1,u_int8_t) 1199 CHIP_mem_write_multi_N(2,u_int16_t) 1200 CHIP_mem_write_multi_N(4,u_int32_t) 1201 CHIP_mem_write_multi_N(8,u_int64_t) 1202 1203 #define CHIP_mem_write_region_N(BYTES,TYPE) \ 1204 void \ 1205 __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \ 1206 void *v; \ 1207 bus_space_handle_t h; \ 1208 bus_size_t o, c; \ 1209 const TYPE *a; \ 1210 { \ 1211 \ 1212 while (c-- > 0) { \ 1213 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 1214 o += sizeof *a; \ 1215 } \ 1216 } 1217 CHIP_mem_write_region_N(1,u_int8_t) 1218 CHIP_mem_write_region_N(2,u_int16_t) 1219 CHIP_mem_write_region_N(4,u_int32_t) 1220 CHIP_mem_write_region_N(8,u_int64_t) 1221 1222 #define CHIP_mem_set_multi_N(BYTES,TYPE) \ 1223 void \ 1224 __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \ 1225 void *v; \ 1226 bus_space_handle_t h; \ 1227 bus_size_t o, c; \ 1228 TYPE val; \ 1229 { \ 1230 \ 1231 while (c-- > 0) { \ 1232 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 1233 __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \ 1234 BUS_SPACE_BARRIER_WRITE); \ 1235 } \ 1236 } 1237 CHIP_mem_set_multi_N(1,u_int8_t) 1238 CHIP_mem_set_multi_N(2,u_int16_t) 1239 CHIP_mem_set_multi_N(4,u_int32_t) 1240 CHIP_mem_set_multi_N(8,u_int64_t) 1241 1242 #define CHIP_mem_set_region_N(BYTES,TYPE) \ 1243 void \ 1244 __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \ 1245 void *v; \ 1246 bus_space_handle_t h; \ 1247 bus_size_t o, c; \ 1248 TYPE val; \ 1249 { \ 1250 \ 1251 while (c-- > 0) { \ 1252 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 1253 o += sizeof val; \ 1254 } \ 1255 } 1256 CHIP_mem_set_region_N(1,u_int8_t) 1257 CHIP_mem_set_region_N(2,u_int16_t) 1258 CHIP_mem_set_region_N(4,u_int32_t) 1259 CHIP_mem_set_region_N(8,u_int64_t) 1260 1261 #define CHIP_mem_copy_region_N(BYTES) \ 1262 void \ 1263 __C(__C(CHIP,_mem_copy_region_),BYTES)(v, h1, o1, h2, o2, c) \ 1264 void *v; \ 1265 bus_space_handle_t h1, h2; \ 1266 bus_size_t o1, o2, c; \ 1267 { \ 1268 bus_size_t o; \ 1269 \ 1270 if ((h1 >> 63) != 0 && (h2 >> 63) != 0) { \ 1271 memmove((void *)(h2 + o2), (void *)(h1 + o1), c * BYTES); \ 1272 return; \ 1273 } \ 1274 \ 1275 if ((h1 + o1) >= (h2 + o2)) { \ 1276 /* src after dest: copy forward */ \ 1277 for (o = 0; c != 0; c--, o += BYTES) \ 1278 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 1279 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 1280 } else { \ 1281 /* dest after src: copy backwards */ \ 1282 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 1283 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 1284 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 1285 } \ 1286 } 1287 CHIP_mem_copy_region_N(1) 1288 CHIP_mem_copy_region_N(2) 1289 CHIP_mem_copy_region_N(4) 1290 CHIP_mem_copy_region_N(8) 1291