1 /* $NetBSD: pci_kn8ae.c,v 1.31 2020/09/25 03:40:11 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.31 2020/09/25 03:40:11 thorpej Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/time.h> 40 #include <sys/systm.h> 41 #include <sys/errno.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/cpu.h> 45 #include <sys/syslog.h> 46 47 #include <machine/autoconf.h> 48 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcivar.h> 51 52 #include <alpha/pci/dwlpxreg.h> 53 #include <alpha/pci/dwlpxvar.h> 54 #include <alpha/pci/pci_kn8ae.h> 55 56 static int dec_kn8ae_intr_map(const struct pci_attach_args *, 57 pci_intr_handle_t *); 58 static const char *dec_kn8ae_intr_string(pci_chipset_tag_t, pci_intr_handle_t, 59 char *, size_t); 60 static const struct evcnt *dec_kn8ae_intr_evcnt(pci_chipset_tag_t, 61 pci_intr_handle_t); 62 static void *dec_kn8ae_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, 63 int, int (*func)(void *), void *); 64 static void dec_kn8ae_intr_disestablish(pci_chipset_tag_t, void *); 65 66 static uint32_t imaskcache[DWLPX_NIONODE][DWLPX_NHOSE][NHPC]; 67 68 static void kn8ae_spurious(void *, u_long); 69 static void kn8ae_enadis_intr(struct dwlpx_config *, pci_intr_handle_t, 70 int); 71 72 struct kn8ae_wrapped_pci_intr { 73 int (*ih_fn)(void *); 74 }; 75 76 static struct kn8ae_wrapped_pci_intr 77 kn8ae_wrapped_pci_intrs[SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE)] 78 __read_mostly; 79 80 static void 81 kn8ae_intr_wrapper(void *arg, u_long vec) 82 { 83 const u_long idx = SCB_VECTOIDX(vec - SCB_IOVECBASE); 84 85 KERNEL_LOCK(1, NULL); 86 kn8ae_wrapped_pci_intrs[idx].ih_fn(arg); 87 KERNEL_UNLOCK_ONE(NULL); 88 } 89 90 void 91 pci_kn8ae_pickintr(struct dwlpx_config *ccp, int first) 92 { 93 int io, hose, dev; 94 pci_chipset_tag_t pc = &ccp->cc_pc; 95 96 pc->pc_intr_v = ccp; 97 pc->pc_intr_map = dec_kn8ae_intr_map; 98 pc->pc_intr_string = dec_kn8ae_intr_string; 99 pc->pc_intr_evcnt = dec_kn8ae_intr_evcnt; 100 pc->pc_intr_establish = dec_kn8ae_intr_establish; 101 pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish; 102 103 /* Not supported on KN8AE. */ 104 pc->pc_pciide_compat_intr_establish = NULL; 105 106 if (!first) { 107 return; 108 } 109 110 for (io = 0; io < DWLPX_NIONODE; io++) { 111 for (hose = 0; hose < DWLPX_NHOSE; hose++) { 112 for (dev = 0; dev < NHPC; dev++) { 113 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT; 114 } 115 } 116 } 117 } 118 119 #define IH_MAKE(vec, dev, pin) \ 120 ((vec) | ((dev) << 16) | ((pin) << 24)) 121 122 #define IH_VEC(ih) ((ih) & 0xffff) 123 #define IH_DEV(ih) (((ih) >> 16) & 0xff) 124 #define IH_PIN(ih) (((ih) >> 24) & 0xff) 125 126 static int 127 dec_kn8ae_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 128 { 129 pcitag_t bustag = pa->pa_intrtag; 130 int buspin = pa->pa_intrpin; 131 pci_chipset_tag_t pc = pa->pa_pc; 132 int device; 133 u_long vec; 134 135 if (buspin == 0) { 136 /* No IRQ used. */ 137 return 1; 138 } 139 if (buspin < 0 || buspin > 4) { 140 printf("dec_kn8ae_intr_map: bad interrupt pin %d\n", buspin); 141 return 1; 142 } 143 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 144 145 mutex_enter(&cpu_lock); 146 vec = scb_alloc(kn8ae_spurious, NULL); 147 mutex_exit(&cpu_lock); 148 if (vec == SCB_ALLOC_FAILED) { 149 printf("dec_kn8ae_intr_map: no vector available for " 150 "device %d pin %d\n", device, buspin); 151 return 1; 152 } 153 154 alpha_pci_intr_handle_init(ihp, IH_MAKE(vec, device, buspin), 0); 155 156 return (0); 157 } 158 159 static const char * 160 dec_kn8ae_intr_string(pci_chipset_tag_t const pc __unused, 161 pci_intr_handle_t const ih, char * const buf, size_t const len) 162 { 163 const u_int ihv = alpha_pci_intr_handle_get_irq(&ih); 164 165 snprintf(buf, len, "vector 0x%x", IH_VEC(ihv)); 166 return buf; 167 } 168 169 static const struct evcnt * 170 dec_kn8ae_intr_evcnt(pci_chipset_tag_t const pc __unused, 171 pci_intr_handle_t const ih __unused) 172 { 173 174 /* XXX for now, no evcnt parent reported */ 175 return (NULL); 176 } 177 178 static void * 179 dec_kn8ae_intr_establish( 180 pci_chipset_tag_t const pc, 181 pci_intr_handle_t const ih, 182 int const level, 183 int (*func)(void *), 184 void *arg) 185 { 186 struct dwlpx_config * const ccp = pc->pc_intr_v; 187 void *cookie; 188 struct scbvec *scb; 189 u_long vec; 190 int pin, device, hpc; 191 void (*scb_func)(void *, u_long); 192 const u_int ihv = alpha_pci_intr_handle_get_irq(&ih); 193 const u_int flags = alpha_pci_intr_handle_get_flags(&ih); 194 195 device = IH_DEV(ihv); 196 pin = IH_PIN(ihv); 197 vec = IH_VEC(ihv); 198 199 mutex_enter(&cpu_lock); 200 201 scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)]; 202 203 if (scb->scb_func != kn8ae_spurious) { 204 mutex_exit(&cpu_lock); 205 printf("dec_kn8ae_intr_establish: vector 0x%lx not mapped\n", 206 vec); 207 return (NULL); 208 } 209 210 /* 211 * NOTE: The PCIA hardware doesn't support interrupt sharing, 212 * so we don't have to worry about it (in theory, at least). 213 */ 214 215 if (flags & ALPHA_INTR_MPSAFE) { 216 scb_func = (void (*)(void *, u_long))func; 217 } else { 218 kn8ae_wrapped_pci_intrs[ 219 SCB_VECTOIDX(vec - SCB_IOVECBASE)].ih_fn = func; 220 scb_func = kn8ae_intr_wrapper; 221 } 222 223 scb_set(vec, scb_func, arg); 224 225 if (device < 4) { 226 hpc = 0; 227 } else if (device < 8) { 228 device -= 4; 229 hpc = 1; 230 } else { 231 device -= 8; 232 hpc = 2; 233 } 234 235 REGVAL(PCIA_DEVVEC(hpc, device, pin) + ccp->cc_sysbase) = vec; 236 kn8ae_enadis_intr(ccp, ih, 1); 237 238 mutex_exit(&cpu_lock); 239 240 cookie = (void *) ih.value; 241 242 return (cookie); 243 } 244 245 static void 246 dec_kn8ae_intr_disestablish(pci_chipset_tag_t const pc, void * const cookie) 247 { 248 struct dwlpx_config * const ccp = pc->pc_intr_v; 249 const u_long ihv = (u_long) cookie; 250 pci_intr_handle_t ih = { .value = ihv }; 251 u_long vec; 252 253 vec = IH_VEC(ihv); 254 255 mutex_enter(&cpu_lock); 256 257 kn8ae_enadis_intr(ccp, ih, 0); 258 259 scb_free(vec); 260 261 mutex_exit(&cpu_lock); 262 } 263 264 static void 265 kn8ae_spurious(void * const arg __unused, u_long const vec) 266 { 267 printf("Spurious interrupt on temporary interrupt vector 0x%lx\n", vec); 268 } 269 270 static void 271 kn8ae_enadis_intr(struct dwlpx_config *ccp, pci_intr_handle_t ih, int onoff) 272 { 273 struct dwlpx_softc *sc = ccp->cc_sc; 274 const u_int ihv = alpha_pci_intr_handle_get_irq(&ih); 275 unsigned long paddr; 276 uint32_t val; 277 int ionode, hose, device, hpc, busp; 278 279 ionode = sc->dwlpx_node - 4; 280 hose = sc->dwlpx_hosenum; 281 282 device = IH_DEV(ihv); 283 busp = (1 << (IH_PIN(ihv) - 1)); 284 285 paddr = (1LL << 39); 286 paddr |= (unsigned long) ionode << 36; 287 paddr |= (unsigned long) hose << 34; 288 289 if (device < 4) { 290 hpc = 0; 291 } else if (device < 8) { 292 hpc = 1; 293 device -= 4; 294 } else { 295 hpc = 2; 296 device -= 8; 297 } 298 busp <<= (device << 2); 299 val = imaskcache[ionode][hose][hpc]; 300 if (onoff) 301 val |= busp; 302 else 303 val &= ~busp; 304 imaskcache[ionode][hose][hpc] = val; 305 #if 0 306 printf("kn8ae_%s_intr: ihv %x imsk 0x%x hpc %d TLSB node %d hose %d\n", 307 onoff? "enable" : "disable", ihv, val, hpc, ionode + 4, hose); 308 #endif 309 const u_long psl = alpha_pal_swpipl(ALPHA_PSL_IPL_HIGH); 310 REGVAL(PCIA_IMASK(hpc) + paddr) = val; 311 alpha_mb(); 312 alpha_pal_swpipl(psl); 313 } 314