1 /* $NetBSD: pci_eb66.c,v 1.24 2014/03/21 16:39:29 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 35 * All rights reserved. 36 * 37 * Author: Chris G. Demetriou 38 * 39 * Permission to use, copy, modify and distribute this software and 40 * its documentation is hereby granted, provided that both the copyright 41 * notice and this permission notice appear in all copies of the 42 * software, derivative works or modified versions, and any portions 43 * thereof, and that both notices appear in supporting documentation. 44 * 45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 48 * 49 * Carnegie Mellon requests users of this software to return to 50 * 51 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 52 * School of Computer Science 53 * Carnegie Mellon University 54 * Pittsburgh PA 15213-3890 55 * 56 * any improvements or extensions that they make and grant Carnegie the 57 * rights to redistribute these changes. 58 */ 59 60 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 61 62 __KERNEL_RCSID(0, "$NetBSD: pci_eb66.c,v 1.24 2014/03/21 16:39:29 christos Exp $"); 63 64 #include <sys/types.h> 65 #include <sys/param.h> 66 #include <sys/time.h> 67 #include <sys/systm.h> 68 #include <sys/errno.h> 69 #include <sys/malloc.h> 70 #include <sys/device.h> 71 #include <sys/syslog.h> 72 73 #include <machine/autoconf.h> 74 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcivar.h> 77 78 #include <alpha/pci/lcareg.h> 79 #include <alpha/pci/lcavar.h> 80 81 #include <alpha/pci/pci_eb66.h> 82 83 #include "sio.h" 84 #if NSIO 85 #include <alpha/pci/siovar.h> 86 #endif 87 88 int dec_eb66_intr_map(const struct pci_attach_args *, 89 pci_intr_handle_t *); 90 const char *dec_eb66_intr_string(void *, pci_intr_handle_t, char *, size_t); 91 const struct evcnt *dec_eb66_intr_evcnt(void *, pci_intr_handle_t); 92 void *dec_eb66_intr_establish(void *, pci_intr_handle_t, 93 int, int (*func)(void *), void *); 94 void dec_eb66_intr_disestablish(void *, void *); 95 96 #define EB66_MAX_IRQ 32 97 #define PCI_STRAY_MAX 5 98 99 struct alpha_shared_intr *eb66_pci_intr; 100 101 bus_space_tag_t eb66_intrgate_iot; 102 bus_space_handle_t eb66_intrgate_ioh; 103 104 void eb66_iointr(void *arg, unsigned long vec); 105 extern void eb66_intr_enable(int irq); /* pci_eb66_intr.S */ 106 extern void eb66_intr_disable(int irq); /* pci_eb66_intr.S */ 107 108 void 109 pci_eb66_pickintr(struct lca_config *lcp) 110 { 111 bus_space_tag_t iot = &lcp->lc_iot; 112 pci_chipset_tag_t pc = &lcp->lc_pc; 113 char *cp; 114 int i; 115 116 pc->pc_intr_v = lcp; 117 pc->pc_intr_map = dec_eb66_intr_map; 118 pc->pc_intr_string = dec_eb66_intr_string; 119 pc->pc_intr_evcnt = dec_eb66_intr_evcnt; 120 pc->pc_intr_establish = dec_eb66_intr_establish; 121 pc->pc_intr_disestablish = dec_eb66_intr_disestablish; 122 123 /* Not supported on the EB66. */ 124 pc->pc_pciide_compat_intr_establish = NULL; 125 126 eb66_intrgate_iot = iot; 127 if (bus_space_map(eb66_intrgate_iot, 0x804, 3, 0, 128 &eb66_intrgate_ioh) != 0) 129 panic("pci_eb66_pickintr: couldn't map interrupt PLD"); 130 for (i = 0; i < EB66_MAX_IRQ; i++) 131 eb66_intr_disable(i); 132 133 #define PCI_EB66_IRQ_STR 8 134 eb66_pci_intr = alpha_shared_intr_alloc(EB66_MAX_IRQ, PCI_EB66_IRQ_STR); 135 for (i = 0; i < EB66_MAX_IRQ; i++) { 136 alpha_shared_intr_set_maxstrays(eb66_pci_intr, i, 137 PCI_STRAY_MAX); 138 139 cp = alpha_shared_intr_string(eb66_pci_intr, i); 140 snprintf(cp, PCI_EB66_IRQ_STR, "irq %d", i); 141 evcnt_attach_dynamic(alpha_shared_intr_evcnt( 142 eb66_pci_intr, i), EVCNT_TYPE_INTR, NULL, 143 "eb66", cp); 144 } 145 146 #if NSIO 147 sio_intr_setup(pc, iot); 148 #endif 149 } 150 151 int 152 dec_eb66_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 153 { 154 pcitag_t bustag = pa->pa_intrtag; 155 int buspin = pa->pa_intrpin, line = pa->pa_intrline; 156 pci_chipset_tag_t pc = pa->pa_pc; 157 int bus, device, function; 158 159 if (buspin == 0) { 160 /* No IRQ used. */ 161 return 1; 162 } 163 if (buspin > 4) { 164 printf("dec_eb66_intr_map: bad interrupt pin %d\n", buspin); 165 return 1; 166 } 167 168 pci_decompose_tag(pc, bustag, &bus, &device, &function); 169 170 /* 171 * The console places the interrupt mapping in the "line" value. 172 * A value of (char)-1 indicates there is no mapping. 173 */ 174 if (line == 0xff) { 175 printf("dec_eb66_intr_map: no mapping for %d/%d/%d\n", 176 bus, device, function); 177 return (1); 178 } 179 180 if (line >= EB66_MAX_IRQ) 181 panic("dec_eb66_intr_map: eb66 irq too large (%d)", 182 line); 183 184 *ihp = line; 185 return (0); 186 } 187 188 const char * 189 dec_eb66_intr_string(void *lcv, pci_intr_handle_t ih, char *buf, size_t len) 190 { 191 if (ih >= EB66_MAX_IRQ) 192 panic("%s: bogus eb66 IRQ 0x%lx", __func__, ih); 193 snprintf(buf, len, "eb66 irq %ld", ih); 194 return buf; 195 } 196 197 const struct evcnt * 198 dec_eb66_intr_evcnt(void *lcv, pci_intr_handle_t ih) 199 { 200 201 if (ih >= EB66_MAX_IRQ) 202 panic("dec_eb66_intr_evcnt: bogus eb66 IRQ 0x%lx", ih); 203 return (alpha_shared_intr_evcnt(eb66_pci_intr, ih)); 204 } 205 206 void * 207 dec_eb66_intr_establish(void *lcv, pci_intr_handle_t ih, int level, int (*func)(void *), void *arg) 208 { 209 void *cookie; 210 211 if (ih >= EB66_MAX_IRQ) 212 panic("dec_eb66_intr_establish: bogus eb66 IRQ 0x%lx", ih); 213 214 cookie = alpha_shared_intr_establish(eb66_pci_intr, ih, IST_LEVEL, 215 level, func, arg, "eb66 irq"); 216 217 if (cookie != NULL && 218 alpha_shared_intr_firstactive(eb66_pci_intr, ih)) { 219 scb_set(0x900 + SCB_IDXTOVEC(ih), eb66_iointr, NULL, 220 level); 221 eb66_intr_enable(ih); 222 } 223 return (cookie); 224 } 225 226 void 227 dec_eb66_intr_disestablish(void *lcv, void *cookie) 228 { 229 struct alpha_shared_intrhand *ih = cookie; 230 unsigned int irq = ih->ih_num; 231 int s; 232 233 s = splhigh(); 234 235 alpha_shared_intr_disestablish(eb66_pci_intr, cookie, 236 "eb66 irq"); 237 if (alpha_shared_intr_isactive(eb66_pci_intr, irq) == 0) { 238 eb66_intr_disable(irq); 239 alpha_shared_intr_set_dfltsharetype(eb66_pci_intr, irq, 240 IST_NONE); 241 scb_free(0x900 + SCB_IDXTOVEC(irq)); 242 } 243 244 splx(s); 245 } 246 247 void 248 eb66_iointr(void *arg, unsigned long vec) 249 { 250 int irq; 251 252 irq = SCB_VECTOIDX(vec - 0x900); 253 254 if (!alpha_shared_intr_dispatch(eb66_pci_intr, irq)) { 255 alpha_shared_intr_stray(eb66_pci_intr, irq, 256 "eb66 irq"); 257 if (ALPHA_SHARED_INTR_DISABLE(eb66_pci_intr, irq)) 258 eb66_intr_disable(irq); 259 } else 260 alpha_shared_intr_reset_strays(eb66_pci_intr, irq); 261 } 262 263 #if 0 /* THIS DOES NOT WORK! see pci_eb66_intr.S. */ 264 uint8_t eb66_intr_mask[3] = { 0xff, 0xff, 0xff }; 265 266 void 267 eb66_intr_enable(int irq) 268 { 269 int byte = (irq / 8), bit = (irq % 8); 270 271 #if 1 272 printf("eb66_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit); 273 #endif 274 eb66_intr_mask[byte] &= ~(1 << bit); 275 276 bus_space_write_1(eb66_intrgate_iot, eb66_intrgate_ioh, byte, 277 eb66_intr_mask[byte]); 278 } 279 280 void 281 eb66_intr_disable(int irq) 282 { 283 int byte = (irq / 8), bit = (irq % 8); 284 285 #if 1 286 printf("eb66_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit); 287 #endif 288 eb66_intr_mask[byte] |= (1 << bit); 289 290 bus_space_write_1(eb66_intrgate_iot, eb66_intrgate_ioh, byte, 291 eb66_intr_mask[byte]); 292 } 293 #endif 294