xref: /netbsd-src/sys/arch/alpha/pci/pci_eb64plus.c (revision 10ad5ffa714ce1a679dcc9dd8159648df2d67b5a)
1 /* $NetBSD: pci_eb64plus.c,v 1.20 2009/03/16 23:11:09 dsl Exp $ */
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
35  * All rights reserved.
36  *
37  * Author: Chris G. Demetriou
38  *
39  * Permission to use, copy, modify and distribute this software and
40  * its documentation is hereby granted, provided that both the copyright
41  * notice and this permission notice appear in all copies of the
42  * software, derivative works or modified versions, and any portions
43  * thereof, and that both notices appear in supporting documentation.
44  *
45  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
46  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
47  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
48  *
49  * Carnegie Mellon requests users of this software to return to
50  *
51  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
52  *  School of Computer Science
53  *  Carnegie Mellon University
54  *  Pittsburgh PA 15213-3890
55  *
56  * any improvements or extensions that they make and grant Carnegie the
57  * rights to redistribute these changes.
58  */
59 
60 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
61 
62 __KERNEL_RCSID(0, "$NetBSD: pci_eb64plus.c,v 1.20 2009/03/16 23:11:09 dsl Exp $");
63 
64 #include <sys/types.h>
65 #include <sys/param.h>
66 #include <sys/time.h>
67 #include <sys/systm.h>
68 #include <sys/errno.h>
69 #include <sys/malloc.h>
70 #include <sys/device.h>
71 #include <sys/syslog.h>
72 
73 #include <uvm/uvm_extern.h>
74 
75 #include <machine/autoconf.h>
76 
77 #include <dev/pci/pcireg.h>
78 #include <dev/pci/pcivar.h>
79 
80 #include <alpha/pci/apecsreg.h>
81 #include <alpha/pci/apecsvar.h>
82 
83 #include <alpha/pci/pci_eb64plus.h>
84 
85 #include "sio.h"
86 #if NSIO
87 #include <alpha/pci/siovar.h>
88 #endif
89 
90 int	dec_eb64plus_intr_map(struct pci_attach_args *,
91 	    pci_intr_handle_t *);
92 const char *dec_eb64plus_intr_string(void *, pci_intr_handle_t);
93 const struct evcnt *dec_eb64plus_intr_evcnt(void *, pci_intr_handle_t);
94 void	*dec_eb64plus_intr_establish(void *, pci_intr_handle_t,
95 	    int, int (*func)(void *), void *);
96 void	dec_eb64plus_intr_disestablish(void *, void *);
97 
98 #define	EB64PLUS_MAX_IRQ	32
99 #define	PCI_STRAY_MAX		5
100 
101 struct alpha_shared_intr *eb64plus_pci_intr;
102 
103 bus_space_tag_t eb64plus_intrgate_iot;
104 bus_space_handle_t eb64plus_intrgate_ioh;
105 
106 void	eb64plus_iointr(void *arg, unsigned long vec);
107 extern void	eb64plus_intr_enable(int irq);  /* pci_eb64plus_intr.S */
108 extern void	eb64plus_intr_disable(int irq); /* pci_eb64plus_intr.S */
109 
110 void
111 pci_eb64plus_pickintr(struct apecs_config *acp)
112 {
113 	bus_space_tag_t iot = &acp->ac_iot;
114 	pci_chipset_tag_t pc = &acp->ac_pc;
115 	char *cp;
116 	int i;
117 
118         pc->pc_intr_v = acp;
119         pc->pc_intr_map = dec_eb64plus_intr_map;
120         pc->pc_intr_string = dec_eb64plus_intr_string;
121 	pc->pc_intr_evcnt = dec_eb64plus_intr_evcnt;
122         pc->pc_intr_establish = dec_eb64plus_intr_establish;
123         pc->pc_intr_disestablish = dec_eb64plus_intr_disestablish;
124 
125 	/* Not supported on the EB64+. */
126 	pc->pc_pciide_compat_intr_establish = NULL;
127 
128 	eb64plus_intrgate_iot = iot;
129 	if (bus_space_map(eb64plus_intrgate_iot, 0x804, 3, 0,
130 	    &eb64plus_intrgate_ioh) != 0)
131 		panic("pci_eb64plus_pickintr: couldn't map interrupt PLD");
132 	for (i = 0; i < EB64PLUS_MAX_IRQ; i++)
133 		eb64plus_intr_disable(i);
134 
135 	eb64plus_pci_intr = alpha_shared_intr_alloc(EB64PLUS_MAX_IRQ, 8);
136 	for (i = 0; i < EB64PLUS_MAX_IRQ; i++) {
137 		alpha_shared_intr_set_maxstrays(eb64plus_pci_intr, i,
138 			PCI_STRAY_MAX);
139 
140 		cp = alpha_shared_intr_string(eb64plus_pci_intr, i);
141 		sprintf(cp, "irq %d", i);
142 		evcnt_attach_dynamic(alpha_shared_intr_evcnt(
143 		    eb64plus_pci_intr, i), EVCNT_TYPE_INTR, NULL,
144 		    "eb64+", cp);
145 	}
146 
147 #if NSIO
148 	sio_intr_setup(pc, iot);
149 #endif
150 }
151 
152 int
153 dec_eb64plus_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
154 {
155 	pcitag_t bustag = pa->pa_intrtag;
156 	int buspin = pa->pa_intrpin, line = pa->pa_intrline;
157 	pci_chipset_tag_t pc = pa->pa_pc;
158 	int bus, device, function;
159 
160 	if (buspin == 0) {
161 		/* No IRQ used. */
162 		return 1;
163 	}
164 	if (buspin > 4) {
165 		printf("dec_eb64plus_intr_map: bad interrupt pin %d\n", buspin);
166 		return 1;
167 	}
168 
169 	pci_decompose_tag(pc, bustag, &bus, &device, &function);
170 
171 	/*
172 	 * The console places the interrupt mapping in the "line" value.
173 	 * A value of (char)-1 indicates there is no mapping.
174 	 */
175 	if (line == 0xff) {
176 		printf("dec_eb64plus_intr_map: no mapping for %d/%d/%d\n",
177 		    bus, device, function);
178 		return (1);
179 	}
180 
181 	if (line >= EB64PLUS_MAX_IRQ)
182 		panic("dec_eb64plus_intr_map: eb64+ irq too large (%d)",
183 		    line);
184 
185 	*ihp = line;
186 	return (0);
187 }
188 
189 const char *
190 dec_eb64plus_intr_string(void *acv, pci_intr_handle_t ih)
191 {
192         static char irqstr[15];          /* 11 + 2 + NULL + sanity */
193 
194         if (ih > EB64PLUS_MAX_IRQ)
195                 panic("dec_eb64plus_intr_string: bogus eb64+ IRQ 0x%lx", ih);
196         sprintf(irqstr, "eb64+ irq %ld", ih);
197         return (irqstr);
198 }
199 
200 const struct evcnt *
201 dec_eb64plus_intr_evcnt(void *acv, pci_intr_handle_t ih)
202 {
203 
204 	if (ih > EB64PLUS_MAX_IRQ)
205 		panic("dec_eb64plus_intr_string: bogus eb64+ IRQ 0x%lx", ih);
206 	return (alpha_shared_intr_evcnt(eb64plus_pci_intr, ih));
207 }
208 
209 void *
210 dec_eb64plus_intr_establish(void *acv, pci_intr_handle_t ih, int level, int (*func)(void *), void *arg)
211 {
212 	void *cookie;
213 
214 	if (ih > EB64PLUS_MAX_IRQ)
215 		panic("dec_eb64plus_intr_establish: bogus eb64+ IRQ 0x%lx",
216 		    ih);
217 
218 	cookie = alpha_shared_intr_establish(eb64plus_pci_intr, ih, IST_LEVEL,
219 	    level, func, arg, "eb64+ irq");
220 
221 	if (cookie != NULL &&
222 	    alpha_shared_intr_firstactive(eb64plus_pci_intr, ih)) {
223 		scb_set(0x900 + SCB_IDXTOVEC(ih), eb64plus_iointr, NULL,
224 		    level);
225 		eb64plus_intr_enable(ih);
226 	}
227 	return (cookie);
228 }
229 
230 void
231 dec_eb64plus_intr_disestablish(void *acv, void *cookie)
232 {
233 	struct alpha_shared_intrhand *ih = cookie;
234 	unsigned int irq = ih->ih_num;
235 	int s;
236 
237 	s = splhigh();
238 
239 	alpha_shared_intr_disestablish(eb64plus_pci_intr, cookie,
240 	    "eb64+ irq");
241 	if (alpha_shared_intr_isactive(eb64plus_pci_intr, irq) == 0) {
242 		eb64plus_intr_disable(irq);
243 		alpha_shared_intr_set_dfltsharetype(eb64plus_pci_intr, irq,
244 		    IST_NONE);
245 		scb_free(0x900 + SCB_IDXTOVEC(irq));
246 	}
247 
248 	splx(s);
249 }
250 
251 void
252 eb64plus_iointr(void *arg, unsigned long vec)
253 {
254 	int irq;
255 
256 	irq = SCB_VECTOIDX(vec - 0x900);
257 
258 	if (!alpha_shared_intr_dispatch(eb64plus_pci_intr, irq)) {
259 		alpha_shared_intr_stray(eb64plus_pci_intr, irq,
260 		    "eb64+ irq");
261 		if (ALPHA_SHARED_INTR_DISABLE(eb64plus_pci_intr, irq))
262 			eb64plus_intr_disable(irq);
263 	} else
264 		alpha_shared_intr_reset_strays(eb64plus_pci_intr, irq);
265 }
266 
267 #if 0		/* THIS DOES NOT WORK!  see pci_eb64plus_intr.S. */
268 u_int8_t eb64plus_intr_mask[3] = { 0xff, 0xff, 0xff };
269 
270 void
271 eb64plus_intr_enable(int irq)
272 {
273 	int byte = (irq / 8), bit = (irq % 8);
274 
275 #if 1
276 	printf("eb64plus_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit);
277 #endif
278 	eb64plus_intr_mask[byte] &= ~(1 << bit);
279 
280 	bus_space_write_1(eb64plus_intrgate_iot, eb64plus_intrgate_ioh, byte,
281 	    eb64plus_intr_mask[byte]);
282 }
283 
284 void
285 eb64plus_intr_disable(int irq)
286 {
287 	int byte = (irq / 8), bit = (irq % 8);
288 
289 #if 1
290 	printf("eb64plus_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit);
291 #endif
292 	eb64plus_intr_mask[byte] |= (1 << bit);
293 
294 	bus_space_write_1(eb64plus_intrgate_iot, eb64plus_intrgate_ioh, byte,
295 	    eb64plus_intr_mask[byte]);
296 }
297 #endif
298