1 /* $NetBSD: pci_2100_a50.c,v 1.41 2014/03/21 16:39:29 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.41 2014/03/21 16:39:29 christos Exp $"); 33 34 #include <sys/types.h> 35 #include <sys/param.h> 36 #include <sys/time.h> 37 #include <sys/systm.h> 38 #include <sys/errno.h> 39 #include <sys/device.h> 40 41 #include <machine/autoconf.h> 42 #include <sys/bus.h> 43 #include <machine/intr.h> 44 45 #include <dev/isa/isavar.h> 46 #include <dev/pci/pcireg.h> 47 #include <dev/pci/pcivar.h> 48 49 #include <alpha/pci/apecsvar.h> 50 51 #include <alpha/pci/pci_2100_a50.h> 52 #include <alpha/pci/siovar.h> 53 #include <alpha/pci/sioreg.h> 54 55 #include "sio.h" 56 57 int dec_2100_a50_intr_map(const struct pci_attach_args *, 58 pci_intr_handle_t *); 59 const char *dec_2100_a50_intr_string(void *, pci_intr_handle_t, char *, size_t); 60 const struct evcnt *dec_2100_a50_intr_evcnt(void *, pci_intr_handle_t); 61 void *dec_2100_a50_intr_establish(void *, pci_intr_handle_t, 62 int, int (*func)(void *), void *); 63 void dec_2100_a50_intr_disestablish(void *, void *); 64 65 #define APECS_SIO_DEVICE 7 /* XXX */ 66 67 void 68 pci_2100_a50_pickintr(struct apecs_config *acp) 69 { 70 bus_space_tag_t iot = &acp->ac_iot; 71 pci_chipset_tag_t pc = &acp->ac_pc; 72 pcireg_t sioclass; 73 int sioII; 74 75 /* XXX MAGIC NUMBER */ 76 sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG); 77 sioII = (sioclass & 0xff) >= 3; 78 79 if (!sioII) 80 printf("WARNING: SIO NOT SIO II... NO BETS...\n"); 81 82 pc->pc_intr_v = acp; 83 pc->pc_intr_map = dec_2100_a50_intr_map; 84 pc->pc_intr_string = dec_2100_a50_intr_string; 85 pc->pc_intr_evcnt = dec_2100_a50_intr_evcnt; 86 pc->pc_intr_establish = dec_2100_a50_intr_establish; 87 pc->pc_intr_disestablish = dec_2100_a50_intr_disestablish; 88 89 /* Not supported on 2100 A50. */ 90 pc->pc_pciide_compat_intr_establish = NULL; 91 92 #if NSIO 93 sio_intr_setup(pc, iot); 94 #else 95 panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)"); 96 #endif 97 } 98 99 int 100 dec_2100_a50_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 101 { 102 pcitag_t bustag = pa->pa_intrtag; 103 int buspin = pa->pa_intrpin; 104 pci_chipset_tag_t pc = pa->pa_pc; 105 int device, pirq; 106 pcireg_t pirqreg; 107 uint8_t pirqline; 108 109 #ifndef DIAGNOSTIC 110 pirq = 0; /* XXX gcc -Wuninitialized */ 111 #endif 112 113 if (buspin == 0) { 114 /* No IRQ used. */ 115 return 1; 116 } 117 if (buspin > 4) { 118 printf("dec_2100_a50_intr_map: bad interrupt pin %d\n", 119 buspin); 120 return 1; 121 } 122 123 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 124 125 switch (device) { 126 case 6: /* NCR SCSI */ 127 pirq = 3; 128 break; 129 130 case 11: /* slot 1 */ 131 case 14: /* slot 3 */ 132 switch (buspin) { 133 case PCI_INTERRUPT_PIN_A: 134 case PCI_INTERRUPT_PIN_D: 135 pirq = 0; 136 break; 137 case PCI_INTERRUPT_PIN_B: 138 pirq = 2; 139 break; 140 case PCI_INTERRUPT_PIN_C: 141 pirq = 1; 142 break; 143 #ifdef DIAGNOSTIC 144 default: /* XXX gcc -Wuninitialized */ 145 panic("dec_2100_a50_intr_map bogus PCI pin %d", 146 buspin); 147 #endif 148 }; 149 break; 150 151 case 12: /* slot 2 */ 152 switch (buspin) { 153 case PCI_INTERRUPT_PIN_A: 154 case PCI_INTERRUPT_PIN_D: 155 pirq = 1; 156 break; 157 case PCI_INTERRUPT_PIN_B: 158 pirq = 0; 159 break; 160 case PCI_INTERRUPT_PIN_C: 161 pirq = 2; 162 break; 163 #ifdef DIAGNOSTIC 164 default: /* XXX gcc -Wuninitialized */ 165 panic("dec_2100_a50_intr_map bogus PCI pin %d", 166 buspin); 167 #endif 168 }; 169 break; 170 171 case 13: /* slot 3 */ 172 switch (buspin) { 173 case PCI_INTERRUPT_PIN_A: 174 case PCI_INTERRUPT_PIN_D: 175 pirq = 2; 176 break; 177 case PCI_INTERRUPT_PIN_B: 178 pirq = 1; 179 break; 180 case PCI_INTERRUPT_PIN_C: 181 pirq = 0; 182 break; 183 #ifdef DIAGNOSTIC 184 default: /* XXX gcc -Wuninitialized */ 185 panic("dec_2100_a50_intr_map bogus PCI pin %d", 186 buspin); 187 #endif 188 }; 189 break; 190 191 default: 192 printf("dec_2100_a50_intr_map: weird device number %d\n", 193 device); 194 return 1; 195 } 196 197 pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0), 198 SIO_PCIREG_PIRQ_RTCTRL); 199 #if 0 200 printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d, reg = %x\n", 201 device, '@' + buspin, pirq, pirqreg); 202 #endif 203 pirqline = (pirqreg >> (pirq * 8)) & 0xff; 204 if ((pirqline & 0x80) != 0) 205 return 1; 206 pirqline &= 0xf; 207 208 #if 0 209 printf("pci_2100_a50_intr_map: device %d pin %c: mapped to line %d\n", 210 device, '@' + buspin, pirqline); 211 #endif 212 213 *ihp = pirqline; 214 return (0); 215 } 216 217 const char * 218 dec_2100_a50_intr_string(void *acv, pci_intr_handle_t ih, char *buf, size_t len) 219 { 220 #if 0 221 struct apecs_config *acp = acv; 222 #endif 223 224 return sio_intr_string(NULL /*XXX*/, ih, buf, len); 225 } 226 227 const struct evcnt * 228 dec_2100_a50_intr_evcnt(void *acv, pci_intr_handle_t ih) 229 { 230 #if 0 231 struct apecs_config *acp = acv; 232 #endif 233 234 return sio_intr_evcnt(NULL /*XXX*/, ih); 235 } 236 237 void * 238 dec_2100_a50_intr_establish(void *acv, pci_intr_handle_t ih, int level, int (*func)(void *), void *arg) 239 { 240 #if 0 241 struct apecs_config *acp = acv; 242 #endif 243 244 return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func, 245 arg); 246 } 247 248 void 249 dec_2100_a50_intr_disestablish(void *acv, void *cookie) 250 { 251 #if 0 252 struct apecs_config *acp = acv; 253 #endif 254 255 sio_intr_disestablish(NULL /*XXX*/, cookie); 256 } 257