xref: /netbsd-src/sys/arch/alpha/pci/pci_1000.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /* $NetBSD: pci_1000.c,v 1.26 2014/03/21 16:39:29 christos Exp $ */
2 
3 /*
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at
8  * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle
9  * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon
10  * Computer Systems, Inc.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
36  * All rights reserved.
37  *
38  * Author: Chris G. Demetriou
39  *
40  * Permission to use, copy, modify and distribute this software and
41  * its documentation is hereby granted, provided that both the copyright
42  * notice and this permission notice appear in all copies of the
43  * software, derivative works or modified versions, and any portions
44  * thereof, and that both notices appear in supporting documentation.
45  *
46  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
47  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
48  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49  *
50  * Carnegie Mellon requests users of this software to return to
51  *
52  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
53  *  School of Computer Science
54  *  Carnegie Mellon University
55  *  Pittsburgh PA 15213-3890
56  *
57  * any improvements or extensions that they make and grant Carnegie the
58  * rights to redistribute these changes.
59  */
60 
61 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
62 
63 __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.26 2014/03/21 16:39:29 christos Exp $");
64 
65 #include <sys/types.h>
66 #include <sys/param.h>
67 #include <sys/time.h>
68 #include <sys/systm.h>
69 #include <sys/errno.h>
70 #include <sys/malloc.h>
71 #include <sys/device.h>
72 #include <sys/syslog.h>
73 
74 #include <machine/autoconf.h>
75 
76 #include <dev/pci/pcireg.h>
77 #include <dev/pci/pcivar.h>
78 
79 #include <alpha/pci/pci_1000.h>
80 
81 #include "sio.h"
82 #if NSIO > 0 || NPCEB > 0
83 #include <alpha/pci/siovar.h>
84 #endif
85 
86 static bus_space_tag_t another_mystery_icu_iot;
87 static bus_space_handle_t another_mystery_icu_ioh;
88 
89 int	dec_1000_intr_map(const struct pci_attach_args *, pci_intr_handle_t *);
90 const char *dec_1000_intr_string(void *, pci_intr_handle_t, char *, size_t);
91 const struct evcnt *dec_1000_intr_evcnt(void *, pci_intr_handle_t);
92 void	*dec_1000_intr_establish(void *, pci_intr_handle_t,
93 	    int, int (*func)(void *), void *);
94 void	dec_1000_intr_disestablish(void *, void *);
95 
96 #define	PCI_NIRQ	16
97 #define	PCI_STRAY_MAX	5
98 
99 struct alpha_shared_intr *dec_1000_pci_intr;
100 
101 static void dec_1000_iointr(void *arg, unsigned long vec);
102 static void dec_1000_enable_intr(int irq);
103 static void dec_1000_disable_intr(int irq);
104 static void pci_1000_imi(void);
105 static pci_chipset_tag_t pc_tag;
106 
107 void
108 pci_1000_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, pci_chipset_tag_t pc)
109 {
110 	char *cp;
111 	int i;
112 
113 	another_mystery_icu_iot = iot;
114 
115 	pc_tag = pc;
116 	if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh))
117 		panic("pci_1000_pickintr");
118 	pc->pc_intr_v = core;
119 	pc->pc_intr_map = dec_1000_intr_map;
120 	pc->pc_intr_string = dec_1000_intr_string;
121 	pc->pc_intr_evcnt = dec_1000_intr_evcnt;
122 	pc->pc_intr_establish = dec_1000_intr_establish;
123 	pc->pc_intr_disestablish = dec_1000_intr_disestablish;
124 
125 	pc->pc_pciide_compat_intr_establish = NULL;
126 
127 #define PCI_1000_IRQ_STR 8
128 	dec_1000_pci_intr =
129 	    alpha_shared_intr_alloc(PCI_NIRQ, PCI_1000_IRQ_STR);
130 	for (i = 0; i < PCI_NIRQ; i++) {
131 		alpha_shared_intr_set_maxstrays(dec_1000_pci_intr, i,
132 		    PCI_STRAY_MAX);
133 
134 		cp = alpha_shared_intr_string(dec_1000_pci_intr, i);
135 		snprintf(cp, PCI_1000_IRQ_STR, "irq %d", i);
136 		evcnt_attach_dynamic(alpha_shared_intr_evcnt(
137 		    dec_1000_pci_intr, i), EVCNT_TYPE_INTR, NULL,
138 		    "dec_1000", cp);
139 	}
140 
141 	pci_1000_imi();
142 #if NSIO > 0 || NPCEB > 0
143 	sio_intr_setup(pc, iot);
144 #endif
145 }
146 
147 int
148 dec_1000_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
149 {
150 	pcitag_t bustag = pa->pa_intrtag;
151 	int buspin = pa->pa_intrpin;
152 	pci_chipset_tag_t pc = pa->pa_pc;
153 	int	device = 0;	/* XXX gcc */
154 
155 	if (buspin == 0)	/* No IRQ used. */
156 		return 1;
157 	if (!(1 <= buspin && buspin <= 4))
158 		goto bad;
159 
160 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
161 
162 	switch(device) {
163 	case 6:
164 		if(buspin != 1)
165 			break;
166 		*ihp = 0xc;		/* integrated ncr scsi */
167 		return 0;
168 	case 11:
169 	case 12:
170 	case 13:
171 		*ihp = (device - 11) * 4 + buspin - 1;
172 		return 0;
173 	}
174 
175 bad:	printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin);
176 	return 1;
177 }
178 
179 const char *
180 dec_1000_intr_string(void *ccv, pci_intr_handle_t ih, char *buf, size_t len)
181 {
182 	static const char irqmsg_fmt[] = "dec_1000 irq %ld";
183 
184 	if (ih >= PCI_NIRQ)
185 	        panic("%s: bogus dec_1000 IRQ 0x%lx", __func__, ih);
186 
187 	snprintf(buf, len, irqmsg_fmt, ih);
188 	return buf;
189 }
190 
191 const struct evcnt *
192 dec_1000_intr_evcnt(void *ccv, pci_intr_handle_t ih)
193 {
194 
195 	if (ih >= PCI_NIRQ)
196 		panic("%s: bogus dec_1000 IRQ 0x%lx", __func__, ih);
197 
198 	return (alpha_shared_intr_evcnt(dec_1000_pci_intr, ih));
199 }
200 
201 void *
202 dec_1000_intr_establish(
203 	void *ccv,
204 	pci_intr_handle_t ih,
205 	int level,
206 	int (*func)(void *),
207 	void *arg)
208 {
209 	void *cookie;
210 
211 	if (ih >= PCI_NIRQ)
212 	        panic("dec_1000_intr_establish: IRQ too high, 0x%lx", ih);
213 
214 	cookie = alpha_shared_intr_establish(dec_1000_pci_intr, ih, IST_LEVEL,
215 	    level, func, arg, "dec_1000 irq");
216 
217 	if (cookie != NULL &&
218 	    alpha_shared_intr_firstactive(dec_1000_pci_intr, ih)) {
219 		scb_set(0x900 + SCB_IDXTOVEC(ih), dec_1000_iointr, NULL,
220 		    level);
221 		dec_1000_enable_intr(ih);
222 	}
223 	return (cookie);
224 }
225 
226 void
227 dec_1000_intr_disestablish(void *ccv, void *cookie)
228 {
229 	struct alpha_shared_intrhand *ih = cookie;
230 	unsigned int irq = ih->ih_num;
231 	int s;
232 
233 	s = splhigh();
234 
235 	alpha_shared_intr_disestablish(dec_1000_pci_intr, cookie,
236 	    "dec_1000 irq");
237 	if (alpha_shared_intr_isactive(dec_1000_pci_intr, irq) == 0) {
238 		dec_1000_disable_intr(irq);
239 		alpha_shared_intr_set_dfltsharetype(dec_1000_pci_intr, irq,
240 		    IST_NONE);
241 		scb_free(0x900 + SCB_IDXTOVEC(irq));
242 	}
243 
244 	splx(s);
245 }
246 
247 static void
248 dec_1000_iointr(void *arg, unsigned long vec)
249 {
250 	int irq;
251 
252 	irq = SCB_VECTOIDX(vec - 0x900);
253 
254 	if (!alpha_shared_intr_dispatch(dec_1000_pci_intr, irq)) {
255 		alpha_shared_intr_stray(dec_1000_pci_intr, irq,
256 		    "dec_1000 irq");
257 		if (ALPHA_SHARED_INTR_DISABLE(dec_1000_pci_intr, irq))
258 			dec_1000_disable_intr(irq);
259 	} else
260 		alpha_shared_intr_reset_strays(dec_1000_pci_intr, irq);
261 }
262 
263 /*
264  * Read and write the mystery ICU IMR registers
265  */
266 
267 #define	IR() bus_space_read_2(another_mystery_icu_iot,		\
268 				another_mystery_icu_ioh, 0)
269 
270 #define	IW(v) bus_space_write_2(another_mystery_icu_iot,	\
271 				another_mystery_icu_ioh, 0, (v))
272 
273 /*
274  * Enable and disable interrupts at the ICU level
275  */
276 
277 static void
278 dec_1000_enable_intr(int irq)
279 {
280 	IW(IR() | 1 << irq);
281 }
282 
283 static void
284 dec_1000_disable_intr(int irq)
285 {
286 	IW(IR() & ~(1 << irq));
287 }
288 /*
289  * Initialize mystery ICU
290  */
291 static void
292 pci_1000_imi(void)
293 {
294 	IW(0);					/* XXX ?? */
295 }
296