1 /* $NetBSD: pci_1000.c,v 1.23 2011/04/04 20:37:44 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at 8 * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle 9 * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon 10 * Computer Systems, Inc. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 36 * All rights reserved. 37 * 38 * Author: Chris G. Demetriou 39 * 40 * Permission to use, copy, modify and distribute this software and 41 * its documentation is hereby granted, provided that both the copyright 42 * notice and this permission notice appear in all copies of the 43 * software, derivative works or modified versions, and any portions 44 * thereof, and that both notices appear in supporting documentation. 45 * 46 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 47 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 48 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 49 * 50 * Carnegie Mellon requests users of this software to return to 51 * 52 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 53 * School of Computer Science 54 * Carnegie Mellon University 55 * Pittsburgh PA 15213-3890 56 * 57 * any improvements or extensions that they make and grant Carnegie the 58 * rights to redistribute these changes. 59 */ 60 61 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 62 63 __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.23 2011/04/04 20:37:44 dyoung Exp $"); 64 65 #include <sys/types.h> 66 #include <sys/param.h> 67 #include <sys/time.h> 68 #include <sys/systm.h> 69 #include <sys/errno.h> 70 #include <sys/malloc.h> 71 #include <sys/device.h> 72 #include <sys/syslog.h> 73 74 #include <machine/autoconf.h> 75 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcivar.h> 78 79 #include <alpha/pci/pci_1000.h> 80 81 #include "sio.h" 82 #if NSIO > 0 || NPCEB > 0 83 #include <alpha/pci/siovar.h> 84 #endif 85 86 static bus_space_tag_t another_mystery_icu_iot; 87 static bus_space_handle_t another_mystery_icu_ioh; 88 89 int dec_1000_intr_map(const struct pci_attach_args *, pci_intr_handle_t *); 90 const char *dec_1000_intr_string(void *, pci_intr_handle_t); 91 const struct evcnt *dec_1000_intr_evcnt(void *, pci_intr_handle_t); 92 void *dec_1000_intr_establish(void *, pci_intr_handle_t, 93 int, int (*func)(void *), void *); 94 void dec_1000_intr_disestablish(void *, void *); 95 96 #define PCI_NIRQ 16 97 #define PCI_STRAY_MAX 5 98 99 struct alpha_shared_intr *dec_1000_pci_intr; 100 101 static void dec_1000_iointr(void *arg, unsigned long vec); 102 static void dec_1000_enable_intr(int irq); 103 static void dec_1000_disable_intr(int irq); 104 static void pci_1000_imi(void); 105 static pci_chipset_tag_t pc_tag; 106 107 void 108 pci_1000_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, pci_chipset_tag_t pc) 109 { 110 char *cp; 111 int i; 112 113 another_mystery_icu_iot = iot; 114 115 pc_tag = pc; 116 if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh)) 117 panic("pci_1000_pickintr"); 118 pc->pc_intr_v = core; 119 pc->pc_intr_map = dec_1000_intr_map; 120 pc->pc_intr_string = dec_1000_intr_string; 121 pc->pc_intr_evcnt = dec_1000_intr_evcnt; 122 pc->pc_intr_establish = dec_1000_intr_establish; 123 pc->pc_intr_disestablish = dec_1000_intr_disestablish; 124 125 pc->pc_pciide_compat_intr_establish = NULL; 126 127 dec_1000_pci_intr = 128 alpha_shared_intr_alloc(PCI_NIRQ, 8); 129 for (i = 0; i < PCI_NIRQ; i++) { 130 alpha_shared_intr_set_maxstrays(dec_1000_pci_intr, i, 131 PCI_STRAY_MAX); 132 133 cp = alpha_shared_intr_string(dec_1000_pci_intr, i); 134 sprintf(cp, "irq %d", i); 135 evcnt_attach_dynamic(alpha_shared_intr_evcnt( 136 dec_1000_pci_intr, i), EVCNT_TYPE_INTR, NULL, 137 "dec_1000", cp); 138 } 139 140 pci_1000_imi(); 141 #if NSIO > 0 || NPCEB > 0 142 sio_intr_setup(pc, iot); 143 #endif 144 } 145 146 int 147 dec_1000_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 148 { 149 pcitag_t bustag = pa->pa_intrtag; 150 int buspin = pa->pa_intrpin; 151 pci_chipset_tag_t pc = pa->pa_pc; 152 int device; 153 154 if (buspin == 0) /* No IRQ used. */ 155 return 1; 156 if (!(1 <= buspin && buspin <= 4)) 157 goto bad; 158 159 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 160 161 switch(device) { 162 case 6: 163 if(buspin != 1) 164 break; 165 *ihp = 0xc; /* integrated ncr scsi */ 166 return 0; 167 case 11: 168 case 12: 169 case 13: 170 *ihp = (device - 11) * 4 + buspin - 1; 171 return 0; 172 } 173 174 bad: printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin); 175 return 1; 176 } 177 178 const char * 179 dec_1000_intr_string(void *ccv, pci_intr_handle_t ih) 180 { 181 static const char irqmsg_fmt[] = "dec_1000 irq %ld"; 182 static char irqstr[sizeof irqmsg_fmt]; 183 184 if (ih >= PCI_NIRQ) 185 panic("dec_1000_intr_string: bogus dec_1000 IRQ 0x%lx", ih); 186 187 snprintf(irqstr, sizeof irqstr, irqmsg_fmt, ih); 188 return (irqstr); 189 } 190 191 const struct evcnt * 192 dec_1000_intr_evcnt(void *ccv, pci_intr_handle_t ih) 193 { 194 195 if (ih >= PCI_NIRQ) 196 panic("dec_1000_intr_evcnt: bogus dec_1000 IRQ 0x%lx", ih); 197 198 return (alpha_shared_intr_evcnt(dec_1000_pci_intr, ih)); 199 } 200 201 void * 202 dec_1000_intr_establish(ccv, ih, level, func, arg) 203 void *ccv, *arg; 204 pci_intr_handle_t ih; 205 int level; 206 int (*func)(void *); 207 { 208 void *cookie; 209 210 if (ih >= PCI_NIRQ) 211 panic("dec_1000_intr_establish: IRQ too high, 0x%lx", ih); 212 213 cookie = alpha_shared_intr_establish(dec_1000_pci_intr, ih, IST_LEVEL, 214 level, func, arg, "dec_1000 irq"); 215 216 if (cookie != NULL && 217 alpha_shared_intr_firstactive(dec_1000_pci_intr, ih)) { 218 scb_set(0x900 + SCB_IDXTOVEC(ih), dec_1000_iointr, NULL, 219 level); 220 dec_1000_enable_intr(ih); 221 } 222 return (cookie); 223 } 224 225 void 226 dec_1000_intr_disestablish(void *ccv, void *cookie) 227 { 228 struct alpha_shared_intrhand *ih = cookie; 229 unsigned int irq = ih->ih_num; 230 int s; 231 232 s = splhigh(); 233 234 alpha_shared_intr_disestablish(dec_1000_pci_intr, cookie, 235 "dec_1000 irq"); 236 if (alpha_shared_intr_isactive(dec_1000_pci_intr, irq) == 0) { 237 dec_1000_disable_intr(irq); 238 alpha_shared_intr_set_dfltsharetype(dec_1000_pci_intr, irq, 239 IST_NONE); 240 scb_free(0x900 + SCB_IDXTOVEC(irq)); 241 } 242 243 splx(s); 244 } 245 246 static void 247 dec_1000_iointr(void *arg, unsigned long vec) 248 { 249 int irq; 250 251 irq = SCB_VECTOIDX(vec - 0x900); 252 253 if (!alpha_shared_intr_dispatch(dec_1000_pci_intr, irq)) { 254 alpha_shared_intr_stray(dec_1000_pci_intr, irq, 255 "dec_1000 irq"); 256 if (ALPHA_SHARED_INTR_DISABLE(dec_1000_pci_intr, irq)) 257 dec_1000_disable_intr(irq); 258 } else 259 alpha_shared_intr_reset_strays(dec_1000_pci_intr, irq); 260 } 261 262 /* 263 * Read and write the mystery ICU IMR registers 264 */ 265 266 #define IR() bus_space_read_2(another_mystery_icu_iot, \ 267 another_mystery_icu_ioh, 0) 268 269 #define IW(v) bus_space_write_2(another_mystery_icu_iot, \ 270 another_mystery_icu_ioh, 0, (v)) 271 272 /* 273 * Enable and disable interrupts at the ICU level 274 */ 275 276 static void 277 dec_1000_enable_intr(int irq) 278 { 279 IW(IR() | 1 << irq); 280 } 281 282 static void 283 dec_1000_disable_intr(int irq) 284 { 285 IW(IR() & ~(1 << irq)); 286 } 287 /* 288 * Initialize mystery ICU 289 */ 290 static void 291 pci_1000_imi() 292 { 293 IW(0); /* XXX ?? */ 294 } 295