1 /* $NetBSD: mcpcia.c,v 1.20 2007/03/04 05:59:11 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1998 by Matthew Jacob 42 * NASA AMES Research Center. 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice immediately at the beginning of the file, without modification, 50 * this list of conditions, and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. The name of the author may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 59 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 60 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 61 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 62 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 63 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 64 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 65 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 66 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 67 * SUCH DAMAGE. 68 */ 69 70 /* 71 * MCPCIA mcbus to PCI bus adapter 72 * found on AlphaServer 4100 systems. 73 */ 74 75 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 76 77 __KERNEL_RCSID(0, "$NetBSD: mcpcia.c,v 1.20 2007/03/04 05:59:11 christos Exp $"); 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/device.h> 82 #include <sys/malloc.h> 83 84 #include <machine/autoconf.h> 85 #include <machine/rpb.h> 86 #include <machine/sysarch.h> 87 88 #include <alpha/mcbus/mcbusreg.h> 89 #include <alpha/mcbus/mcbusvar.h> 90 #include <alpha/pci/mcpciareg.h> 91 #include <alpha/pci/mcpciavar.h> 92 #include <alpha/pci/pci_kn300.h> 93 94 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr))) 95 #define MCPCIA_SYSBASE(mc) \ 96 ((((unsigned long) (mc)->cc_gid) << MCBUS_GID_SHIFT) | \ 97 (((unsigned long) (mc)->cc_mid) << MCBUS_MID_SHIFT) | \ 98 (MCBUS_IOSPACE)) 99 100 #define MCPCIA_PROBE(mid, gid) \ 101 badaddr((void *)KV(((((unsigned long) gid) << MCBUS_GID_SHIFT) | \ 102 (((unsigned long) mid) << MCBUS_MID_SHIFT) | \ 103 (MCBUS_IOSPACE) | MCPCIA_PCI_BRIDGE | _MCPCIA_PCI_REV)), \ 104 sizeof(u_int32_t)) 105 106 static int mcpciamatch __P((struct device *, struct cfdata *, void *)); 107 static void mcpciaattach __P((struct device *, struct device *, void *)); 108 CFATTACH_DECL(mcpcia, sizeof(struct mcpcia_softc), 109 mcpciamatch, mcpciaattach, NULL, NULL); 110 111 void mcpcia_init0 __P((struct mcpcia_config *, int)); 112 113 /* 114 * We have one statically-allocated mcpcia_config structure; this is 115 * the one used for the console (which, coincidentally, is the only 116 * MCPCIA with an EISA adapter attached to it). 117 */ 118 struct mcpcia_config mcpcia_console_configuration; 119 120 int mcpcia_bus_get_window __P((int, int, 121 struct alpha_bus_space_translation *abst)); 122 123 static int 124 mcpciamatch(parent, cf, aux) 125 struct device *parent; 126 struct cfdata *cf; 127 void *aux; 128 { 129 struct mcbus_dev_attach_args *ma = aux; 130 if (ma->ma_type == MCBUS_TYPE_PCI) 131 return (1); 132 return (0); 133 } 134 135 static void 136 mcpciaattach(parent, self, aux) 137 struct device *parent; 138 struct device *self; 139 void *aux; 140 { 141 static int first = 1; 142 struct mcbus_dev_attach_args *ma = aux; 143 struct mcpcia_softc *mcp = (struct mcpcia_softc *)self; 144 struct mcpcia_config *ccp; 145 struct pcibus_attach_args pba; 146 u_int32_t ctl; 147 148 /* 149 * Make sure this MCPCIA exists... 150 */ 151 if (MCPCIA_PROBE(ma->ma_mid, ma->ma_gid)) { 152 mcp->mcpcia_cc = NULL; 153 printf(" (not present)\n"); 154 return; 155 } 156 printf("\n"); 157 158 /* 159 * Determine if we're the console's MCPCIA. 160 */ 161 if (ma->ma_mid == mcpcia_console_configuration.cc_mid && 162 ma->ma_gid == mcpcia_console_configuration.cc_gid) 163 ccp = &mcpcia_console_configuration; 164 else { 165 ccp = malloc(sizeof(struct mcpcia_config), M_DEVBUF, M_WAITOK); 166 memset(ccp, 0, sizeof(struct mcpcia_config)); 167 168 ccp->cc_mid = ma->ma_mid; 169 ccp->cc_gid = ma->ma_gid; 170 } 171 172 mcp->mcpcia_cc = ccp; 173 ccp->cc_sc = mcp; 174 175 /* This initializes cc_sysbase so we can do register access. */ 176 mcpcia_init0(ccp, 1); 177 178 ctl = REGVAL(MCPCIA_PCI_REV(ccp)); 179 printf("%s: Horse Revision %d, %s Handed Saddle Revision %d," 180 " CAP Revision %d\n", mcp->mcpcia_dev.dv_xname, HORSE_REV(ctl), 181 (SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl), 182 CAP_REV(ctl)); 183 184 mcpcia_dma_init(ccp); 185 186 /* 187 * Set up interrupts 188 */ 189 pci_kn300_pickintr(ccp, first); 190 first = 0; 191 192 /* 193 * Attach PCI bus 194 */ 195 pba.pba_iot = &ccp->cc_iot; 196 pba.pba_memt = &ccp->cc_memt; 197 pba.pba_dmat = /* start with direct, may change... */ 198 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 199 pba.pba_dmat64 = NULL; 200 pba.pba_pc = &ccp->cc_pc; 201 pba.pba_bus = 0; 202 pba.pba_bridgetag = NULL; 203 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 204 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 205 (void) config_found_ia(self, "pcibus", &pba, pcibusprint); 206 207 /* 208 * Clear any errors that may have occurred during the probe 209 * sequence. 210 */ 211 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 212 alpha_mb(); 213 } 214 215 void 216 mcpcia_init() 217 { 218 struct mcpcia_config *ccp = &mcpcia_console_configuration; 219 int i; 220 221 /* 222 * Look for all of the MCPCIAs on the system. One of them 223 * will have an EISA attached to it. This MCPCIA is the 224 * only one that can be used for the console. Once we find 225 * that one, initialize it. 226 */ 227 228 for (i = 0; i < MCPCIA_PER_MCBUS; i++) { 229 ccp->cc_mid = mcbus_mcpcia_probe_order[i]; 230 /* 231 * XXX If we ever support more than one MCBUS, we'll 232 * XXX have to probe for them, and map them to unit 233 * XXX numbers. 234 */ 235 ccp->cc_gid = MCBUS_GID_FROM_INSTANCE(0); 236 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 237 238 if (badaddr((void *)ALPHA_PHYS_TO_K0SEG(MCPCIA_PCI_REV(ccp)), 239 sizeof(u_int32_t))) 240 continue; 241 242 if (EISA_PRESENT(REGVAL(MCPCIA_PCI_REV(ccp)))) { 243 mcpcia_init0(ccp, 0); 244 245 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 2; 246 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3; 247 248 alpha_bus_get_window = mcpcia_bus_get_window; 249 return; 250 } 251 } 252 253 panic("mcpcia_init: unable to find EISA bus"); 254 } 255 256 void 257 mcpcia_init0(ccp, mallocsafe) 258 struct mcpcia_config *ccp; 259 int mallocsafe; 260 { 261 u_int32_t ctl; 262 263 if (ccp->cc_initted == 0) { 264 /* don't do these twice since they set up extents */ 265 mcpcia_bus_io_init(&ccp->cc_iot, ccp); 266 mcpcia_bus_mem_init(&ccp->cc_memt, ccp); 267 } 268 ccp->cc_mallocsafe = mallocsafe; 269 270 mcpcia_pci_init(&ccp->cc_pc, ccp); 271 272 /* 273 * Establish a precalculated base for convenience's sake. 274 */ 275 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 276 277 /* 278 * Disable interrupts and clear errors prior to probing 279 */ 280 REGVAL(MCPCIA_INT_MASK0(ccp)) = 0; 281 REGVAL(MCPCIA_INT_MASK1(ccp)) = 0; 282 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 283 alpha_mb(); 284 285 if (ccp == &mcpcia_console_configuration) { 286 /* 287 * Use this opportunity to also find out the MID and CPU 288 * type of the currently running CPU (that's us, billybob....) 289 */ 290 ctl = REGVAL(MCPCIA_WHOAMI(ccp)); 291 mcbus_primary.mcbus_cpu_mid = MCBUS_CPU_MID(ctl); 292 if ((MCBUS_CPU_INFO(ctl) & CPU_Fill_Err) == 0 && 293 mcbus_primary.mcbus_valid == 0) { 294 mcbus_primary.mcbus_bcache = 295 MCBUS_CPU_INFO(ctl) & CPU_BCacheMask; 296 mcbus_primary.mcbus_valid = 1; 297 } 298 alpha_mb(); 299 } 300 301 ccp->cc_initted = 1; 302 } 303 304 #ifdef TEST_PROBE_DEATH 305 static void 306 die_heathen_dog(arg) 307 void *arg; 308 { 309 struct mcpcia_config *ccp = arg; 310 311 /* this causes a fatal machine check (0x670) */ 312 REGVAL(MCPCIA_CAP_DIAG(ccp)) |= CAP_DIAG_MC_ADRPE; 313 } 314 #endif 315 316 void 317 mcpcia_config_cleanup() 318 { 319 volatile u_int32_t ctl; 320 struct mcpcia_softc *mcp; 321 struct mcpcia_config *ccp; 322 int i; 323 extern struct cfdriver mcpcia_cd; 324 325 /* 326 * Turn on Hard, Soft error interrupts. Maybe i2c too. 327 */ 328 for (i = 0; i < mcpcia_cd.cd_ndevs; i++) { 329 if ((mcp = mcpcia_cd.cd_devs[i]) == NULL) 330 continue; 331 332 ccp = mcp->mcpcia_cc; 333 if (ccp == NULL) 334 continue; 335 336 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 337 ctl |= MCPCIA_GEN_IENABL; 338 REGVAL(MCPCIA_INT_MASK0(ccp)) = ctl; 339 alpha_mb(); 340 341 /* force stall while write completes */ 342 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 343 } 344 #ifdef TEST_PROBE_DEATH 345 (void) timeout (die_heathen_dog, &mcpcia_console_configuration, 346 30 * hz); 347 #endif 348 } 349 350 int 351 mcpcia_bus_get_window(type, window, abst) 352 int type, window; 353 struct alpha_bus_space_translation *abst; 354 { 355 struct mcpcia_config *ccp = &mcpcia_console_configuration; 356 bus_space_tag_t st; 357 358 switch (type) { 359 case ALPHA_BUS_TYPE_PCI_IO: 360 st = &ccp->cc_iot; 361 break; 362 363 case ALPHA_BUS_TYPE_PCI_MEM: 364 st = &ccp->cc_memt; 365 break; 366 367 default: 368 panic("mcpcia_bus_get_window"); 369 } 370 371 return (alpha_bus_space_get_window(st, window, abst)); 372 } 373