1 /* $NetBSD: irongate_pci.c,v 1.6 2009/03/14 14:45:53 dsl Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic 34 * chipset. 35 */ 36 37 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 38 39 __KERNEL_RCSID(0, "$NetBSD: irongate_pci.c,v 1.6 2009/03/14 14:45:53 dsl Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/device.h> 45 46 #include <uvm/uvm_extern.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <alpha/pci/irongatereg.h> 51 #include <alpha/pci/irongatevar.h> 52 53 void irongate_attach_hook(struct device *, struct device *, 54 struct pcibus_attach_args *); 55 int irongate_bus_maxdevs(void *, int); 56 pcitag_t irongate_make_tag(void *, int, int, int); 57 void irongate_decompose_tag(void *, pcitag_t, int *, int *, 58 int *); 59 pcireg_t irongate_conf_read(void *, pcitag_t, int); 60 void irongate_conf_write(void *, pcitag_t, int, pcireg_t); 61 62 /* AMD 751 systems are always single-processor, so this is easy. */ 63 #define PCI_CONF_LOCK(s) (s) = splhigh() 64 #define PCI_CONF_UNLOCK(s) splx((s)) 65 66 #define PCI_CONF_ADDR (IRONGATE_IO_BASE|IRONGATE_CONFADDR) 67 #define PCI_CONF_DATA (IRONGATE_IO_BASE|IRONGATE_CONFDATA) 68 69 #define REGVAL(r) (*(volatile u_int32_t *)ALPHA_PHYS_TO_K0SEG(r)) 70 71 void 72 irongate_pci_init(pci_chipset_tag_t pc, void *v) 73 { 74 75 pc->pc_conf_v = v; 76 pc->pc_attach_hook = irongate_attach_hook; 77 pc->pc_bus_maxdevs = irongate_bus_maxdevs; 78 pc->pc_make_tag = irongate_make_tag; 79 pc->pc_decompose_tag = irongate_decompose_tag; 80 pc->pc_conf_read = irongate_conf_read; 81 pc->pc_conf_write = irongate_conf_write; 82 } 83 84 void 85 irongate_attach_hook(struct device *parent, struct device *self, 86 struct pcibus_attach_args *pba) 87 { 88 } 89 90 int 91 irongate_bus_maxdevs(void *ipv, int busno) 92 { 93 94 return 32; 95 } 96 97 pcitag_t 98 irongate_make_tag(void *ipv, int b, int d, int f) 99 { 100 101 return (b << 16) | (d << 11) | (f << 8); 102 } 103 104 void 105 irongate_decompose_tag(void *ipv, pcitag_t tag, int *bp, int *dp, int *fp) 106 { 107 108 if (bp != NULL) 109 *bp = (tag >> 16) & 0xff; 110 if (dp != NULL) 111 *dp = (tag >> 11) & 0x1f; 112 if (fp != NULL) 113 *fp = (tag >> 8) & 0x7; 114 } 115 116 pcireg_t 117 irongate_conf_read(void *ipv, pcitag_t tag, int offset) 118 { 119 int d; 120 121 /* 122 * The AMD 751 appears in PCI configuration space, but 123 * that is ... counter-intuitive to the way we normally 124 * attach PCI-Host bridges on the Alpha. So, filter out 125 * the AMD 751 device here. We provide a private entry 126 * point for getting at it from machdep code. 127 */ 128 irongate_decompose_tag(ipv, tag, NULL, &d, NULL); 129 if (d == IRONGATE_PCIHOST_DEV && offset == PCI_ID_REG) 130 return ((pcireg_t) -1); 131 132 return (irongate_conf_read0(ipv, tag, offset)); 133 } 134 135 pcireg_t 136 irongate_conf_read0(void *ipv, pcitag_t tag, int offset) 137 { 138 pcireg_t data; 139 int s; 140 141 PCI_CONF_LOCK(s); 142 REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff)); 143 alpha_mb(); 144 data = REGVAL(PCI_CONF_DATA); 145 REGVAL(PCI_CONF_ADDR) = 0; 146 alpha_mb(); 147 PCI_CONF_UNLOCK(s); 148 149 return (data); 150 } 151 152 void 153 irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data) 154 { 155 int s; 156 157 PCI_CONF_LOCK(s); 158 REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff)); 159 alpha_mb(); 160 REGVAL(PCI_CONF_DATA) = data; 161 alpha_mb(); 162 REGVAL(PCI_CONF_ADDR) = 0; 163 alpha_mb(); 164 PCI_CONF_UNLOCK(s); 165 } 166