xref: /netbsd-src/sys/arch/alpha/pci/irongate_pci.c (revision 82d56013d7b633d116a93943de88e08335357a7c)
1 /* $NetBSD: irongate_pci.c,v 1.11 2021/05/07 16:58:34 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic
34  * chipset.
35  */
36 
37 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
38 
39 __KERNEL_RCSID(0, "$NetBSD: irongate_pci.c,v 1.11 2021/05/07 16:58:34 thorpej Exp $");
40 
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/device.h>
45 
46 #include <dev/pci/pcireg.h>
47 #include <dev/pci/pcivar.h>
48 #include <alpha/pci/irongatereg.h>
49 #include <alpha/pci/irongatevar.h>
50 
51 static void	irongate_attach_hook(device_t, device_t,
52 		    struct pcibus_attach_args *);
53 static int	irongate_bus_maxdevs(void *, int);
54 static pcitag_t	irongate_make_tag(void *, int, int, int);
55 static void	irongate_decompose_tag(void *, pcitag_t, int *, int *,
56 		    int *);
57 static pcireg_t	irongate_conf_read(void *, pcitag_t, int);
58 static void	irongate_conf_write(void *, pcitag_t, int, pcireg_t);
59 
60 /* AMD 751 systems are always single-processor, so this is easy. */
61 #define	PCI_CONF_LOCK(s)	(s) = splhigh()
62 #define	PCI_CONF_UNLOCK(s)	splx((s))
63 
64 #define	PCI_CONF_ADDR	(IRONGATE_IO_BASE|IRONGATE_CONFADDR)
65 #define	PCI_CONF_DATA	(IRONGATE_IO_BASE|IRONGATE_CONFDATA)
66 
67 #define	REGVAL(r)	(*(volatile uint32_t *)ALPHA_PHYS_TO_K0SEG(r))
68 
69 void
70 irongate_pci_init(pci_chipset_tag_t pc, void *v)
71 {
72 
73 	pc->pc_conf_v = v;
74 	pc->pc_attach_hook = irongate_attach_hook;
75 	pc->pc_bus_maxdevs = irongate_bus_maxdevs;
76 	pc->pc_make_tag = irongate_make_tag;
77 	pc->pc_decompose_tag = irongate_decompose_tag;
78 	pc->pc_conf_read = irongate_conf_read;
79 	pc->pc_conf_write = irongate_conf_write;
80 }
81 
82 static void
83 irongate_attach_hook(device_t parent, device_t self,
84     struct pcibus_attach_args *pba)
85 {
86 }
87 
88 static int
89 irongate_bus_maxdevs(void *ipv, int busno)
90 {
91 
92 	return 32;
93 }
94 
95 static pcitag_t
96 irongate_make_tag(void *ipv, int b, int d, int f)
97 {
98 
99 	return (b << 16) | (d << 11) | (f << 8);
100 }
101 
102 static void
103 irongate_decompose_tag(void *ipv, pcitag_t tag, int *bp, int *dp, int *fp)
104 {
105 
106 	if (bp != NULL)
107 		*bp = (tag >> 16) & 0xff;
108 	if (dp != NULL)
109 		*dp = (tag >> 11) & 0x1f;
110 	if (fp != NULL)
111 		*fp = (tag >> 8) & 0x7;
112 }
113 
114 static pcireg_t
115 irongate_conf_read(void *ipv, pcitag_t tag, int offset)
116 {
117 	int d;
118 
119 	if ((unsigned int)offset >= PCI_CONF_SIZE)
120 		return (pcireg_t) -1;
121 
122 	/*
123 	 * The AMD 751 appears in PCI configuration space, but
124 	 * that is ... counter-intuitive to the way we normally
125 	 * attach PCI-Host bridges on the Alpha.  So, filter out
126 	 * the AMD 751 device here.  We provide a private entry
127 	 * point for getting at it from machdep code.
128 	 */
129 	irongate_decompose_tag(ipv, tag, NULL, &d, NULL);
130 	if (d == IRONGATE_PCIHOST_DEV && offset == PCI_ID_REG)
131 		return ((pcireg_t) -1);
132 
133 	return (irongate_conf_read0(ipv, tag, offset));
134 }
135 
136 pcireg_t
137 irongate_conf_read0(void *ipv, pcitag_t tag, int offset)
138 {
139 	pcireg_t data;
140 	int s;
141 
142 	if ((unsigned int)offset >= PCI_CONF_SIZE)
143 		return (pcireg_t) -1;
144 
145 	PCI_CONF_LOCK(s);
146 	REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
147 	alpha_mb();
148 	data = REGVAL(PCI_CONF_DATA);
149 	REGVAL(PCI_CONF_ADDR) = 0;
150 	alpha_mb();
151 	PCI_CONF_UNLOCK(s);
152 
153 	return (data);
154 }
155 
156 static void
157 irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data)
158 {
159 	int s;
160 
161 	if ((unsigned int)offset >= PCI_CONF_SIZE)
162 		return;
163 
164 	PCI_CONF_LOCK(s);
165 	REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
166 	alpha_mb();
167 	REGVAL(PCI_CONF_DATA) = data;
168 	alpha_mb();
169 	REGVAL(PCI_CONF_ADDR) = 0;
170 	alpha_mb();
171 	PCI_CONF_UNLOCK(s);
172 }
173