1 /* $NetBSD: irongate.c,v 1.21 2021/08/07 16:18:41 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 34 __KERNEL_RCSID(0, "$NetBSD: irongate.c,v 1.21 2021/08/07 16:18:41 thorpej Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/device.h> 39 40 #include <machine/autoconf.h> 41 #include <machine/rpb.h> 42 #include <machine/sysarch.h> 43 44 #include <dev/isa/isareg.h> 45 #include <dev/isa/isavar.h> 46 #include <dev/pci/pcireg.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/agpvar.h> 49 50 #include <alpha/pci/irongatereg.h> 51 #include <alpha/pci/irongatevar.h> 52 53 static int irongate_match(device_t, cfdata_t, void *); 54 static void irongate_attach(device_t, device_t, void *); 55 56 CFATTACH_DECL_NEW(irongate, sizeof(struct irongate_softc), 57 irongate_match, irongate_attach, NULL, NULL); 58 59 extern struct cfdriver irongate_cd; 60 61 /* There can be only one. */ 62 struct irongate_config irongate_configuration; 63 static int irongate_found; 64 65 static int irongate_bus_get_window(int, int, 66 struct alpha_bus_space_translation *); 67 68 /* 69 * Set up the chipset's function pointers. 70 */ 71 void 72 irongate_init(struct irongate_config *icp, int mallocsafe) 73 { 74 pcitag_t tag; 75 pcireg_t reg; 76 77 icp->ic_mallocsafe = mallocsafe; 78 79 /* 80 * Set up PCI configuration space; we can only read the 81 * revision info through configuration space. 82 */ 83 irongate_pci_init(&icp->ic_pc, icp); 84 alpha_pci_chipset = &icp->ic_pc; 85 86 tag = pci_make_tag(&icp->ic_pc, 0, IRONGATE_PCIHOST_DEV, 0); 87 88 /* Read the revision. */ 89 reg = irongate_conf_read0(icp, tag, PCI_CLASS_REG); 90 icp->ic_rev = PCI_REVISION(reg); 91 92 if (icp->ic_initted == 0) { 93 /* Don't do these twice, since they set up extents. */ 94 irongate_bus_io_init(&icp->ic_iot, icp); 95 irongate_bus_mem_init(&icp->ic_memt, icp); 96 97 /* Only one each PCI I/O and MEM window. */ 98 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1; 99 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1; 100 101 alpha_bus_get_window = irongate_bus_get_window; 102 } 103 104 icp->ic_initted = 1; 105 } 106 107 static int 108 irongate_match(device_t parent, cfdata_t match, void *aux) 109 { 110 struct mainbus_attach_args *ma = aux; 111 112 /* Make sure we're looking for an Irongate. */ 113 if (strcmp(ma->ma_name, irongate_cd.cd_name) != 0) 114 return (0); 115 116 if (irongate_found) 117 return (0); 118 119 return (1); 120 } 121 122 static void 123 irongate_attach(device_t parent, device_t self, void *aux) 124 { 125 struct irongate_softc *sc = device_private(self); 126 struct irongate_config *icp; 127 struct pcibus_attach_args pba; 128 struct agpbus_attach_args apa; 129 pcitag_t tag; 130 131 /* Note that we've attached the chipset; can't have 2 Irongates. */ 132 irongate_found = 1; 133 sc->sc_dev = self; 134 135 /* 136 * Set up the chipset's info; done once at console init time 137 * (maybe), but we must do it here as well to take care of things 138 * that need to use memory allocation. 139 */ 140 icp = sc->sc_icp = &irongate_configuration; 141 irongate_init(icp, 1); 142 143 printf(": AMD 751 Core Logic + AGP Chipset, rev. %d\n", icp->ic_rev); 144 145 irongate_dma_init(icp); 146 147 /* 148 * Do PCI memory initialization that needs to be deferred until 149 * malloc is safe. 150 */ 151 irongate_bus_mem_init2(&icp->ic_memt, icp); 152 153 alpha_pci_intr_init(icp, &icp->ic_iot, &icp->ic_memt, &icp->ic_pc); 154 155 tag = pci_make_tag(&icp->ic_pc, 0, IRONGATE_PCIHOST_DEV, 0); 156 157 pba.pba_iot = &icp->ic_iot; 158 pba.pba_memt = &icp->ic_memt; 159 pba.pba_dmat = 160 alphabus_dma_get_tag(&icp->ic_dmat_pci, ALPHA_BUS_PCI); 161 pba.pba_dmat64 = NULL; 162 pba.pba_pc = &icp->ic_pc; 163 pba.pba_bus = 0; 164 pba.pba_bridgetag = NULL; 165 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY | 166 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 167 168 if (pci_get_capability(&icp->ic_pc, tag, PCI_CAP_AGP, 169 NULL, NULL) != 0) { 170 apa.apa_pci_args.pa_iot = pba.pba_iot; 171 apa.apa_pci_args.pa_memt = pba.pba_memt; 172 apa.apa_pci_args.pa_dmat = pba.pba_dmat; 173 apa.apa_pci_args.pa_pc = pba.pba_pc; 174 apa.apa_pci_args.pa_bus = pba.pba_bus; 175 apa.apa_pci_args.pa_device = IRONGATE_PCIHOST_DEV; 176 apa.apa_pci_args.pa_function = 0; 177 apa.apa_pci_args.pa_tag = tag; 178 apa.apa_pci_args.pa_id = 179 irongate_conf_read0(icp, tag, PCI_ID_REG); 180 apa.apa_pci_args.pa_class = 181 irongate_conf_read0(icp, tag, PCI_CLASS_REG); 182 apa.apa_pci_args.pa_flags = pba.pba_flags; 183 184 config_found(self, &apa, agpbusprint, 185 CFARGS(.iattr = "agpbus")); 186 } 187 188 config_found(self, &pba, pcibusprint, 189 CFARGS(.iattr = "pcibus")); 190 } 191 192 static int 193 irongate_bus_get_window(int type, int window, 194 struct alpha_bus_space_translation *abst) 195 { 196 struct irongate_config *icp = &irongate_configuration; 197 bus_space_tag_t st; 198 int error; 199 200 switch (type) { 201 case ALPHA_BUS_TYPE_PCI_IO: 202 st = &icp->ic_iot; 203 break; 204 205 case ALPHA_BUS_TYPE_PCI_MEM: 206 st = &icp->ic_memt; 207 break; 208 209 default: 210 panic("irongate_bus_get_window"); 211 } 212 213 error = alpha_bus_space_get_window(st, window, abst); 214 if (error) 215 return (error); 216 217 abst->abst_sys_start = IRONGATE_PHYSADDR(abst->abst_sys_start); 218 abst->abst_sys_end = IRONGATE_PHYSADDR(abst->abst_sys_end); 219 220 return (0); 221 } 222