xref: /netbsd-src/sys/arch/alpha/pci/cia_pci.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /* $NetBSD: cia_pci.c,v 1.33 2015/10/02 05:22:49 msaitoh Exp $ */
2 
3 /*
4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5  * All rights reserved.
6  *
7  * Author: Chris G. Demetriou
8  *
9  * Permission to use, copy, modify and distribute this software and
10  * its documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie the
27  * rights to redistribute these changes.
28  */
29 
30 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
31 
32 __KERNEL_RCSID(0, "$NetBSD: cia_pci.c,v 1.33 2015/10/02 05:22:49 msaitoh Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/device.h>
38 
39 #include <dev/pci/pcireg.h>
40 #include <dev/pci/pcivar.h>
41 #include <alpha/pci/ciareg.h>
42 #include <alpha/pci/ciavar.h>
43 
44 void		cia_attach_hook(device_t, device_t,
45 		    struct pcibus_attach_args *);
46 int		cia_bus_maxdevs(void *, int);
47 pcitag_t	cia_make_tag(void *, int, int, int);
48 void		cia_decompose_tag(void *, pcitag_t, int *, int *, int *);
49 pcireg_t	cia_conf_read(void *, pcitag_t, int);
50 void		cia_conf_write(void *, pcitag_t, int, pcireg_t);
51 
52 void
53 cia_pci_init(pci_chipset_tag_t pc, void *v)
54 {
55 
56 	pc->pc_conf_v = v;
57 	pc->pc_attach_hook = cia_attach_hook;
58 	pc->pc_bus_maxdevs = cia_bus_maxdevs;
59 	pc->pc_make_tag = cia_make_tag;
60 	pc->pc_decompose_tag = cia_decompose_tag;
61 	pc->pc_conf_read = cia_conf_read;
62 	pc->pc_conf_write = cia_conf_write;
63 }
64 
65 void
66 cia_attach_hook(device_t parent, device_t self, struct pcibus_attach_args *pba)
67 {
68 }
69 
70 int
71 cia_bus_maxdevs(void *cpv, int busno)
72 {
73 
74 	return 32;
75 }
76 
77 pcitag_t
78 cia_make_tag(void *cpv, int b, int d, int f)
79 {
80 
81 	return (b << 16) | (d << 11) | (f << 8);
82 }
83 
84 void
85 cia_decompose_tag(void *cpv, pcitag_t tag, int *bp, int *dp, int *fp)
86 {
87 
88 	if (bp != NULL)
89 		*bp = (tag >> 16) & 0xff;
90 	if (dp != NULL)
91 		*dp = (tag >> 11) & 0x1f;
92 	if (fp != NULL)
93 		*fp = (tag >> 8) & 0x7;
94 }
95 
96 pcireg_t
97 cia_conf_read(void *cpv, pcitag_t tag, int offset)
98 {
99 	struct cia_config *ccp = cpv;
100 	pcireg_t *datap, data;
101 	int s, secondary, ba;
102 	uint32_t old_cfg, errbits;
103 
104 	if ((unsigned int)offset >= PCI_CONF_SIZE)
105 		return (pcireg_t) -1;
106 
107 #ifdef __GNUC__
108 	s = 0;					/* XXX gcc -Wuninitialized */
109 	old_cfg = 0;				/* XXX gcc -Wuninitialized */
110 #endif
111 
112 	/*
113 	 * Some (apparently-common) revisions of EB164 and AlphaStation
114 	 * firmware do the Wrong thing with PCI master and target aborts,
115 	 * which are caused by accesing the configuration space of devices
116 	 * that don't exist (for example).
117 	 *
118 	 * To work around this, we clear the CIA error register's PCI
119 	 * master and target abort bits before touching PCI configuration
120 	 * space and check it afterwards.  If it indicates a master or target
121 	 * abort, the device wasn't there so we return 0xffffffff.
122 	 */
123 	REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
124 	alpha_mb();
125 	alpha_pal_draina();
126 
127 	/* secondary if bus # != 0 */
128 	pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
129 	if (secondary) {
130 		s = splhigh();
131 		old_cfg = REGVAL(CIA_CSR_CFG);
132 		alpha_mb();
133 		REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
134 		alpha_mb();
135 	}
136 
137 	/*
138 	 * We just inline the BWX support, since this is the only
139 	 * difference between BWX and swiz for config space.
140 	 */
141 	if (ccp->cc_flags & CCF_PCI_USE_BWX) {
142 		if (secondary) {
143 			datap =
144 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
145 				tag | (offset & ~0x03));
146 		} else {
147 			datap =
148 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
149 				tag | (offset & ~0x03));
150 		}
151 	} else {
152 		datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
153 		    tag << 5UL |				/* XXX */
154 		    (offset & ~0x03) << 5 |			/* XXX */
155 		    0 << 5 |					/* XXX */
156 		    0x3 << 3);					/* XXX */
157 	}
158 	data = (pcireg_t)-1;
159 	alpha_mb();
160 	if (!(ba = badaddr(datap, sizeof *datap)))
161 		data = *datap;
162 	alpha_mb();
163 	alpha_mb();
164 
165 	if (secondary) {
166 		alpha_mb();
167 		REGVAL(CIA_CSR_CFG) = old_cfg;
168 		alpha_mb();
169 		splx(s);
170 	}
171 
172 	alpha_pal_draina();
173 	alpha_mb();
174 	errbits = REGVAL(CIA_CSR_CIA_ERR);
175 	if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) {
176 		ba = 1;
177 		data = 0xffffffff;
178 	}
179 
180 	if (errbits) {
181 		REGVAL(CIA_CSR_CIA_ERR) = errbits;
182 		alpha_mb();
183 		alpha_pal_draina();
184 	}
185 
186 #if 0
187 	printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
188 	    data, datap, ba ? " (badaddr)" : "");
189 #endif
190 
191 	return data;
192 }
193 
194 void
195 cia_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
196 {
197 	struct cia_config *ccp = cpv;
198 	pcireg_t *datap;
199 	int s, secondary;
200 	uint32_t old_cfg;
201 
202 	if ((unsigned int)offset >= PCI_CONF_SIZE)
203 		return;
204 
205 #ifdef __GNUC__
206 	s = 0;					/* XXX gcc -Wuninitialized */
207 	old_cfg = 0;				/* XXX gcc -Wuninitialized */
208 #endif
209 
210 	/* secondary if bus # != 0 */
211 	pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
212 	if (secondary) {
213 		s = splhigh();
214 		old_cfg = REGVAL(CIA_CSR_CFG);
215 		alpha_mb();
216 		REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
217 		alpha_mb();
218 	}
219 
220 	/*
221 	 * We just inline the BWX support, since this is the only
222 	 * difference between BWX and swiz for config space.
223 	 */
224 	if (ccp->cc_flags & CCF_PCI_USE_BWX) {
225 		if (secondary) {
226 			datap =
227 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
228 				tag | (offset & ~0x03));
229 		} else {
230 			datap =
231 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
232 				tag | (offset & ~0x03));
233 		}
234 	} else {
235 		datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
236 		    tag << 5UL |				/* XXX */
237 		    (offset & ~0x03) << 5 |			/* XXX */
238 		    0 << 5 |					/* XXX */
239 		    0x3 << 3);					/* XXX */
240 	}
241 	alpha_mb();
242 	*datap = data;
243 	alpha_mb();
244 	alpha_mb();
245 
246 	if (secondary) {
247 		alpha_mb();
248 		REGVAL(CIA_CSR_CFG) = old_cfg;
249 		alpha_mb();
250 		splx(s);
251 	}
252 
253 #if 0
254 	printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
255 	    reg, data, datap);
256 #endif
257 }
258