1 /* $NetBSD: apecs_dma.c,v 1.16 2008/04/28 20:23:11 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: apecs_dma.c,v 1.16 2008/04/28 20:23:11 martin Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 43 #include <uvm/uvm_extern.h> 44 45 #define _ALPHA_BUS_DMA_PRIVATE 46 #include <machine/bus.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <alpha/pci/apecsreg.h> 51 #include <alpha/pci/apecsvar.h> 52 53 bus_dma_tag_t apecs_dma_get_tag __P((bus_dma_tag_t, alpha_bus_t)); 54 55 int apecs_bus_dmamap_load_sgmap __P((bus_dma_tag_t, bus_dmamap_t, void *, 56 bus_size_t, struct proc *, int)); 57 58 int apecs_bus_dmamap_load_mbuf_sgmap __P((bus_dma_tag_t, bus_dmamap_t, 59 struct mbuf *, int)); 60 61 int apecs_bus_dmamap_load_uio_sgmap __P((bus_dma_tag_t, bus_dmamap_t, 62 struct uio *, int)); 63 64 int apecs_bus_dmamap_load_raw_sgmap __P((bus_dma_tag_t, bus_dmamap_t, 65 bus_dma_segment_t *, int, bus_size_t, int)); 66 67 void apecs_bus_dmamap_unload_sgmap __P((bus_dma_tag_t, bus_dmamap_t)); 68 69 /* 70 * Direct-mapped window: 1G at 1G 71 */ 72 #define APECS_DIRECT_MAPPED_BASE (1*1024*1024*1024) 73 #define APECS_DIRECT_MAPPED_SIZE (1*1024*1024*1024) 74 75 /* 76 * SGMAP window: 8M at 8M 77 */ 78 #define APECS_SGMAP_MAPPED_BASE (8*1024*1024) 79 #define APECS_SGMAP_MAPPED_SIZE (8*1024*1024) 80 81 /* APECS has a 256-byte out-bound DMA prefetch threshold. */ 82 #define APECS_SGMAP_PFTHRESH 256 83 84 /* 85 * Macro to flush APECS scatter/gather TLB. 86 */ 87 #define APECS_TLB_INVALIDATE() \ 88 do { \ 89 alpha_mb(); \ 90 REGVAL(EPIC_TBIA) = 0; \ 91 alpha_mb(); \ 92 } while (0) 93 94 void 95 apecs_dma_init(acp) 96 struct apecs_config *acp; 97 { 98 bus_addr_t tbase; 99 bus_dma_tag_t t; 100 101 /* 102 * Initialize the DMA tag used for direct-mapped DMA. 103 */ 104 t = &acp->ac_dmat_direct; 105 t->_cookie = acp; 106 t->_wbase = APECS_DIRECT_MAPPED_BASE; 107 t->_wsize = APECS_DIRECT_MAPPED_SIZE; 108 t->_next_window = NULL; 109 t->_boundary = 0; 110 t->_sgmap = NULL; 111 t->_get_tag = apecs_dma_get_tag; 112 t->_dmamap_create = _bus_dmamap_create; 113 t->_dmamap_destroy = _bus_dmamap_destroy; 114 t->_dmamap_load = _bus_dmamap_load_direct; 115 t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf_direct; 116 t->_dmamap_load_uio = _bus_dmamap_load_uio_direct; 117 t->_dmamap_load_raw = _bus_dmamap_load_raw_direct; 118 t->_dmamap_unload = _bus_dmamap_unload; 119 t->_dmamap_sync = _bus_dmamap_sync; 120 121 t->_dmamem_alloc = _bus_dmamem_alloc; 122 t->_dmamem_free = _bus_dmamem_free; 123 t->_dmamem_map = _bus_dmamem_map; 124 t->_dmamem_unmap = _bus_dmamem_unmap; 125 t->_dmamem_mmap = _bus_dmamem_mmap; 126 127 /* 128 * Initialize the DMA tag used for sgmap-mapped DMA. 129 */ 130 t = &acp->ac_dmat_sgmap; 131 t->_cookie = acp; 132 t->_wbase = APECS_SGMAP_MAPPED_BASE; 133 t->_wsize = APECS_SGMAP_MAPPED_SIZE; 134 t->_next_window = NULL; 135 t->_boundary = 0; 136 t->_sgmap = &acp->ac_sgmap; 137 t->_pfthresh = APECS_SGMAP_PFTHRESH; 138 t->_get_tag = apecs_dma_get_tag; 139 t->_dmamap_create = alpha_sgmap_dmamap_create; 140 t->_dmamap_destroy = alpha_sgmap_dmamap_destroy; 141 t->_dmamap_load = apecs_bus_dmamap_load_sgmap; 142 t->_dmamap_load_mbuf = apecs_bus_dmamap_load_mbuf_sgmap; 143 t->_dmamap_load_uio = apecs_bus_dmamap_load_uio_sgmap; 144 t->_dmamap_load_raw = apecs_bus_dmamap_load_raw_sgmap; 145 t->_dmamap_unload = apecs_bus_dmamap_unload_sgmap; 146 t->_dmamap_sync = _bus_dmamap_sync; 147 148 t->_dmamem_alloc = _bus_dmamem_alloc; 149 t->_dmamem_free = _bus_dmamem_free; 150 t->_dmamem_map = _bus_dmamem_map; 151 t->_dmamem_unmap = _bus_dmamem_unmap; 152 t->_dmamem_mmap = _bus_dmamem_mmap; 153 154 /* 155 * The firmware has set up window 2 as a 1G direct-mapped DMA 156 * window beginning at 1G. We leave it alone. Disable 157 * window 1. 158 */ 159 REGVAL(EPIC_PCI_BASE_1) = 0; 160 alpha_mb(); 161 162 /* 163 * Initialize the SGMAP. 164 */ 165 alpha_sgmap_init(t, &acp->ac_sgmap, "apecs_sgmap", 166 APECS_SGMAP_MAPPED_BASE, 0, APECS_SGMAP_MAPPED_SIZE, 167 sizeof(u_int64_t), NULL, 0); 168 169 /* 170 * Set up window 1 as an 8MB SGMAP-mapped window 171 * starting at 8MB. 172 */ 173 REGVAL(EPIC_PCI_BASE_1) = APECS_SGMAP_MAPPED_BASE | 174 EPIC_PCI_BASE_SGEN | EPIC_PCI_BASE_WENB; 175 alpha_mb(); 176 177 REGVAL(EPIC_PCI_MASK_1) = EPIC_PCI_MASK_8M; 178 alpha_mb(); 179 180 tbase = acp->ac_sgmap.aps_ptpa >> EPIC_TBASE_SHIFT; 181 if ((tbase & EPIC_TBASE_T_BASE) != tbase) 182 panic("apecs_dma_init: bad page table address"); 183 REGVAL(EPIC_TBASE_1) = tbase; 184 alpha_mb(); 185 186 APECS_TLB_INVALIDATE(); 187 188 /* XXX XXX BEGIN XXX XXX */ 189 { /* XXX */ 190 extern paddr_t alpha_XXX_dmamap_or; /* XXX */ 191 alpha_XXX_dmamap_or = APECS_DIRECT_MAPPED_BASE; /* XXX */ 192 } /* XXX */ 193 /* XXX XXX END XXX XXX */ 194 } 195 196 /* 197 * Return the bus dma tag to be used for the specified bus type. 198 * INTERNAL USE ONLY! 199 */ 200 bus_dma_tag_t 201 apecs_dma_get_tag(t, bustype) 202 bus_dma_tag_t t; 203 alpha_bus_t bustype; 204 { 205 struct apecs_config *acp = t->_cookie; 206 207 switch (bustype) { 208 case ALPHA_BUS_PCI: 209 case ALPHA_BUS_EISA: 210 /* 211 * Systems with an APECS can only support 1G 212 * of memory, so we use the direct-mapped window 213 * on busses that have 32-bit DMA. 214 */ 215 return (&acp->ac_dmat_direct); 216 217 case ALPHA_BUS_ISA: 218 /* 219 * ISA doesn't have enough address bits to use 220 * the direct-mapped DMA window, so we must use 221 * SGMAPs. 222 */ 223 return (&acp->ac_dmat_sgmap); 224 225 default: 226 panic("apecs_dma_get_tag: shouldn't be here, really..."); 227 } 228 } 229 230 /* 231 * Load an APECS SGMAP-mapped DMA map with a linear buffer. 232 */ 233 int 234 apecs_bus_dmamap_load_sgmap(t, map, buf, buflen, p, flags) 235 bus_dma_tag_t t; 236 bus_dmamap_t map; 237 void *buf; 238 bus_size_t buflen; 239 struct proc *p; 240 int flags; 241 { 242 int error; 243 244 error = pci_sgmap_pte64_load(t, map, buf, buflen, p, flags, 245 t->_sgmap); 246 if (error == 0) 247 APECS_TLB_INVALIDATE(); 248 249 return (error); 250 } 251 252 /* 253 * Load an APECS SGMAP-mapped DMA map with an mbuf chain. 254 */ 255 int 256 apecs_bus_dmamap_load_mbuf_sgmap(t, map, m, flags) 257 bus_dma_tag_t t; 258 bus_dmamap_t map; 259 struct mbuf *m; 260 int flags; 261 { 262 int error; 263 264 error = pci_sgmap_pte64_load_mbuf(t, map, m, flags, t->_sgmap); 265 if (error == 0) 266 APECS_TLB_INVALIDATE(); 267 268 return (error); 269 } 270 271 /* 272 * Load an APECS SGMAP-mapped DMA map with a uio. 273 */ 274 int 275 apecs_bus_dmamap_load_uio_sgmap(t, map, uio, flags) 276 bus_dma_tag_t t; 277 bus_dmamap_t map; 278 struct uio *uio; 279 int flags; 280 { 281 int error; 282 283 error = pci_sgmap_pte64_load_uio(t, map, uio, flags, t->_sgmap); 284 if (error == 0) 285 APECS_TLB_INVALIDATE(); 286 287 return (error); 288 } 289 290 /* 291 * Load an APECS SGMAP-mapped DMA map with raw memory. 292 */ 293 int 294 apecs_bus_dmamap_load_raw_sgmap(t, map, segs, nsegs, size, flags) 295 bus_dma_tag_t t; 296 bus_dmamap_t map; 297 bus_dma_segment_t *segs; 298 int nsegs; 299 bus_size_t size; 300 int flags; 301 { 302 int error; 303 304 error = pci_sgmap_pte64_load_raw(t, map, segs, nsegs, size, flags, 305 t->_sgmap); 306 if (error == 0) 307 APECS_TLB_INVALIDATE(); 308 309 return (error); 310 } 311 312 /* 313 * Unload an APECS DMA map. 314 */ 315 void 316 apecs_bus_dmamap_unload_sgmap(t, map) 317 bus_dma_tag_t t; 318 bus_dmamap_t map; 319 { 320 321 /* 322 * Invalidate any SGMAP page table entries used by this 323 * mapping. 324 */ 325 pci_sgmap_pte64_unload(t, map, t->_sgmap); 326 APECS_TLB_INVALIDATE(); 327 328 /* 329 * Do the generic bits of the unload. 330 */ 331 _bus_dmamap_unload(t, map); 332 } 333