1 /* $NetBSD: apecs.c,v 1.45 2005/12/11 12:16:17 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 41 * All rights reserved. 42 * 43 * Author: Chris G. Demetriou 44 * 45 * Permission to use, copy, modify and distribute this software and 46 * its documentation is hereby granted, provided that both the copyright 47 * notice and this permission notice appear in all copies of the 48 * software, derivative works or modified versions, and any portions 49 * thereof, and that both notices appear in supporting documentation. 50 * 51 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 52 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 53 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 54 * 55 * Carnegie Mellon requests users of this software to return to 56 * 57 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 58 * School of Computer Science 59 * Carnegie Mellon University 60 * Pittsburgh PA 15213-3890 61 * 62 * any improvements or extensions that they make and grant Carnegie the 63 * rights to redistribute these changes. 64 */ 65 66 #include "opt_dec_2100_a50.h" 67 #include "opt_dec_eb64plus.h" 68 #include "opt_dec_1000a.h" 69 #include "opt_dec_1000.h" 70 71 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 72 73 __KERNEL_RCSID(0, "$NetBSD: apecs.c,v 1.45 2005/12/11 12:16:17 christos Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/malloc.h> 79 #include <sys/device.h> 80 81 #include <uvm/uvm_extern.h> 82 83 #include <machine/autoconf.h> 84 #include <machine/rpb.h> 85 #include <machine/sysarch.h> 86 87 #include <dev/isa/isareg.h> 88 #include <dev/isa/isavar.h> 89 90 #include <dev/pci/pcireg.h> 91 #include <dev/pci/pcivar.h> 92 #include <alpha/pci/apecsreg.h> 93 #include <alpha/pci/apecsvar.h> 94 #ifdef DEC_2100_A50 95 #include <alpha/pci/pci_2100_a50.h> 96 #endif 97 #ifdef DEC_EB64PLUS 98 #include <alpha/pci/pci_eb64plus.h> 99 #endif 100 #ifdef DEC_1000A 101 #include <alpha/pci/pci_1000a.h> 102 #endif 103 #ifdef DEC_1000 104 #include <alpha/pci/pci_1000.h> 105 #endif 106 107 int apecsmatch __P((struct device *, struct cfdata *, void *)); 108 void apecsattach __P((struct device *, struct device *, void *)); 109 110 CFATTACH_DECL(apecs, sizeof(struct apecs_softc), 111 apecsmatch, apecsattach, NULL, NULL); 112 113 extern struct cfdriver apecs_cd; 114 115 int apecs_bus_get_window __P((int, int, 116 struct alpha_bus_space_translation *)); 117 118 /* There can be only one. */ 119 int apecsfound; 120 struct apecs_config apecs_configuration; 121 122 int 123 apecsmatch(parent, match, aux) 124 struct device *parent; 125 struct cfdata *match; 126 void *aux; 127 { 128 struct mainbus_attach_args *ma = aux; 129 130 /* Make sure that we're looking for an APECS. */ 131 if (strcmp(ma->ma_name, apecs_cd.cd_name) != 0) 132 return (0); 133 134 if (apecsfound) 135 return (0); 136 137 return (1); 138 } 139 140 /* 141 * Set up the chipset's function pointers. 142 */ 143 void 144 apecs_init(acp, mallocsafe) 145 struct apecs_config *acp; 146 int mallocsafe; 147 { 148 acp->ac_comanche_pass2 = 149 (REGVAL(COMANCHE_ED) & COMANCHE_ED_PASS2) != 0; 150 acp->ac_memwidth = 151 (REGVAL(COMANCHE_GCR) & COMANCHE_GCR_WIDEMEM) != 0 ? 128 : 64; 152 acp->ac_epic_pass2 = 153 (REGVAL(EPIC_DCSR) & EPIC_DCSR_PASS2) != 0; 154 155 acp->ac_haxr1 = REGVAL(EPIC_HAXR1); 156 acp->ac_haxr2 = REGVAL(EPIC_HAXR2); 157 158 if (!acp->ac_initted) { 159 /* don't do these twice since they set up extents */ 160 apecs_bus_io_init(&acp->ac_iot, acp); 161 apecs_bus_mem_init(&acp->ac_memt, acp); 162 163 /* 164 * We have two I/O windows and 3 MEM windows. 165 */ 166 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 2; 167 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3; 168 alpha_bus_get_window = apecs_bus_get_window; 169 } 170 acp->ac_mallocsafe = mallocsafe; 171 172 apecs_pci_init(&acp->ac_pc, acp); 173 alpha_pci_chipset = &acp->ac_pc; 174 175 acp->ac_initted = 1; 176 } 177 178 void 179 apecsattach(parent, self, aux) 180 struct device *parent, *self; 181 void *aux; 182 { 183 struct apecs_softc *sc = (struct apecs_softc *)self; 184 struct apecs_config *acp; 185 struct pcibus_attach_args pba; 186 187 /* note that we've attached the chipset; can't have 2 APECSes. */ 188 apecsfound = 1; 189 190 /* 191 * set up the chipset's info; done once at console init time 192 * (maybe), but doesn't hurt to do twice. 193 */ 194 acp = sc->sc_acp = &apecs_configuration; 195 apecs_init(acp, 1); 196 197 apecs_dma_init(acp); 198 199 printf(": DECchip %s Core Logic chipset\n", 200 acp->ac_memwidth == 128 ? "21072" : "21071"); 201 printf("%s: DC21071-CA pass %d, %d-bit memory bus\n", 202 self->dv_xname, acp->ac_comanche_pass2 ? 2 : 1, acp->ac_memwidth); 203 printf("%s: DC21071-DA pass %d\n", self->dv_xname, 204 acp->ac_epic_pass2 ? 2 : 1); 205 /* XXX print bcache size */ 206 207 if (!acp->ac_epic_pass2) 208 printf("WARNING: 21071-DA NOT PASS2... NO BETS...\n"); 209 210 switch (cputype) { 211 #ifdef DEC_2100_A50 212 case ST_DEC_2100_A50: 213 pci_2100_a50_pickintr(acp); 214 break; 215 #endif 216 217 #ifdef DEC_EB64PLUS 218 case ST_EB64P: 219 pci_eb64plus_pickintr(acp); 220 break; 221 #endif 222 223 #ifdef DEC_1000A 224 case ST_DEC_1000A: 225 pci_1000a_pickintr(acp, &acp->ac_iot, &acp->ac_memt, 226 &acp->ac_pc); 227 break; 228 #endif 229 230 #ifdef DEC_1000 231 case ST_DEC_1000: 232 pci_1000_pickintr(acp, &acp->ac_iot, &acp->ac_memt, 233 &acp->ac_pc); 234 break; 235 #endif 236 237 default: 238 panic("apecsattach: shouldn't be here, really..."); 239 } 240 241 pba.pba_iot = &acp->ac_iot; 242 pba.pba_memt = &acp->ac_memt; 243 pba.pba_dmat = 244 alphabus_dma_get_tag(&acp->ac_dmat_direct, ALPHA_BUS_PCI); 245 pba.pba_dmat64 = NULL; 246 pba.pba_pc = &acp->ac_pc; 247 pba.pba_bus = 0; 248 pba.pba_bridgetag = NULL; 249 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 250 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 251 config_found_ia(self, "pcibus", &pba, pcibusprint); 252 } 253 254 int 255 apecs_bus_get_window(type, window, abst) 256 int type, window; 257 struct alpha_bus_space_translation *abst; 258 { 259 struct apecs_config *acp = &apecs_configuration; 260 bus_space_tag_t st; 261 262 switch (type) { 263 case ALPHA_BUS_TYPE_PCI_IO: 264 st = &acp->ac_iot; 265 break; 266 267 case ALPHA_BUS_TYPE_PCI_MEM: 268 st = &acp->ac_memt; 269 break; 270 271 default: 272 panic("apecs_bus_get_window"); 273 } 274 275 return (alpha_bus_space_get_window(st, window, abst)); 276 } 277