xref: /netbsd-src/sys/arch/alpha/include/lock.h (revision de1dfb1250df962f1ff3a011772cf58e605aed11)
1 /* $NetBSD: lock.h,v 1.19 2003/09/26 22:46:00 nathanw Exp $ */
2 
3 /*-
4  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * Machine-dependent spin lock operations.
42  */
43 
44 #ifndef _ALPHA_LOCK_H_
45 #define	_ALPHA_LOCK_H_
46 
47 #ifdef _KERNEL_OPT
48 #include "opt_multiprocessor.h"
49 #endif
50 
51 static __inline void
52 __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
53 {
54 
55 	__asm __volatile(
56 		"# BEGIN __cpu_simple_lock_init\n"
57 		"	stl	$31, %0		\n"
58 		"	mb			\n"
59 		"	# END __cpu_simple_lock_init"
60 		: "=m" (*alp));
61 }
62 
63 static __inline void
64 __cpu_simple_lock(__cpu_simple_lock_t *alp)
65 {
66 	unsigned long t0;
67 
68 	/*
69 	 * Note, if we detect that the lock is held when
70 	 * we do the initial load-locked, we spin using
71 	 * a non-locked load to save the coherency logic
72 	 * some work.
73 	 */
74 
75 	__asm __volatile(
76 		"# BEGIN __cpu_simple_lock\n"
77 		"1:	ldl_l	%0, %3		\n"
78 		"	bne	%0, 2f		\n"
79 		"	bis	$31, %2, %0	\n"
80 		"	stl_c	%0, %1		\n"
81 		"	beq	%0, 3f		\n"
82 		"	mb			\n"
83 		"	br	4f		\n"
84 		"2:	ldl	%0, %3		\n"
85 		"	beq	%0, 1b		\n"
86 		"	br	2b		\n"
87 		"3:	br	1b		\n"
88 		"4:				\n"
89 		"	# END __cpu_simple_lock\n"
90 		: "=&r" (t0), "=m" (*alp)
91 		: "i" (__SIMPLELOCK_LOCKED), "m" (*alp)
92 		: "memory");
93 }
94 
95 static __inline int
96 __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
97 {
98 	unsigned long t0, v0;
99 
100 	__asm __volatile(
101 		"# BEGIN __cpu_simple_lock_try\n"
102 		"1:	ldl_l	%0, %4		\n"
103 		"	bne	%0, 2f		\n"
104 		"	bis	$31, %3, %0	\n"
105 		"	stl_c	%0, %2		\n"
106 		"	beq	%0, 3f		\n"
107 		"	mb			\n"
108 		"	bis	$31, 1, %1	\n"
109 		"	br	4f		\n"
110 		"2:	bis	$31, $31, %1	\n"
111 		"	br	4f		\n"
112 		"3:	br	1b		\n"
113 		"4:				\n"
114 		"	# END __cpu_simple_lock_try"
115 		: "=&r" (t0), "=r" (v0), "=m" (*alp)
116 		: "i" (__SIMPLELOCK_LOCKED), "m" (*alp)
117 		: "memory");
118 
119 	return (v0 != 0);
120 }
121 
122 static __inline void
123 __cpu_simple_unlock(__cpu_simple_lock_t *alp)
124 {
125 
126 	__asm __volatile(
127 		"# BEGIN __cpu_simple_unlock\n"
128 		"	mb			\n"
129 		"	stl	$31, %0		\n"
130 		"	# END __cpu_simple_unlock"
131 		: "=m" (*alp));
132 }
133 
134 #if defined(MULTIPROCESSOR)
135 /*
136  * On the Alpha, interprocessor interrupts come in at device priority
137  * level.  This can cause some problems while waiting for r/w spinlocks
138  * from a high'ish priority level: IPIs that come in will not be processed.
139  * This can lead to deadlock.
140  *
141  * This hook allows IPIs to be processed while a spinlock's interlock
142  * is released.
143  */
144 #define	SPINLOCK_SPIN_HOOK						\
145 do {									\
146 	struct cpu_info *__ci = curcpu();				\
147 	int __s;							\
148 									\
149 	if (__ci->ci_ipis != 0) {					\
150 		/* printf("CPU %lu has IPIs pending\n",			\
151 		    __ci->ci_cpuid); */					\
152 		__s = splipi();						\
153 		alpha_ipi_process(__ci, NULL);				\
154 		splx(__s);						\
155 	}								\
156 } while (0)
157 #endif /* MULTIPROCESSOR */
158 
159 #endif /* _ALPHA_LOCK_H_ */
160