xref: /netbsd-src/sys/arch/alpha/include/intr.h (revision 8ac07aec990b9d2e483062509d0a9fa5b4f57cf2)
1 /* $NetBSD: intr.h,v 1.65 2008/04/24 10:01:37 he Exp $ */
2 
3 /*-
4  * Copyright (c) 2000, 2001, 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the NetBSD
21  *	Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Copyright (c) 1997 Christopher G. Demetriou.  All rights reserved.
41  * Copyright (c) 1996 Carnegie-Mellon University.
42  * All rights reserved.
43  *
44  * Author: Chris G. Demetriou
45  *
46  * Permission to use, copy, modify and distribute this software and
47  * its documentation is hereby granted, provided that both the copyright
48  * notice and this permission notice appear in all copies of the
49  * software, derivative works or modified versions, and any portions
50  * thereof, and that both notices appear in supporting documentation.
51  *
52  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
53  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
54  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
55  *
56  * Carnegie Mellon requests users of this software to return to
57  *
58  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
59  *  School of Computer Science
60  *  Carnegie Mellon University
61  *  Pittsburgh PA 15213-3890
62  *
63  * any improvements or extensions that they make and grant Carnegie the
64  * rights to redistribute these changes.
65  */
66 
67 #ifndef _ALPHA_INTR_H_
68 #define _ALPHA_INTR_H_
69 
70 #include <sys/evcnt.h>
71 #include <machine/cpu.h>
72 
73 /*
74  * The Alpha System Control Block.  This is 8k long, and you get
75  * 16 bytes per vector (i.e. the vector numbers are spaced 16
76  * apart).
77  *
78  * This is sort of a "shadow" SCB -- rather than the CPU jumping
79  * to (SCBaddr + (16 * vector)), like it does on the VAX, we get
80  * a vector number in a1.  We use the SCB to look up a routine/arg
81  * and jump to it.
82  *
83  * Since we use the SCB only for I/O interrupts, we make it shorter
84  * than normal, starting it at vector 0x800 (the start of the I/O
85  * interrupt vectors).
86  */
87 #define	SCB_IOVECBASE	0x0800
88 #define	SCB_VECSIZE	0x0010
89 #define	SCB_SIZE	0x2000
90 
91 #define	SCB_VECTOIDX(x)	((x) >> 4)
92 #define	SCB_IDXTOVEC(x)	((x) << 4)
93 
94 #define	SCB_NIOVECS	SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE)
95 
96 struct scbvec {
97 	void	(*scb_func)(void *, u_long);
98 	void	*scb_arg;
99 };
100 
101 /*
102  * Alpha interrupts come in at one of 4 levels:
103  *
104  *	software interrupt level
105  *	i/o level 1
106  *	i/o level 2
107  *	clock level
108  *
109  * However, since we do not have any way to know which hardware
110  * level a particular i/o interrupt comes in on, we have to
111  * whittle it down to 3.
112  */
113 
114 #define	IPL_NONE	0	/* no interrupt level */
115 #define	IPL_SOFTCLOCK	1	/* generic software interrupts */
116 #define	IPL_SOFTBIO	1	/* generic software interrupts */
117 #define	IPL_SOFTNET	1	/* generic software interrupts */
118 #define	IPL_SOFTSERIAL	1	/* generic software interrupts */
119 #define	IPL_VM		2	/* interrupts that can alloc mem */
120 #define	IPL_SCHED	3	/* clock interrupts */
121 #define	IPL_HIGH	4	/* all interrupts */
122 
123 typedef int ipl_t;
124 typedef struct {
125 	uint8_t _psl;
126 } ipl_cookie_t;
127 
128 ipl_cookie_t makeiplcookie(ipl_t);
129 
130 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
131 #define	IST_NONE	0	/* none (dummy) */
132 #define	IST_PULSE	1	/* pulsed */
133 #define	IST_EDGE	2	/* edge-triggered */
134 #define	IST_LEVEL	3	/* level-triggered */
135 
136 #ifdef	_KERNEL
137 
138 /* Simulated software interrupt register. */
139 extern volatile unsigned long ssir;
140 
141 /* IPL-lowering/restoring macros */
142 void	spl0(void);
143 
144 static __inline void
145 splx(int s)
146 {
147 	if (s == ALPHA_PSL_IPL_0 && ssir != 0)
148 		spl0();
149 	else
150 		alpha_pal_swpipl(s);
151 }
152 /* IPL-raising functions/macros */
153 static __inline int
154 _splraise(int s)
155 {
156 	int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK;
157 	return (s > cur ? alpha_pal_swpipl(s) : cur);
158 }
159 
160 #define	splraiseipl(icookie)	_splraise((icookie)._psl)
161 
162 #include <sys/spl.h>
163 
164 /*
165  * Interprocessor interrupts.  In order how we want them processed.
166  */
167 #define	ALPHA_IPI_HALT			(1UL << 0)
168 #define	ALPHA_IPI_MICROSET		(1UL << 1)
169 #define	ALPHA_IPI_SHOOTDOWN		(1UL << 2)
170 #define	ALPHA_IPI_IMB			(1UL << 3)
171 #define	ALPHA_IPI_AST			(1UL << 4)
172 #define	ALPHA_IPI_SYNCH_FPU		(1UL << 5)
173 #define	ALPHA_IPI_DISCARD_FPU		(1UL << 6)
174 #define	ALPHA_IPI_PAUSE			(1UL << 7)
175 #define	ALPHA_IPI_PMAP_REACTIVATE	(1UL << 8)
176 
177 #define	ALPHA_NIPIS		9	/* must not exceed 64 */
178 
179 struct cpu_info;
180 struct trapframe;
181 
182 void	alpha_ipi_init(struct cpu_info *);
183 void	alpha_ipi_process(struct cpu_info *, struct trapframe *);
184 void	alpha_send_ipi(unsigned long, unsigned long);
185 void	alpha_broadcast_ipi(unsigned long);
186 void	alpha_multicast_ipi(unsigned long, unsigned long);
187 
188 /*
189  * Alpha shared-interrupt-line common code.
190  */
191 
192 struct alpha_shared_intrhand {
193 	TAILQ_ENTRY(alpha_shared_intrhand)
194 		ih_q;
195 	struct alpha_shared_intr *ih_intrhead;
196 	int	(*ih_fn)(void *);
197 	void	*ih_arg;
198 	int	ih_level;
199 	unsigned int ih_num;
200 };
201 
202 struct alpha_shared_intr {
203 	TAILQ_HEAD(,alpha_shared_intrhand)
204 		intr_q;
205 	struct evcnt intr_evcnt;
206 	char	*intr_string;
207 	void	*intr_private;
208 	int	intr_sharetype;
209 	int	intr_dfltsharetype;
210 	int	intr_nstrays;
211 	int	intr_maxstrays;
212 };
213 
214 #define	ALPHA_SHARED_INTR_DISABLE(asi, num)				\
215 	((asi)[num].intr_maxstrays != 0 &&				\
216 	 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays)
217 
218 void	softintr_dispatch(void);
219 
220 struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int, unsigned int);
221 int	alpha_shared_intr_dispatch(struct alpha_shared_intr *,
222 	    unsigned int);
223 void	*alpha_shared_intr_establish(struct alpha_shared_intr *,
224 	    unsigned int, int, int, int (*)(void *), void *, const char *);
225 void	alpha_shared_intr_disestablish(struct alpha_shared_intr *,
226 	    void *, const char *);
227 int	alpha_shared_intr_get_sharetype(struct alpha_shared_intr *,
228 	    unsigned int);
229 int	alpha_shared_intr_isactive(struct alpha_shared_intr *,
230 	    unsigned int);
231 int	alpha_shared_intr_firstactive(struct alpha_shared_intr *,
232 	    unsigned int);
233 void	alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *,
234 	    unsigned int, int);
235 void	alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *,
236 	    unsigned int, int);
237 void	alpha_shared_intr_reset_strays(struct alpha_shared_intr *,
238 	    unsigned int);
239 void	alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int,
240 	    const char *);
241 void	alpha_shared_intr_set_private(struct alpha_shared_intr *,
242 	    unsigned int, void *);
243 void	*alpha_shared_intr_get_private(struct alpha_shared_intr *,
244 	    unsigned int);
245 char	*alpha_shared_intr_string(struct alpha_shared_intr *,
246 	    unsigned int);
247 struct evcnt *alpha_shared_intr_evcnt(struct alpha_shared_intr *,
248 	    unsigned int);
249 
250 extern struct scbvec scb_iovectab[];
251 
252 void	scb_init(void);
253 void	scb_set(u_long, void (*)(void *, u_long), void *, int);
254 u_long	scb_alloc(void (*)(void *, u_long), void *);
255 void	scb_free(u_long);
256 
257 #define	SCB_ALLOC_FAILED	((u_long) -1)
258 
259 #endif /* _KERNEL */
260 #endif /* ! _ALPHA_INTR_H_ */
261