xref: /netbsd-src/sys/arch/alpha/include/frame.h (revision ba0aa175c4da9ccc83d06676ced52fbcbd994030)
1*ba0aa175Smaxv /* $NetBSD: frame.h,v 1.10 2019/03/25 19:24:30 maxv Exp $ */
285854cb4Scgd 
385854cb4Scgd /*
485854cb4Scgd  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
585854cb4Scgd  * All rights reserved.
685854cb4Scgd  *
785854cb4Scgd  * Author: Chris G. Demetriou
885854cb4Scgd  *
985854cb4Scgd  * Permission to use, copy, modify and distribute this software and
1085854cb4Scgd  * its documentation is hereby granted, provided that both the copyright
1185854cb4Scgd  * notice and this permission notice appear in all copies of the
1285854cb4Scgd  * software, derivative works or modified versions, and any portions
1385854cb4Scgd  * thereof, and that both notices appear in supporting documentation.
1485854cb4Scgd  *
1585854cb4Scgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
1685854cb4Scgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
1785854cb4Scgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
1885854cb4Scgd  *
1985854cb4Scgd  * Carnegie Mellon requests users of this software to return to
2085854cb4Scgd  *
2185854cb4Scgd  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
2285854cb4Scgd  *  School of Computer Science
2385854cb4Scgd  *  Carnegie Mellon University
2485854cb4Scgd  *  Pittsburgh PA 15213-3890
2585854cb4Scgd  *
2685854cb4Scgd  * any improvements or extensions that they make and grant Carnegie the
2785854cb4Scgd  * rights to redistribute these changes.
2885854cb4Scgd  */
2985854cb4Scgd 
3085854cb4Scgd #ifndef _ALPHA_FRAME_H_
3185854cb4Scgd #define	_ALPHA_FRAME_H_
3285854cb4Scgd 
334d024971Scgd #include <machine/alpha_cpu.h>
34f80749c1She #include <sys/signal.h>
3585854cb4Scgd 
3685854cb4Scgd /*
3710569738Scgd  * Software trap, exception, and syscall frame.
3885854cb4Scgd  *
3910569738Scgd  * Includes "hardware" (PALcode) frame.
4010569738Scgd  *
4110569738Scgd  * PALcode puts ALPHA_HWFRAME_* fields on stack.  We have to add
4210569738Scgd  * all of the general-purpose registers except for zero, for sp
4310569738Scgd  * (which is automatically saved in the PCB's USP field for entries
4410569738Scgd  * from user mode, and which is implicitly saved and restored by the
4510569738Scgd  * calling conventions for entries from kernel mode), and (on traps
4610569738Scgd  * and exceptions) for a0, a1, and a2 (which are saved by PALcode).
4785854cb4Scgd  */
4885854cb4Scgd 
4910569738Scgd /* Quadword offsets of the registers to be saved. */
5085854cb4Scgd #define	FRAME_V0	0
5185854cb4Scgd #define	FRAME_T0	1
5285854cb4Scgd #define	FRAME_T1	2
5385854cb4Scgd #define	FRAME_T2	3
5485854cb4Scgd #define	FRAME_T3	4
5585854cb4Scgd #define	FRAME_T4	5
5685854cb4Scgd #define	FRAME_T5	6
5785854cb4Scgd #define	FRAME_T6	7
5885854cb4Scgd #define	FRAME_T7	8
5985854cb4Scgd #define	FRAME_S0	9
6085854cb4Scgd #define	FRAME_S1	10
6185854cb4Scgd #define	FRAME_S2	11
6285854cb4Scgd #define	FRAME_S3	12
6385854cb4Scgd #define	FRAME_S4	13
6485854cb4Scgd #define	FRAME_S5	14
6585854cb4Scgd #define	FRAME_S6	15
6685854cb4Scgd #define	FRAME_A3	16
6785854cb4Scgd #define	FRAME_A4	17
6885854cb4Scgd #define	FRAME_A5	18
6985854cb4Scgd #define	FRAME_T8	19
7085854cb4Scgd #define	FRAME_T9	20
7185854cb4Scgd #define	FRAME_T10	21
7285854cb4Scgd #define	FRAME_T11	22
7385854cb4Scgd #define	FRAME_RA	23
7485854cb4Scgd #define	FRAME_T12	24
7585854cb4Scgd #define	FRAME_AT	25
7685854cb4Scgd #define	FRAME_SP	26
7710569738Scgd 
7810569738Scgd #define	FRAME_SW_SIZE	(FRAME_SP + 1)
7910569738Scgd #define	FRAME_HW_OFFSET	FRAME_SW_SIZE
8010569738Scgd 
8110569738Scgd #define	FRAME_PS	(FRAME_HW_OFFSET + ALPHA_HWFRAME_PS)
8210569738Scgd #define	FRAME_PC	(FRAME_HW_OFFSET + ALPHA_HWFRAME_PC)
8310569738Scgd #define	FRAME_GP	(FRAME_HW_OFFSET + ALPHA_HWFRAME_GP)
8410569738Scgd #define	FRAME_A0	(FRAME_HW_OFFSET + ALPHA_HWFRAME_A0)
8510569738Scgd #define	FRAME_A1	(FRAME_HW_OFFSET + ALPHA_HWFRAME_A1)
8610569738Scgd #define	FRAME_A2	(FRAME_HW_OFFSET + ALPHA_HWFRAME_A2)
8710569738Scgd 
8810569738Scgd #define	FRAME_HW_SIZE	ALPHA_HWFRAME_SIZE
8910569738Scgd #define	FRAME_SIZE	(FRAME_HW_OFFSET + FRAME_HW_SIZE)
9085854cb4Scgd 
9185854cb4Scgd struct trapframe {
9210569738Scgd 	unsigned long	tf_regs[FRAME_SIZE];	/* See above */
9385854cb4Scgd };
9485854cb4Scgd 
95*ba0aa175Smaxv #if defined(COMPAT_16) && defined(_KERNEL)
968d474d5aSskd struct sigframe_sigcontext {
978d474d5aSskd 	/*  ra address of trampoline */
988d474d5aSskd 	/*  a0 signum for handler */
998d474d5aSskd 	/*  a1 code for handler */
1008d474d5aSskd 	/*  a2 struct	sigcontext for handler */
1018d474d5aSskd 	struct sigcontext sf_sc; /* actual saved context */
1028d474d5aSskd };
1038d474d5aSskd #endif
1048d474d5aSskd 
1058d474d5aSskd struct sigframe_siginfo {
1068d474d5aSskd 	/*  ra address of trampoline */
1078d474d5aSskd         /*  a0 signal number arg for handler */
1088d474d5aSskd 	/*  a1 siginfo_t * arg for handler */
1098d474d5aSskd 	/*  a2 ucontext_t * arg for handler */
1108d474d5aSskd 	siginfo_t sf_si; /* actual saved siginfo */
1118d474d5aSskd 	ucontext_t sf_uc; /* actual saved ucontext */
1128d474d5aSskd };
1138d474d5aSskd 
1148d474d5aSskd #ifdef _KERNEL
1158d474d5aSskd void *getframe(const struct lwp *, int, int *);
1168d474d5aSskd void buildcontext(struct lwp *, const void *, const void *, const void *);
1178d474d5aSskd void sendsig_siginfo(const ksiginfo_t *, const sigset_t *);
118*ba0aa175Smaxv #if defined(COMPAT_16)
1198d474d5aSskd void sendsig_sigcontext(const ksiginfo_t *, const sigset_t *);
1208d474d5aSskd #endif
1218d474d5aSskd #endif
1228d474d5aSskd 
12385854cb4Scgd #endif /* _ALPHA_FRAME_H_ */
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