1 /* $NetBSD: cpu.h,v 1.60 2003/02/05 12:16:43 nakayama Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center, and by Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1988 University of Utah. 42 * Copyright (c) 1982, 1990, 1993 43 * The Regents of the University of California. All rights reserved. 44 * 45 * This code is derived from software contributed to Berkeley by 46 * the Systems Programming Group of the University of Utah Computer 47 * Science Department. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 1. Redistributions of source code must retain the above copyright 53 * notice, this list of conditions and the following disclaimer. 54 * 2. Redistributions in binary form must reproduce the above copyright 55 * notice, this list of conditions and the following disclaimer in the 56 * documentation and/or other materials provided with the distribution. 57 * 3. All advertising materials mentioning features or use of this software 58 * must display the following acknowledgement: 59 * This product includes software developed by the University of 60 * California, Berkeley and its contributors. 61 * 4. Neither the name of the University nor the names of its contributors 62 * may be used to endorse or promote products derived from this software 63 * without specific prior written permission. 64 * 65 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 66 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 68 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 69 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 70 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 71 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 72 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 73 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 74 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 75 * SUCH DAMAGE. 76 * 77 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 78 * 79 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 80 */ 81 82 #ifndef _ALPHA_CPU_H_ 83 #define _ALPHA_CPU_H_ 84 85 #if defined(_KERNEL_OPT) 86 #include "opt_multiprocessor.h" 87 #include "opt_lockdebug.h" 88 #endif 89 90 /* 91 * Exported definitions unique to Alpha cpu support. 92 */ 93 94 #include <machine/alpha_cpu.h> 95 96 #ifdef _KERNEL 97 #include <sys/sched.h> 98 #include <machine/frame.h> 99 100 /* 101 * Machine check information. 102 */ 103 struct mchkinfo { 104 __volatile int mc_expected; /* machine check is expected */ 105 __volatile int mc_received; /* machine check was received */ 106 }; 107 108 struct cpu_info { 109 /* 110 * Public members. 111 */ 112 struct schedstate_percpu ci_schedstate; /* scheduler state */ 113 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 114 u_long ci_spin_locks; /* # of spin locks held */ 115 u_long ci_simple_locks; /* # of simple locks held */ 116 #endif 117 struct lwp *ci_curlwp; /* current owner of the processor */ 118 struct cpu_info *ci_next; /* next cpu_info structure */ 119 120 /* 121 * Private members. 122 */ 123 struct mchkinfo ci_mcinfo; /* machine check info */ 124 cpuid_t ci_cpuid; /* our CPU ID */ 125 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 126 paddr_t ci_curpcb; /* PA of current HW PCB */ 127 struct pcb *ci_idle_pcb; /* our idle PCB */ 128 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 129 struct cpu_softc *ci_softc; /* pointer to our device */ 130 u_long ci_want_resched; /* preempt current process */ 131 u_long ci_intrdepth; /* interrupt trap depth */ 132 struct trapframe *ci_db_regs; /* registers for debuggers */ 133 134 /* 135 * Variables used by cc_microtime(). 136 */ 137 struct timeval ci_cc_time; 138 long ci_cc_cc; 139 long ci_cc_ms_delta; 140 long ci_cc_denom; 141 142 #if defined(MULTIPROCESSOR) 143 __volatile u_long ci_flags; /* flags; see below */ 144 __volatile u_long ci_ipis; /* interprocessor interrupts pending */ 145 #endif 146 }; 147 148 #define CPUF_PRIMARY 0x01 /* CPU is primary CPU */ 149 #define CPUF_PRESENT 0x02 /* CPU is present */ 150 #define CPUF_RUNNING 0x04 /* CPU is running */ 151 #define CPUF_PAUSED 0x08 /* CPU is paused */ 152 #define CPUF_FPUSAVE 0x10 /* CPU is currently in fpusave_cpu() */ 153 154 extern struct cpu_info cpu_info_primary; 155 extern struct cpu_info *cpu_info_list; 156 157 #define CPU_INFO_ITERATOR int 158 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 159 ci != NULL; ci = ci->ci_next 160 161 #if defined(MULTIPROCESSOR) 162 extern __volatile u_long cpus_running; 163 extern __volatile u_long cpus_paused; 164 extern struct cpu_info *cpu_info[]; 165 166 #define curcpu() ((struct cpu_info *)alpha_pal_rdval()) 167 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 168 169 void cpu_boot_secondary_processors(void); 170 171 void cpu_pause_resume(unsigned long, int); 172 void cpu_pause_resume_all(int); 173 #else /* ! MULTIPROCESSOR */ 174 #define curcpu() (&cpu_info_primary) 175 #endif /* MULTIPROCESSOR */ 176 177 #define curlwp curcpu()->ci_curlwp 178 #define fpcurlwp curcpu()->ci_fpcurlwp 179 #define curpcb curcpu()->ci_curpcb 180 181 /* 182 * definitions of cpu-dependent requirements 183 * referenced in generic code 184 */ 185 #define cpu_wait(p) /* nothing */ 186 #define cpu_number() alpha_pal_whami() 187 #define cpu_proc_fork(p1, p2) /* nothing */ 188 189 /* 190 * Arguments to hardclock and gatherstats encapsulate the previous 191 * machine state in an opaque clockframe. One the Alpha, we use 192 * what we push on an interrupt (a trapframe). 193 */ 194 struct clockframe { 195 struct trapframe cf_tf; 196 }; 197 #define CLKF_USERMODE(framep) \ 198 (((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0) 199 #define CLKF_BASEPRI(framep) \ 200 (((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_IPL_MASK) == 0) 201 #define CLKF_PC(framep) ((framep)->cf_tf.tf_regs[FRAME_PC]) 202 203 /* 204 * This isn't perfect; if the clock interrupt comes in before the 205 * r/m/w cycle is complete, we won't be counted... but it's not 206 * like this stastic has to be extremely accurate. 207 */ 208 #define CLKF_INTR(framep) (curcpu()->ci_intrdepth) 209 210 /* 211 * This is used during profiling to integrate system time. It can safely 212 * assume that the process is resident. 213 */ 214 #define LWP_PC(p) ((l)->l_md.md_tf->tf_regs[FRAME_PC]) 215 216 /* 217 * Preempt the current process if in interrupt from user mode, 218 * or after the current trap/syscall if in system mode. 219 */ 220 #define need_resched(ci) \ 221 do { \ 222 (ci)->ci_want_resched = 1; \ 223 if ((ci)->ci_curlwp != NULL) \ 224 aston((ci)->ci_curlwp->l_proc); \ 225 } while (/*CONSTCOND*/0) 226 227 /* 228 * Give a profiling tick to the current process when the user profiling 229 * buffer pages are invalid. On the Alpha, request an AST to send us 230 * through trap, marking the proc as needing a profiling tick. 231 */ 232 #define need_proftick(p) \ 233 do { \ 234 (p)->p_flag |= P_OWEUPC; \ 235 aston(p); \ 236 } while (/*CONSTCOND*/0) 237 238 /* 239 * Notify the current process (p) that it has a signal pending, 240 * process as soon as possible. 241 */ 242 #define signotify(p) aston(p) 243 244 /* 245 * XXXSMP 246 * Should we send an AST IPI? Or just let it handle it next time 247 * it sees a normal kernel entry? I guess letting it happen later 248 * follows the `asynchronous' part of the name... 249 */ 250 #define aston(p) ((p)->p_md.md_astpending = 1) 251 #endif /* _KERNEL */ 252 253 /* 254 * CTL_MACHDEP definitions. 255 */ 256 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 257 #define CPU_ROOT_DEVICE 2 /* string: root device name */ 258 #define CPU_UNALIGNED_PRINT 3 /* int: print unaligned accesses */ 259 #define CPU_UNALIGNED_FIX 4 /* int: fix unaligned accesses */ 260 #define CPU_UNALIGNED_SIGBUS 5 /* int: SIGBUS unaligned accesses */ 261 #define CPU_BOOTED_KERNEL 6 /* string: booted kernel name */ 262 #define CPU_FP_SYNC_COMPLETE 7 /* int: always fixup sync fp traps */ 263 #define CPU_MAXID 8 /* 7 valid machdep IDs */ 264 265 #define CTL_MACHDEP_NAMES { \ 266 { 0, 0 }, \ 267 { "console_device", CTLTYPE_STRUCT }, \ 268 { "root_device", CTLTYPE_STRING }, \ 269 { "unaligned_print", CTLTYPE_INT }, \ 270 { "unaligned_fix", CTLTYPE_INT }, \ 271 { "unaligned_sigbus", CTLTYPE_INT }, \ 272 { "booted_kernel", CTLTYPE_STRING }, \ 273 { "fp_sync_complete", CTLTYPE_INT }, \ 274 } 275 276 #ifdef _KERNEL 277 278 struct pcb; 279 struct proc; 280 struct reg; 281 struct rpb; 282 struct trapframe; 283 284 extern struct timeval cc_microset_time; 285 286 int badaddr(void *, size_t); 287 #define microtime(tv) cc_microtime(tv) 288 void cc_microtime __P((struct timeval *)); 289 void cc_microset(struct cpu_info *); 290 291 #endif /* _KERNEL */ 292 #endif /* _ALPHA_CPU_H_ */ 293