xref: /netbsd-src/sys/arch/alpha/include/cpu.h (revision 9fb66d812c00ebfb445c0b47dea128f32aa6fe96)
1 /* $NetBSD: cpu.h,v 1.100 2021/04/15 08:23:24 rin Exp $ */
2 
3 /*-
4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center, and by Charles M. Hannum.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1988 University of Utah.
35  * Copyright (c) 1982, 1990, 1993
36  *	The Regents of the University of California.  All rights reserved.
37  *
38  * This code is derived from software contributed to Berkeley by
39  * the Systems Programming Group of the University of Utah Computer
40  * Science Department.
41  *
42  * Redistribution and use in source and binary forms, with or without
43  * modification, are permitted provided that the following conditions
44  * are met:
45  * 1. Redistributions of source code must retain the above copyright
46  *    notice, this list of conditions and the following disclaimer.
47  * 2. Redistributions in binary form must reproduce the above copyright
48  *    notice, this list of conditions and the following disclaimer in the
49  *    documentation and/or other materials provided with the distribution.
50  * 3. Neither the name of the University nor the names of its contributors
51  *    may be used to endorse or promote products derived from this software
52  *    without specific prior written permission.
53  *
54  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
55  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
56  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
57  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
58  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
59  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
60  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
61  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
62  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
63  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64  * SUCH DAMAGE.
65  *
66  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
67  *
68  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
69  */
70 
71 #ifndef _ALPHA_CPU_H_
72 #define _ALPHA_CPU_H_
73 
74 #if defined(_KERNEL_OPT)
75 #include "opt_multiprocessor.h"
76 #include "opt_lockdebug.h"
77 #endif
78 
79 /*
80  * Exported definitions unique to Alpha cpu support.
81  */
82 
83 #include <machine/alpha_cpu.h>
84 
85 #if defined(_KERNEL) || defined(_KMEMUSER)
86 #include <sys/cpu_data.h>
87 #include <sys/cctr.h>
88 #include <sys/intr.h>
89 #include <machine/frame.h>
90 
91 /*
92  * Machine check information.
93  */
94 struct mchkinfo {
95 	volatile int mc_expected;	/* machine check is expected */
96 	volatile int mc_received;	/* machine check was received */
97 };
98 
99 /*
100  * Per-cpu information.  Data accessed by MI code is marked [MI].
101  */
102 struct cpu_info {
103 	struct cpu_data ci_data;	/* [MI] general per-cpu data */
104 	struct lwp *ci_curlwp;		/* [MI] current owner of the cpu */
105 	struct lwp *ci_onproc;		/* [MI] current user LWP / kthread */
106 	struct cctr_state ci_cc;	/* [MI] cycle counter state */
107 
108 	volatile int ci_mtx_count;	/* [MI] neg count of spin mutexes */
109 	volatile int ci_mtx_oldspl;	/* [MI] for spin mutex splx() */
110 
111 	u_long ci_intrdepth;		/* interrupt trap depth */
112 	volatile u_long ci_ssir;	/* simulated software interrupt reg */
113 					/* LWPs for soft intr dispatch */
114 	struct lwp *ci_silwps[SOFTINT_COUNT];
115 	struct cpu_softc *ci_softc;	/* pointer to our device */
116 
117 	struct pmap *ci_pmap;		/* currently-activated pmap */
118 	u_int ci_next_asn;		/* next ASN to assign */
119 	u_long ci_asn_gen;		/* current ASN generation */
120 
121 	struct mchkinfo ci_mcinfo;	/* machine check info */
122 
123 	/*
124 	 * The following must be in their own cache line, as they are
125 	 * stored to regularly by remote CPUs.
126 	 */
127 	volatile u_long ci_ipis		/* interprocessor interrupts pending */
128 			__aligned(64);
129 	u_int	ci_want_resched;	/* [MI] preempt current process */
130 
131 	/*
132 	 * These are largely static, and will frequently be fetched
133 	 * by other CPUs.  For that reason, they get their own cache
134 	 * line, too.
135 	 */
136 	struct cpu_info *ci_next	/* next cpu_info structure */
137 			__aligned(64);
138 	cpuid_t ci_cpuid;		/* [MI] our CPU ID */
139 	volatile u_long ci_flags;	/* flags; see below */
140 	uint64_t ci_pcc_freq;		/* cpu cycles/second */
141 	struct trapframe *ci_db_regs;	/* registers for debuggers */
142 	u_int	ci_nintrhand;		/* # of interrupt handlers */
143 };
144 
145 /* Ensure some cpu_info fields are within the signed 16-bit displacement. */
146 __CTASSERT(offsetof(struct cpu_info, ci_curlwp) <= 0x7ff0);
147 __CTASSERT(offsetof(struct cpu_info, ci_ssir) <= 0x7ff0);
148 
149 #endif /* _KERNEL || _KMEMUSER */
150 
151 #if defined(_KERNEL)
152 
153 #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
154 #define	CPUF_PRESENT	0x02		/* CPU is present */
155 #define	CPUF_RUNNING	0x04		/* CPU is running */
156 #define	CPUF_PAUSED	0x08		/* CPU is paused */
157 
158 extern	struct cpu_info cpu_info_primary;
159 extern	struct cpu_info *cpu_info_list;
160 
161 #define	CPU_INFO_ITERATOR		int __unused
162 #define	CPU_INFO_FOREACH(cii, ci)	ci = cpu_info_list; \
163 					ci != NULL; ci = ci->ci_next
164 
165 #if defined(MULTIPROCESSOR)
166 extern	volatile u_long cpus_running;
167 extern	volatile u_long cpus_paused;
168 extern	struct cpu_info *cpu_info[];
169 
170 #define	curlwp			((struct lwp *)alpha_pal_rdval())
171 #define	curcpu()		curlwp->l_cpu
172 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
173 
174 void	cpu_boot_secondary_processors(void);
175 
176 void	cpu_pause_resume(unsigned long, int);
177 void	cpu_pause_resume_all(int);
178 #else /* ! MULTIPROCESSOR */
179 #define	curcpu()	(&cpu_info_primary)
180 #define	curlwp		curcpu()->ci_curlwp
181 #endif /* MULTIPROCESSOR */
182 
183 
184 /*
185  * definitions of cpu-dependent requirements
186  * referenced in generic code
187  */
188 #define	cpu_number()		alpha_pal_whami()
189 #define	cpu_proc_fork(p1, p2)	/* nothing */
190 
191 /*
192  * Arguments to hardclock and gatherstats encapsulate the previous
193  * machine state in an opaque clockframe.  On the alpha, we use
194  * what we push on an interrupt (a trapframe).
195  */
196 struct clockframe {
197 	struct trapframe	cf_tf;
198 };
199 #define	CLKF_USERMODE(framep)						\
200 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
201 #define	CLKF_PC(framep)		((framep)->cf_tf.tf_regs[FRAME_PC])
202 
203 /*
204  * This isn't perfect; if the clock interrupt comes in before the
205  * r/m/w cycle is complete, we won't be counted... but it's not
206  * like this stastic has to be extremely accurate.
207  */
208 #define	CLKF_INTR(framep)						\
209 	(curcpu()->ci_intrdepth > 1)	/* one for clock interrupt itself */
210 
211 /*
212  * This is used during profiling to integrate system time.  It can safely
213  * assume that the process is resident.
214  */
215 #define	LWP_PC(p)		((l)->l_md.md_tf->tf_regs[FRAME_PC])
216 
217 void	cpu_need_proftick(struct lwp *);
218 void	cpu_signotify(struct lwp *);
219 
220 #define	aston(l)		((l)->l_md.md_astpending = 1)
221 #endif /* _KERNEL */
222 
223 /*
224  * CTL_MACHDEP definitions.
225  */
226 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
227 #define	CPU_ROOT_DEVICE		2	/* string: root device name */
228 #define	CPU_UNALIGNED_PRINT	3	/* int: print unaligned accesses */
229 #define	CPU_UNALIGNED_FIX	4	/* int: fix unaligned accesses */
230 #define	CPU_UNALIGNED_SIGBUS	5	/* int: SIGBUS unaligned accesses */
231 #define	CPU_BOOTED_KERNEL	6	/* string: booted kernel name */
232 #define	CPU_FP_SYNC_COMPLETE	7	/* int: always fixup sync fp traps */
233 #define	CPU_CCTR		8	/* int: using CC timecounter */
234 #define	CPU_IS_QEMU		9	/* int: running under Qemu */
235 
236 
237 #ifdef _KERNEL
238 
239 struct pcb;
240 struct proc;
241 struct reg;
242 struct rpb;
243 struct trapframe;
244 
245 int	badaddr(void *, size_t);
246 void *	cpu_uarea_alloc(bool);
247 bool	cpu_uarea_free(void *);
248 
249 void	cpu_idle_wtint(void);
250 extern	void (*cpu_idle_fn)(void);
251 #define	cpu_idle()	(*cpu_idle_fn)()
252 
253 void	cpu_initclocks_secondary(void);
254 
255 #endif /* _KERNEL */
256 #endif /* _ALPHA_CPU_H_ */
257