xref: /netbsd-src/sys/arch/alpha/include/alpha_instruction.h (revision 30e97ef49a55f062c4d1300a8bf3c0dae8e6b229)
1*30e97ef4Sthorpej /* $NetBSD: alpha_instruction.h,v 1.2 2023/11/21 22:27:41 thorpej Exp $ */
22d93273eSthorpej 
32d93273eSthorpej /*
42d93273eSthorpej  * Copyright (c) 1999 Christopher G. Demetriou.  All rights reserved.
52d93273eSthorpej  *
62d93273eSthorpej  * Redistribution and use in source and binary forms, with or without
72d93273eSthorpej  * modification, are permitted provided that the following conditions
82d93273eSthorpej  * are met:
92d93273eSthorpej  * 1. Redistributions of source code must retain the above copyright
102d93273eSthorpej  *    notice, this list of conditions and the following disclaimer.
112d93273eSthorpej  * 2. Redistributions in binary form must reproduce the above copyright
122d93273eSthorpej  *    notice, this list of conditions and the following disclaimer in the
132d93273eSthorpej  *    documentation and/or other materials provided with the distribution.
142d93273eSthorpej  * 3. All advertising materials mentioning features or use of this software
152d93273eSthorpej  *    must display the following acknowledgement:
162d93273eSthorpej  *      This product includes software developed by Christopher G. Demetriou
172d93273eSthorpej  *	for the NetBSD Project.
182d93273eSthorpej  * 4. The name of the author may not be used to endorse or promote products
192d93273eSthorpej  *    derived from this software without specific prior written permission
202d93273eSthorpej  *
212d93273eSthorpej  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
222d93273eSthorpej  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
232d93273eSthorpej  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
242d93273eSthorpej  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
252d93273eSthorpej  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
262d93273eSthorpej  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
272d93273eSthorpej  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
282d93273eSthorpej  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
292d93273eSthorpej  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
302d93273eSthorpej  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
312d93273eSthorpej  */
322d93273eSthorpej 
332d93273eSthorpej /*
342d93273eSthorpej  * Mach Operating System
352d93273eSthorpej  * Copyright (c) 1993,1992 Carnegie Mellon University
362d93273eSthorpej  * All Rights Reserved.
372d93273eSthorpej  *
382d93273eSthorpej  * Permission to use, copy, modify and distribute this software and its
392d93273eSthorpej  * documentation is hereby granted, provided that both the copyright
402d93273eSthorpej  * notice and this permission notice appear in all copies of the
412d93273eSthorpej  * software, derivative works or modified versions, and any portions
422d93273eSthorpej  * thereof, and that both notices appear in supporting documentation.
432d93273eSthorpej  *
442d93273eSthorpej  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
452d93273eSthorpej  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
462d93273eSthorpej  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
472d93273eSthorpej  *
482d93273eSthorpej  * Carnegie Mellon requests users of this software to return to
492d93273eSthorpej  *
502d93273eSthorpej  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
512d93273eSthorpej  *  School of Computer Science
522d93273eSthorpej  *  Carnegie Mellon University
532d93273eSthorpej  *  Pittsburgh PA 15213-3890
542d93273eSthorpej  *
552d93273eSthorpej  * any improvements or extensions that they make and grant Carnegie Mellon
562d93273eSthorpej  * the rights to redistribute these changes.
572d93273eSthorpej  */
582d93273eSthorpej 
592d93273eSthorpej /*
602d93273eSthorpej  *	File: alpha_instruction.h
612d93273eSthorpej  * 	Author: Alessandro Forin, Carnegie Mellon University
622d93273eSthorpej  *	Date:	11/91
632d93273eSthorpej  *
642d93273eSthorpej  *	Alpha Instruction set definition
652d93273eSthorpej  *
662d93273eSthorpej  *	Reference: "Alpha System Reference Manual", V4.0, April 1991
672d93273eSthorpej  *
682d93273eSthorpej  */
692d93273eSthorpej 
702d93273eSthorpej #ifndef	_ALPHA_INSTRUCTION_H_
712d93273eSthorpej #define	_ALPHA_INSTRUCTION_H_ 1
722d93273eSthorpej 
732d93273eSthorpej #if	!defined(ASSEMBLER)
742d93273eSthorpej 
752d93273eSthorpej /*
762d93273eSthorpej  *	All instructions are in one of five formats:
772d93273eSthorpej  *		Memory, Branch, Operate, Floating-point Operate, PAL
782d93273eSthorpej  *
792d93273eSthorpej  *	The original Mach sources attempted to use 'smarter' names
802d93273eSthorpej  *	for registers, which reflected source and destination.  These
812d93273eSthorpej  *	definitions use the names from the Architecture Reference Manual,
822d93273eSthorpej  *	both for clarity and because you can't differentiate between
832d93273eSthorpej  *	'source' and 'destinations' for some types of instructions (loads
842d93273eSthorpej  *	and stores; they'd be correct for one, but swapped for the other).
852d93273eSthorpej  */
862d93273eSthorpej 
872d93273eSthorpej 
882d93273eSthorpej typedef union {
892d93273eSthorpej 	/*
902d93273eSthorpej 	 *	All instructions are 32 bits wide
912d93273eSthorpej 	 */
922d93273eSthorpej 	unsigned int	bits;
932d93273eSthorpej 
942d93273eSthorpej 	/*
952d93273eSthorpej 	 *	Generic instruction pseudo format; look at
962d93273eSthorpej 	 *	opcode to see how to interpret the rest.
972d93273eSthorpej 	 */
982d93273eSthorpej 	struct {
992d93273eSthorpej 		unsigned	bits:26,
1002d93273eSthorpej 				opcode:6;
1012d93273eSthorpej 	} generic_format;
1022d93273eSthorpej 
1032d93273eSthorpej 	/*
1042d93273eSthorpej 	 *	Memory instructions contain a 16 bit
1052d93273eSthorpej 	 *	signed immediate value and two register
1062d93273eSthorpej 	 *	specifiers
1072d93273eSthorpej 	 */
1082d93273eSthorpej 	struct {
1092d93273eSthorpej 		signed short	displacement;
1102d93273eSthorpej 		unsigned	rb : 5,
1112d93273eSthorpej 				ra : 5,
1122d93273eSthorpej 				opcode : 6;
1132d93273eSthorpej 	} mem_format;
1142d93273eSthorpej 
1152d93273eSthorpej 	/*
1162d93273eSthorpej 	 *	Branch instruction contain a 21 bit offset,
1172d93273eSthorpej 	 *	which is sign-extended, shifted and combined
1182d93273eSthorpej 	 *	with the PC to form a 64 bit destination address.
1192d93273eSthorpej 	 *
1202d93273eSthorpej 	 *	In computed jump instructions the opcode is further
1212d93273eSthorpej 	 *	specified in the offset field, the rest of it is
1222d93273eSthorpej 	 *	used as branch target hint.  The destination of the
1232d93273eSthorpej 	 *	jump is the source register.
1242d93273eSthorpej 	 */
1252d93273eSthorpej 	struct {
1262d93273eSthorpej 		signed int	displacement : 21;
1272d93273eSthorpej 		unsigned	ra : 5,
1282d93273eSthorpej 				opcode : 6;
1292d93273eSthorpej 	} branch_format;
1302d93273eSthorpej 
1312d93273eSthorpej 	struct {
1322d93273eSthorpej 		signed int	hint : 14;
1332d93273eSthorpej 		unsigned	action : 2,
1342d93273eSthorpej 				rb : 5,
1352d93273eSthorpej 				ra : 5,
1362d93273eSthorpej 				opcode : 6;
1372d93273eSthorpej 	} jump_format;
1382d93273eSthorpej 
1392d93273eSthorpej 
1402d93273eSthorpej 	/*
1412d93273eSthorpej 	 *	Operate instructions are of two types, with
1422d93273eSthorpej 	 *	a second source register or with a literal
1432d93273eSthorpej 	 *	specifier.  Bit 12 sez which is which.
1442d93273eSthorpej 	 */
1452d93273eSthorpej 	struct {
1462d93273eSthorpej 		unsigned	rc : 5,
1472d93273eSthorpej 				function : 7,
1482d93273eSthorpej 				is_lit : 1,
1492d93273eSthorpej 				sbz_or_litlo : 3,
1502d93273eSthorpej 				rb_or_lithi : 5,
1512d93273eSthorpej 				ra : 5,
1522d93273eSthorpej 				opcode : 6;
1532d93273eSthorpej 	} operate_generic_format;
1542d93273eSthorpej 
1552d93273eSthorpej 	struct {
1562d93273eSthorpej 		unsigned	rc : 5,
1572d93273eSthorpej 				function : 7,
1582d93273eSthorpej 				zero : 1,
1592d93273eSthorpej 				sbz : 3,
1602d93273eSthorpej 				rb : 5,
1612d93273eSthorpej 				ra : 5,
1622d93273eSthorpej 				opcode : 6;
1632d93273eSthorpej 	} operate_reg_format;
1642d93273eSthorpej 
1652d93273eSthorpej 	struct {
1662d93273eSthorpej 		unsigned	rc : 5,
1672d93273eSthorpej 				function : 7,
1682d93273eSthorpej 				one : 1,
1692d93273eSthorpej 				literal : 8,
1702d93273eSthorpej 				ra : 5,
1712d93273eSthorpej 				opcode : 6;
1722d93273eSthorpej 	} operate_lit_format;
1732d93273eSthorpej 
1742d93273eSthorpej 
1752d93273eSthorpej 	/*
1762d93273eSthorpej 	 *	Floating point operate instruction are quite
1772d93273eSthorpej 	 *	uniform in the encoding.  As for the semantics..
1782d93273eSthorpej 	 */
1792d93273eSthorpej 	struct {
1802d93273eSthorpej 		unsigned	fc : 5,
1812d93273eSthorpej 				function : 11,
1822d93273eSthorpej 				fb : 5,
1832d93273eSthorpej 				fa : 5,
1842d93273eSthorpej 				opcode : 6;
1852d93273eSthorpej 	} float_format;
1862d93273eSthorpej 
1872d93273eSthorpej 	struct {
1882d93273eSthorpej 		unsigned	fc : 5,
1892d93273eSthorpej 				opclass : 4,
1902d93273eSthorpej 				src : 2,
1912d93273eSthorpej 				rnd : 2,
1922d93273eSthorpej 				trp : 3,
1932d93273eSthorpej 				fb : 5,
1942d93273eSthorpej 				fa : 5,
1952d93273eSthorpej 				opcode : 6;
1962d93273eSthorpej 	} float_detail;
1972d93273eSthorpej 
1982d93273eSthorpej 	/*
1992d93273eSthorpej 	 *	PAL instructions just define the major opcode
2002d93273eSthorpej 	 */
2012d93273eSthorpej 
2022d93273eSthorpej 	struct {
2032d93273eSthorpej 		unsigned	function : 26,
2042d93273eSthorpej 				opcode : 6;
2052d93273eSthorpej 	} pal_format;
2062d93273eSthorpej 
2072d93273eSthorpej } alpha_instruction;
2082d93273eSthorpej 
2092d93273eSthorpej #endif /* !defined(ASSEMBLER) */
2102d93273eSthorpej 
2112d93273eSthorpej /*
2122d93273eSthorpej  *
2132d93273eSthorpej  *	Encoding of regular instructions  (Appendix C op cit)
2142d93273eSthorpej  *
2152d93273eSthorpej  */
2162d93273eSthorpej 
2172d93273eSthorpej 		/* OPCODE, bits 26..31 */
2182d93273eSthorpej 
2192d93273eSthorpej #define	op_pal		0x00		/* see PAL sub-table */
2202d93273eSthorpej 					/* 1..7 reserved */
2212d93273eSthorpej #define	op_lda		0x08
2222d93273eSthorpej #define	op_ldah		0x09
2232d93273eSthorpej #define	op_ldbu		0x0a
2242d93273eSthorpej #define	op_ldq_u	0x0b
2252d93273eSthorpej #define	op_ldwu		0x0c
2262d93273eSthorpej #define	op_stw		0x0d
2272d93273eSthorpej #define	op_stb		0x0e
2282d93273eSthorpej #define	op_stq_u	0x0f
2292d93273eSthorpej 
2302d93273eSthorpej #define	op_arit		0x10		/* see ARIT sub-table */
2312d93273eSthorpej #define	op_logical	0x11		/* see LOGICAL sub-table */
2322d93273eSthorpej #define	op_bit		0x12		/* see BIT sub-table */
2332d93273eSthorpej #define	op_mul		0x13		/* see MUL sub-table */
2342d93273eSthorpej #define op_fix_float	0x14		/* if ALPHA_AMASK_FIX */
2352d93273eSthorpej #define	op_vax_float	0x15		/* see FLOAT sub-table */
2362d93273eSthorpej #define	op_ieee_float	0x16		/* see FLOAT sub-table */
2372d93273eSthorpej #define	op_any_float	0x17		/* see FLOAT sub-table */
2382d93273eSthorpej 
2392d93273eSthorpej #define	op_special	0x18		/* see SPECIAL sub-table */
2402d93273eSthorpej #define	op_pal19	0x19		/* reserved for pal code */
2412d93273eSthorpej #define	op_j		0x1a		/* see JUMP sub-table */
2422d93273eSthorpej #define	op_pal1b	0x1b		/* reserved for pal code */
2432d93273eSthorpej #define	op_intmisc	0x1c		/* see INTMISC sub-table */
2442d93273eSthorpej #define	op_pal1d	0x1d		/* reserved for pal code */
2452d93273eSthorpej #define	op_pal1e	0x1e		/* reserved for pal code */
2462d93273eSthorpej #define	op_pal1f	0x1f		/* reserved for pal code */
2472d93273eSthorpej 
2482d93273eSthorpej #define	op_ldf		0x20
2492d93273eSthorpej #define	op_ldg		0x21
2502d93273eSthorpej #define	op_lds		0x22
2512d93273eSthorpej #define	op_ldt		0x23
2522d93273eSthorpej #define	op_stf		0x24
2532d93273eSthorpej #define	op_stg		0x25
2542d93273eSthorpej #define	op_sts		0x26
2552d93273eSthorpej #define	op_stt		0x27
2562d93273eSthorpej #define	op_ldl		0x28
2572d93273eSthorpej #define	op_ldq		0x29
2582d93273eSthorpej #define	op_ldl_l	0x2a
2592d93273eSthorpej #define	op_ldq_l	0x2b
2602d93273eSthorpej #define	op_stl		0x2c
2612d93273eSthorpej #define	op_stq		0x2d
2622d93273eSthorpej #define	op_stl_c	0x2e
2632d93273eSthorpej #define	op_stq_c	0x2f
2642d93273eSthorpej #define	op_br		0x30
2652d93273eSthorpej #define	op_fbeq		0x31
2662d93273eSthorpej #define	op_fblt		0x32
2672d93273eSthorpej #define	op_fble		0x33
2682d93273eSthorpej #define	op_bsr		0x34
2692d93273eSthorpej #define	op_fbne		0x35
2702d93273eSthorpej #define	op_fbge		0x36
2712d93273eSthorpej #define	op_fbgt		0x37
2722d93273eSthorpej #define	op_blbc		0x38
2732d93273eSthorpej #define	op_beq		0x39
2742d93273eSthorpej #define	op_blt		0x3a
2752d93273eSthorpej #define	op_ble		0x3b
2762d93273eSthorpej #define	op_blbs		0x3c
2772d93273eSthorpej #define	op_bne		0x3d
2782d93273eSthorpej #define	op_bge		0x3e
2792d93273eSthorpej #define op_bgt		0x3f
2802d93273eSthorpej 
2812d93273eSthorpej 
2822d93273eSthorpej 		/* PAL, "function" opcodes (bits 0..25) */
2832d93273eSthorpej /*
2842d93273eSthorpej  * What we will implement is TBD.  These are the unprivileged ones
2852d93273eSthorpej  * that we probably have to support for compat reasons.
2862d93273eSthorpej  */
2872d93273eSthorpej 
2882d93273eSthorpej /* See <machine/pal.h> */
2892d93273eSthorpej 
2902d93273eSthorpej 		/* ARIT, "function" opcodes (bits 5..11)  */
2912d93273eSthorpej 
2922d93273eSthorpej #define	op_addl		0x00
2932d93273eSthorpej #define	op_s4addl	0x02
2942d93273eSthorpej #define	op_subl		0x09
2952d93273eSthorpej #define	op_s4subl	0x0b
2962d93273eSthorpej #define	op_cmpbge	0x0f
2972d93273eSthorpej #define	op_s8addl	0x12
2982d93273eSthorpej #define	op_s8subl	0x1b
2992d93273eSthorpej #define	op_cmpult	0x1d
3002d93273eSthorpej #define	op_addq		0x20
3012d93273eSthorpej #define	op_s4addq	0x22
3022d93273eSthorpej #define	op_subq		0x29
3032d93273eSthorpej #define	op_s4subq	0x2b
3042d93273eSthorpej #define	op_cmpeq	0x2d
3052d93273eSthorpej #define	op_s8addq	0x32
3062d93273eSthorpej #define	op_s8subq	0x3b
3072d93273eSthorpej #define	op_cmpule	0x3d
3082d93273eSthorpej #define	op_addl_v	0x40
3092d93273eSthorpej #define	op_subl_v	0x49
3102d93273eSthorpej #define	op_cmplt	0x4d
3112d93273eSthorpej #define	op_addq_v	0x60
3122d93273eSthorpej #define	op_subq_v	0x69
3132d93273eSthorpej #define	op_cmple	0x6d
3142d93273eSthorpej 
3152d93273eSthorpej 
3162d93273eSthorpej 		/* LOGICAL, "function" opcodes (bits 5..11)  */
3172d93273eSthorpej 
3182d93273eSthorpej #define	op_and		0x00
3192d93273eSthorpej #define	op_andnot	0x08	/* bic */
3202d93273eSthorpej #define	op_cmovlbs	0x14
3212d93273eSthorpej #define	op_cmovlbc	0x16
3222d93273eSthorpej #define	op_or		0x20	/* bis */
3232d93273eSthorpej #define	op_cmoveq	0x24
3242d93273eSthorpej #define	op_cmovne	0x26
3252d93273eSthorpej #define	op_ornot	0x28
3262d93273eSthorpej #define	op_xor		0x40
3272d93273eSthorpej #define	op_cmovlt	0x44
3282d93273eSthorpej #define	op_cmovge	0x46
3292d93273eSthorpej #define	op_xornot	0x48	/* eqv */
3302d93273eSthorpej #define	op_amask	0x61
3312d93273eSthorpej #define	op_cmovle	0x64
3322d93273eSthorpej #define	op_cmovgt	0x66
3332d93273eSthorpej #define	op_implver	0x6c
3342d93273eSthorpej 
3352d93273eSthorpej 		/* BIT, "function" opcodes (bits 5..11)  */
3362d93273eSthorpej 
3372d93273eSthorpej #define	op_mskbl	0x02
3382d93273eSthorpej #define	op_extbl	0x06
3392d93273eSthorpej #define	op_insbl	0x0b
3402d93273eSthorpej #define	op_mskwl	0x12
3412d93273eSthorpej #define	op_extwl	0x16
3422d93273eSthorpej #define	op_inswl	0x1b
3432d93273eSthorpej #define	op_mskll	0x22
3442d93273eSthorpej #define	op_extll	0x26
3452d93273eSthorpej #define	op_insll	0x2b
3462d93273eSthorpej #define	op_zap		0x30
3472d93273eSthorpej #define	op_zapnot	0x31
3482d93273eSthorpej #define	op_mskql	0x32
3492d93273eSthorpej #define	op_srl		0x34
3502d93273eSthorpej #define	op_extql	0x36
3512d93273eSthorpej #define	op_sll		0x39
3522d93273eSthorpej #define	op_insql	0x3b
3532d93273eSthorpej #define	op_sra		0x3c
3542d93273eSthorpej #define	op_mskwh	0x52
3552d93273eSthorpej #define	op_inswh	0x57
3562d93273eSthorpej #define	op_extwh	0x5a
3572d93273eSthorpej #define	op_msklh	0x62
3582d93273eSthorpej #define	op_inslh	0x67
3592d93273eSthorpej #define	op_extlh	0x6a
3602d93273eSthorpej #define	op_mskqh	0x72
3612d93273eSthorpej #define	op_insqh	0x77
3622d93273eSthorpej #define	op_extqh	0x7a
3632d93273eSthorpej 
3642d93273eSthorpej 		/* MUL, "function" opcodes (bits 5..11)  */
3652d93273eSthorpej 
3662d93273eSthorpej #define	op_mull		0x00
3672d93273eSthorpej #define	op_mulq_v	0x60
3682d93273eSthorpej #define	op_mull_v	0x40
3692d93273eSthorpej #define	op_umulh	0x30
3702d93273eSthorpej #define	op_mulq		0x20
3712d93273eSthorpej 
3722d93273eSthorpej 
3732d93273eSthorpej 		/* SPECIAL, "displacement" opcodes (bits 0..15)  */
3742d93273eSthorpej 
3752d93273eSthorpej #define	op_trapb	0x0000
3762d93273eSthorpej #define	op_excb		0x0400
3772d93273eSthorpej #define	op_mb		0x4000
3782d93273eSthorpej #define	op_wmb		0x4400
3792d93273eSthorpej #define	op_fetch	0x8000
3802d93273eSthorpej #define	op_fetch_m	0xa000
3812d93273eSthorpej #define	op_rpcc		0xc000
3822d93273eSthorpej #define op_rc		0xe000
3832d93273eSthorpej #define	op_ecb		0xe800
3842d93273eSthorpej #define	op_rs		0xf000
3852d93273eSthorpej #define	op_wh64		0xf800
3862d93273eSthorpej 
3872d93273eSthorpej 		/* JUMP, "action" opcodes (bits 14..15) */
3882d93273eSthorpej 
3892d93273eSthorpej #define	op_jmp		0x0
3902d93273eSthorpej #define	op_jsr		0x1
3912d93273eSthorpej #define	op_ret		0x2
3922d93273eSthorpej #define	op_jcr		0x3
3932d93273eSthorpej 
3942d93273eSthorpej 		/* INTMISC, "function" opcodes (operate format) */
3952d93273eSthorpej 
3962d93273eSthorpej #define	op_sextb	0x00
3972d93273eSthorpej #define	op_sextw	0x01
3982d93273eSthorpej #define	op_ctpop	0x30
3992d93273eSthorpej #define	op_perr		0x31
4002d93273eSthorpej #define	op_ctlz		0x32
4012d93273eSthorpej #define	op_cttz		0x33
4022d93273eSthorpej #define	op_unpkbw	0x34
4032d93273eSthorpej #define	op_unpkbl	0x35
4042d93273eSthorpej #define	op_pkwb		0x36
4052d93273eSthorpej #define	op_pklb		0x37
4062d93273eSthorpej #define	op_minsb8	0x38
4072d93273eSthorpej #define	op_minsw4	0x39
4082d93273eSthorpej #define	op_minub8	0x3a
4092d93273eSthorpej #define	op_minuw4	0x3b
4102d93273eSthorpej #define	op_maxub8	0x3c
4112d93273eSthorpej #define	op_maxuw4	0x3d
4122d93273eSthorpej #define	op_maxsb8	0x3e
4132d93273eSthorpej #define	op_maxsw4	0x3f
4142d93273eSthorpej #define	op_ftoit	0x70
4152d93273eSthorpej #define	op_ftois	0x78
4162d93273eSthorpej 
4172d93273eSthorpej /*
4182d93273eSthorpej  *
4192d93273eSthorpej  *	Encoding of floating point instructions (pagg. C-5..6 op cit)
4202d93273eSthorpej  *
4212d93273eSthorpej  *	Load and store operations use opcodes op_ldf..op_stt
4222d93273eSthorpej  */
4232d93273eSthorpej 
4242d93273eSthorpej 		/* src encoding from function, 9..10 */
4252d93273eSthorpej #define	op_src_sf	0
4262d93273eSthorpej #define	op_src_xd	1
4272d93273eSthorpej #define	op_src_tg	2
4282d93273eSthorpej #define	op_src_qq	3
4292d93273eSthorpej 
4302d93273eSthorpej 		/* any FLOAT, "function" opcodes (bits 5..11)  */
4312d93273eSthorpej 
4322d93273eSthorpej #define	op_cvtlq	0x010
4332d93273eSthorpej #define	op_cpys		0x020
4342d93273eSthorpej #define	op_cpysn	0x021
4352d93273eSthorpej #define	op_cpyse	0x022
4362d93273eSthorpej #define	op_mt_fpcr	0x024
4372d93273eSthorpej #define	op_mf_fpcr	0x025
4382d93273eSthorpej #define	op_fcmoveq	0x02a
4392d93273eSthorpej #define	op_fcmovne	0x02b
4402d93273eSthorpej #define	op_fcmovlt	0x02c
4412d93273eSthorpej #define	op_fcmovge	0x02d
4422d93273eSthorpej #define	op_fcmovle	0x02e
4432d93273eSthorpej #define	op_fcmovgt	0x02f
4442d93273eSthorpej #define	op_cvtql	0x030
4452d93273eSthorpej #define	op_cvtql_v	0x130
4462d93273eSthorpej #define	op_cvtql_sv	0x530
4472d93273eSthorpej 
4482d93273eSthorpej 		/* FIX FLOAT, "function" opcodes (bits 5..11)  */
4492d93273eSthorpej 
4502d93273eSthorpej #define	op_itofs	0x004
4512d93273eSthorpej #define	op_itoff	0x014
4522d93273eSthorpej #define	op_itoft	0x024
4532d93273eSthorpej 
4542d93273eSthorpej 		/* ieee FLOAT, "function" opcodes (bits 5..11)  */
4552d93273eSthorpej 
4562d93273eSthorpej #define	op_adds_c	0x000
4572d93273eSthorpej #define	op_subs_c	0x001
4582d93273eSthorpej #define	op_muls_c	0x002
4592d93273eSthorpej #define	op_divs_c	0x003
4602d93273eSthorpej #define	op_addt_c	0x020
4612d93273eSthorpej #define	op_subt_c	0x021
4622d93273eSthorpej #define	op_mult_c	0x022
4632d93273eSthorpej #define	op_divt_c	0x023
4642d93273eSthorpej #define	op_cvtts_c	0x02c
4652d93273eSthorpej #define	op_cvttq_c	0x02f
4662d93273eSthorpej #define	op_cvtqs_c	0x03c
4672d93273eSthorpej #define	op_cvtqt_c	0x03e
4682d93273eSthorpej #define	op_adds_m	0x040
4692d93273eSthorpej #define	op_subs_m	0x041
4702d93273eSthorpej #define	op_muls_m	0x042
4712d93273eSthorpej #define	op_divs_m	0x043
4722d93273eSthorpej #define	op_addt_m	0x060
4732d93273eSthorpej #define	op_subt_m	0x061
4742d93273eSthorpej #define	op_mult_m	0x062
4752d93273eSthorpej #define	op_divt_m	0x063
4762d93273eSthorpej #define	op_cvtts_m	0x06c
4772d93273eSthorpej #define	op_cvtqs_m	0x07c
4782d93273eSthorpej #define	op_cvtqt_m	0x07e
4792d93273eSthorpej #define	op_adds		0x080
4802d93273eSthorpej #define	op_subs		0x081
4812d93273eSthorpej #define	op_muls		0x082
4822d93273eSthorpej #define	op_divs		0x083
4832d93273eSthorpej #define	op_addt		0x0a0
4842d93273eSthorpej #define	op_subt		0x0a1
4852d93273eSthorpej #define	op_mult		0x0a2
4862d93273eSthorpej #define	op_divt		0x0a3
4872d93273eSthorpej #define	op_cmptun	0x0a4
4882d93273eSthorpej #define	op_cmpteq	0x0a5
4892d93273eSthorpej #define	op_cmptlt	0x0a6
4902d93273eSthorpej #define	op_cmptle	0x0a7
4912d93273eSthorpej #define	op_cvtts	0x0ac
4922d93273eSthorpej #define	op_cvttq	0x0af
4932d93273eSthorpej #define	op_cvtqs	0x0bc
4942d93273eSthorpej #define	op_cvtqt	0x0be
4952d93273eSthorpej #define	op_adds_d	0x0c0
4962d93273eSthorpej #define	op_subs_d	0x0c1
4972d93273eSthorpej #define	op_muls_d	0x0c2
4982d93273eSthorpej #define	op_divs_d	0x0c3
4992d93273eSthorpej #define	op_addt_d	0x0e0
5002d93273eSthorpej #define	op_subt_d	0x0e1
5012d93273eSthorpej #define	op_mult_d	0x0e2
5022d93273eSthorpej #define	op_divt_d	0x0e3
5032d93273eSthorpej #define	op_cvtts_d	0x0ec
5042d93273eSthorpej #define	op_cvtqs_d	0x0fc
5052d93273eSthorpej #define	op_cvtqt_d	0x0fe
5062d93273eSthorpej #define	op_adds_uc	0x100
5072d93273eSthorpej #define	op_subs_uc	0x101
5082d93273eSthorpej #define	op_muls_uc	0x102
5092d93273eSthorpej #define	op_divs_uc	0x103
5102d93273eSthorpej #define	op_addt_uc	0x120
5112d93273eSthorpej #define	op_subt_uc	0x121
5122d93273eSthorpej #define	op_mult_uc	0x122
5132d93273eSthorpej #define	op_divt_uc	0x123
5142d93273eSthorpej #define	op_cvtts_uc	0x12c
5152d93273eSthorpej #define	op_cvttq_vc	0x12f
5162d93273eSthorpej #define	op_adds_um	0x140
5172d93273eSthorpej #define	op_subs_um	0x141
5182d93273eSthorpej #define	op_muls_um	0x142
5192d93273eSthorpej #define	op_divs_um	0x143
5202d93273eSthorpej #define	op_addt_um	0x160
5212d93273eSthorpej #define	op_subt_um	0x161
5222d93273eSthorpej #define	op_mult_um	0x162
5232d93273eSthorpej #define	op_divt_um	0x163
5242d93273eSthorpej #define	op_cvtts_um	0x16c
5252d93273eSthorpej #define	op_adds_u	0x180
5262d93273eSthorpej #define	op_subs_u	0x181
5272d93273eSthorpej #define	op_muls_u	0x182
5282d93273eSthorpej #define	op_divs_u	0x183
5292d93273eSthorpej #define	op_addt_u	0x1a0
5302d93273eSthorpej #define	op_subt_u	0x1a1
5312d93273eSthorpej #define	op_mult_u	0x1a2
5322d93273eSthorpej #define	op_divt_u	0x1a3
5332d93273eSthorpej #define	op_cvtts_u	0x1ac
5342d93273eSthorpej #define	op_cvttq_v	0x1af
5352d93273eSthorpej #define	op_adds_ud	0x1c0
5362d93273eSthorpej #define	op_subs_ud	0x1c1
5372d93273eSthorpej #define	op_muls_ud	0x1c2
5382d93273eSthorpej #define	op_divs_ud	0x1c3
5392d93273eSthorpej #define	op_addt_ud	0x1e0
5402d93273eSthorpej #define	op_subt_ud	0x1e1
5412d93273eSthorpej #define	op_mult_ud	0x1e2
5422d93273eSthorpej #define	op_divt_ud	0x1e3
5432d93273eSthorpej #define	op_cvtts_ud	0x1ec
5442d93273eSthorpej #define op_cvtst	0x2ac
5452d93273eSthorpej #define	op_adds_suc	0x500
5462d93273eSthorpej #define	op_subs_suc	0x501
5472d93273eSthorpej #define	op_muls_suc	0x502
5482d93273eSthorpej #define	op_divs_suc	0x503
5492d93273eSthorpej #define	op_addt_suc	0x520
5502d93273eSthorpej #define	op_subt_suc	0x521
5512d93273eSthorpej #define	op_mult_suc	0x522
5522d93273eSthorpej #define	op_divt_suc	0x523
5532d93273eSthorpej #define	op_cvtts_suc	0x52c
5542d93273eSthorpej #define	op_cvttq_svc	0x52f
5552d93273eSthorpej #define	op_adds_sum	0x540
5562d93273eSthorpej #define	op_subs_sum	0x541
5572d93273eSthorpej #define	op_muls_sum	0x542
5582d93273eSthorpej #define	op_divs_sum	0x543
5592d93273eSthorpej #define	op_addt_sum	0x560
5602d93273eSthorpej #define	op_subt_sum	0x561
5612d93273eSthorpej #define	op_mult_sum	0x562
5622d93273eSthorpej #define	op_divt_sum	0x563
5632d93273eSthorpej #define	op_cvtts_sum	0x56c
5642d93273eSthorpej #define	op_adds_su	0x580
5652d93273eSthorpej #define	op_subs_su	0x581
5662d93273eSthorpej #define	op_muls_su	0x582
5672d93273eSthorpej #define	op_divs_su	0x583
5682d93273eSthorpej #define	op_addt_su	0x5a0
5692d93273eSthorpej #define	op_subt_su	0x5a1
5702d93273eSthorpej #define	op_mult_su	0x5a2
5712d93273eSthorpej #define	op_divt_su	0x5a3
5722d93273eSthorpej #define	op_cmptun_su	0x5a4
5732d93273eSthorpej #define	op_cmpteq_su	0x5a5
5742d93273eSthorpej #define	op_cmptlt_su	0x5a6
5752d93273eSthorpej #define	op_cmptle_su	0x5a7
5762d93273eSthorpej #define	op_cvtts_su	0x5ac
5772d93273eSthorpej #define	op_cvttq_sv	0x5af
5782d93273eSthorpej #define	op_adds_sud	0x5c0
5792d93273eSthorpej #define	op_subs_sud	0x5c1
5802d93273eSthorpej #define	op_muls_sud	0x5c2
5812d93273eSthorpej #define	op_divs_sud	0x5c3
5822d93273eSthorpej #define	op_addt_sud	0x5e0
5832d93273eSthorpej #define	op_subt_sud	0x5e1
5842d93273eSthorpej #define	op_mult_sud	0x5e2
5852d93273eSthorpej #define	op_divt_sud	0x5e3
5862d93273eSthorpej #define	op_cvtts_sud	0x5ec
5872d93273eSthorpej #define	op_cvtst_u	0x6ac
5882d93273eSthorpej #define	op_adds_suic	0x700
5892d93273eSthorpej #define	op_subs_suic	0x701
5902d93273eSthorpej #define	op_muls_suic	0x702
5912d93273eSthorpej #define	op_divs_suic	0x703
5922d93273eSthorpej #define	op_addt_suic	0x720
5932d93273eSthorpej #define	op_subt_suic	0x721
5942d93273eSthorpej #define	op_mult_suic	0x722
5952d93273eSthorpej #define	op_divt_suic	0x723
5962d93273eSthorpej #define	op_cvtts_suic	0x72c
5972d93273eSthorpej #define	op_cvttq_svic	0x72f
5982d93273eSthorpej #define	op_cvtqs_suic	0x73c
5992d93273eSthorpej #define	op_cvtqt_suic	0x73e
6002d93273eSthorpej #define	op_adds_suim	0x740
6012d93273eSthorpej #define	op_subs_suim	0x741
6022d93273eSthorpej #define	op_muls_suim	0x742
6032d93273eSthorpej #define	op_divs_suim	0x743
6042d93273eSthorpej #define	op_addt_suim	0x760
6052d93273eSthorpej #define	op_subt_suim	0x761
6062d93273eSthorpej #define	op_mult_suim	0x762
6072d93273eSthorpej #define	op_divt_suim	0x763
6082d93273eSthorpej #define	op_cvtts_suim	0x76c
6092d93273eSthorpej #define	op_cvtqs_suim	0x77c
6102d93273eSthorpej #define	op_cvtqt_suim	0x77e
6112d93273eSthorpej #define	op_adds_sui	0x780
6122d93273eSthorpej #define	op_subs_sui	0x781
6132d93273eSthorpej #define	op_muls_sui	0x782
6142d93273eSthorpej #define	op_divs_sui	0x783
6152d93273eSthorpej #define	op_addt_sui	0x7a0
6162d93273eSthorpej #define	op_subt_sui	0x7a1
6172d93273eSthorpej #define	op_mult_sui	0x7a2
6182d93273eSthorpej #define	op_divt_sui	0x7a3
6192d93273eSthorpej #define	op_cvtts_sui	0x7ac
6202d93273eSthorpej #define	op_cvttq_svi	0x7af
6212d93273eSthorpej #define	op_cvtqs_sui	0x7bc
6222d93273eSthorpej #define	op_cvtqt_sui	0x7be
6232d93273eSthorpej #define	op_adds_suid	0x7c0
6242d93273eSthorpej #define	op_subs_suid	0x7c1
6252d93273eSthorpej #define	op_muls_suid	0x7c2
6262d93273eSthorpej #define	op_divs_suid	0x7c3
6272d93273eSthorpej #define	op_addt_suid	0x7e0
6282d93273eSthorpej #define	op_subt_suid	0x7e1
6292d93273eSthorpej #define	op_mult_suid	0x7e2
6302d93273eSthorpej #define	op_divt_suid	0x7e3
6312d93273eSthorpej #define	op_cvtts_suid	0x7ec
6322d93273eSthorpej #define	op_cvtqs_suid	0x7fc
6332d93273eSthorpej #define	op_cvtqt_suid	0x7fe
6342d93273eSthorpej 
6352d93273eSthorpej 
6362d93273eSthorpej 		/* vax FLOAT, "function" opcodes (bits 5..11)  */
6372d93273eSthorpej 
6382d93273eSthorpej #define	op_addf_c	0x000
6392d93273eSthorpej #define	op_subf_c	0x001
6402d93273eSthorpej #define	op_mulf_c	0x002
6412d93273eSthorpej #define	op_divf_c	0x003
6422d93273eSthorpej #define	op_cvtdg_c	0x01e
6432d93273eSthorpej #define	op_addg_c	0x020
6442d93273eSthorpej #define	op_subg_c	0x021
6452d93273eSthorpej #define	op_mulg_c	0x022
6462d93273eSthorpej #define	op_divg_c	0x023
6472d93273eSthorpej #define	op_cvtgf_c	0x02c
6482d93273eSthorpej #define	op_cvtgd_c	0x02d
6492d93273eSthorpej #define	op_cvtgqg_c	0x02f
6502d93273eSthorpej #define	op_cvtqf_c	0x03c
6512d93273eSthorpej #define	op_cvtqg_c	0x03e
6522d93273eSthorpej #define	op_addf		0x080
6532d93273eSthorpej #define	op_subf		0x081
6542d93273eSthorpej #define	op_mulf		0x082
6552d93273eSthorpej #define	op_divf		0x083
6562d93273eSthorpej #define	op_cvtdg	0x09e
6572d93273eSthorpej #define	op_addg		0x0a0
6582d93273eSthorpej #define	op_subg		0x0a1
6592d93273eSthorpej #define	op_mulg		0x0a2
6602d93273eSthorpej #define	op_divg		0x0a3
6612d93273eSthorpej #define	op_cmpgeq	0x0a5
6622d93273eSthorpej #define	op_cmpglt	0x0a6
6632d93273eSthorpej #define	op_cmpgle	0x0a7
6642d93273eSthorpej #define	op_cvtgf	0x0ac
6652d93273eSthorpej #define	op_cvtgd	0x0ad
6662d93273eSthorpej #define	op_cvtgq	0x0af
6672d93273eSthorpej #define	op_cvtqf	0x0bc
6682d93273eSthorpej #define	op_cvtqg	0x0be
6692d93273eSthorpej #define	op_addf_uc	0x100
6702d93273eSthorpej #define	op_subf_uc	0x101
6712d93273eSthorpej #define	op_mulf_uc	0x102
6722d93273eSthorpej #define	op_divf_uc	0x103
6732d93273eSthorpej #define	op_cvtdg_uc	0x11e
6742d93273eSthorpej #define	op_addg_uc	0x120
6752d93273eSthorpej #define	op_subg_uc	0x121
6762d93273eSthorpej #define	op_mulg_uc	0x122
6772d93273eSthorpej #define	op_divg_uc	0x123
6782d93273eSthorpej #define	op_cvtgf_uc	0x12c
6792d93273eSthorpej #define	op_cvtgd_uc	0x12d
6802d93273eSthorpej #define	op_cvtgqg_vc	0x12f
6812d93273eSthorpej #define	op_addf_u	0x180
6822d93273eSthorpej #define	op_subf_u	0x181
6832d93273eSthorpej #define	op_mulf_u	0x182
6842d93273eSthorpej #define	op_divf_u	0x183
6852d93273eSthorpej #define	op_cvtdg_u	0x19e
6862d93273eSthorpej #define	op_addg_u	0x1a0
6872d93273eSthorpej #define	op_subg_u	0x1a1
6882d93273eSthorpej #define	op_mulg_u	0x1a2
6892d93273eSthorpej #define	op_divg_u	0x1a3
6902d93273eSthorpej #define	op_cvtgf_u	0x1ac
6912d93273eSthorpej #define	op_cvtgd_u	0x1ad
6922d93273eSthorpej #define	op_cvtgqg_v	0x1af
6932d93273eSthorpej #define	op_addf_sc	0x400
6942d93273eSthorpej #define	op_subf_sc	0x401
6952d93273eSthorpej #define	op_mulf_sc	0x402
6962d93273eSthorpej #define	op_divf_sc	0x403
6972d93273eSthorpej #define	op_cvtdg_sc	0x41e
6982d93273eSthorpej #define	op_addg_sc	0x420
6992d93273eSthorpej #define	op_subg_sc	0x421
7002d93273eSthorpej #define	op_mulg_sc	0x422
7012d93273eSthorpej #define	op_divg_sc	0x423
7022d93273eSthorpej #define	op_cvtgf_sc	0x42c
7032d93273eSthorpej #define	op_cvtgd_sc	0x42d
7042d93273eSthorpej #define	op_cvtgqg_sc	0x42f
7052d93273eSthorpej #define	op_cvtqf_sc	0x43c
7062d93273eSthorpej #define	op_cvtqg_sc	0x43e
7072d93273eSthorpej #define	op_addf_s	0x480
7082d93273eSthorpej #define	op_subf_s	0x481
7092d93273eSthorpej #define	op_mulf_s	0x482
7102d93273eSthorpej #define	op_divf_s	0x483
7112d93273eSthorpej #define	op_cvtdg_s	0x49e
7122d93273eSthorpej #define	op_addg_s	0x4a0
7132d93273eSthorpej #define	op_subg_s	0x4a1
7142d93273eSthorpej #define	op_mulg_s	0x4a2
7152d93273eSthorpej #define	op_divg_s	0x4a3
7162d93273eSthorpej #define	op_cmpgeq_s	0x4a5
7172d93273eSthorpej #define	op_cmpglt_s	0x4a6
7182d93273eSthorpej #define	op_cmpgle_s	0x4a7
7192d93273eSthorpej #define	op_cvtgf_s	0x4ac
7202d93273eSthorpej #define	op_cvtgd_s	0x4ad
7212d93273eSthorpej #define	op_cvtgqg_s	0x4af
7222d93273eSthorpej #define	op_cvtqf_s	0x4bc
7232d93273eSthorpej #define	op_cvtqg_s	0x4be
7242d93273eSthorpej #define	op_addf_suc	0x500
7252d93273eSthorpej #define	op_subf_suc	0x501
7262d93273eSthorpej #define	op_mulf_suc	0x502
7272d93273eSthorpej #define	op_divf_suc	0x503
7282d93273eSthorpej #define	op_cvtdg_suc	0x51e
7292d93273eSthorpej #define	op_addg_suc	0x520
7302d93273eSthorpej #define	op_subg_suc	0x521
7312d93273eSthorpej #define	op_mulg_suc	0x522
7322d93273eSthorpej #define	op_divg_suc	0x523
7332d93273eSthorpej #define	op_cvtgf_suc	0x52c
7342d93273eSthorpej #define	op_cvtgd_suc	0x52d
7352d93273eSthorpej #define	op_cvtgqg_svc	0x52f
7362d93273eSthorpej #define	op_addf_su	0x580
7372d93273eSthorpej #define	op_subf_su	0x581
7382d93273eSthorpej #define	op_mulf_su	0x582
7392d93273eSthorpej #define	op_divf_su	0x583
7402d93273eSthorpej #define	op_cvtdg_su	0x59e
7412d93273eSthorpej #define	op_addg_su	0x5a0
7422d93273eSthorpej #define	op_subg_su	0x5a1
7432d93273eSthorpej #define	op_mulg_su	0x5a2
7442d93273eSthorpej #define	op_divg_su	0x5a3
7452d93273eSthorpej #define	op_cvtgf_su	0x5ac
7462d93273eSthorpej #define	op_cvtgd_su	0x5ad
7472d93273eSthorpej #define	op_cvtgqg_sv	0x5af
7482d93273eSthorpej 
7492d93273eSthorpej struct alpha_print_instruction_context {
7502d93273eSthorpej 	unsigned long pc;	/* address of insn */
7512d93273eSthorpej 	alpha_instruction insn;	/* instruction bits */
7522d93273eSthorpej 	char	*buf;		/* output buffer (if not DDB) */
7532d93273eSthorpej 	size_t	bufsize;	/* size of output buffer */
7542d93273eSthorpej 	size_t	cursor;		/* current next output location */
7552d93273eSthorpej };
7562d93273eSthorpej 
757*30e97ef4Sthorpej #ifdef _KERNEL
7582d93273eSthorpej int	alpha_print_instruction(struct alpha_print_instruction_context *);
7592d93273eSthorpej #endif /* _KERNEL */
7602d93273eSthorpej 
7612d93273eSthorpej #endif	/* _ALPHA_INSTRUCTION_H_ */
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