1*d7cdbe27Sthorpej /* $NetBSD: simide.c,v 1.33 2023/12/20 06:13:59 thorpej Exp $ */
27d4a1addSreinoud
37d4a1addSreinoud /*
47d4a1addSreinoud * Copyright (c) 1997-1998 Mark Brinicombe
57d4a1addSreinoud * Copyright (c) 1997-1998 Causality Limited
67d4a1addSreinoud *
77d4a1addSreinoud * Redistribution and use in source and binary forms, with or without
87d4a1addSreinoud * modification, are permitted provided that the following conditions
97d4a1addSreinoud * are met:
107d4a1addSreinoud * 1. Redistributions of source code must retain the above copyright
117d4a1addSreinoud * notice, this list of conditions and the following disclaimer.
127d4a1addSreinoud * 2. Redistributions in binary form must reproduce the above copyright
137d4a1addSreinoud * notice, this list of conditions and the following disclaimer in the
147d4a1addSreinoud * documentation and/or other materials provided with the distribution.
157d4a1addSreinoud * 3. All advertising materials mentioning features or use of this software
167d4a1addSreinoud * must display the following acknowledgement:
177d4a1addSreinoud * This product includes software developed by Mark Brinicombe
187d4a1addSreinoud * for the NetBSD Project.
197d4a1addSreinoud * 4. The name of the author may not be used to endorse or promote products
207d4a1addSreinoud * derived from this software without specific prior written permission.
217d4a1addSreinoud *
227d4a1addSreinoud * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
237d4a1addSreinoud * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
247d4a1addSreinoud * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
257d4a1addSreinoud * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
267d4a1addSreinoud * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
277d4a1addSreinoud * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
287d4a1addSreinoud * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
297d4a1addSreinoud * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
307d4a1addSreinoud * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
317d4a1addSreinoud * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
327d4a1addSreinoud *
337d4a1addSreinoud * Card driver and probe and attach functions to use generic IDE driver
347d4a1addSreinoud * for the Simtec IDE podule
357d4a1addSreinoud */
367d4a1addSreinoud
377d4a1addSreinoud /*
387d4a1addSreinoud * Thanks to Gareth Simpson, Simtec Electronics for providing
397d4a1addSreinoud * the hardware information
407d4a1addSreinoud */
417d4a1addSreinoud
421b7326b5Slukem #include <sys/cdefs.h>
43*d7cdbe27Sthorpej __KERNEL_RCSID(0, "$NetBSD: simide.c,v 1.33 2023/12/20 06:13:59 thorpej Exp $");
441b7326b5Slukem
457d4a1addSreinoud #include <sys/param.h>
467d4a1addSreinoud #include <sys/systm.h>
477d4a1addSreinoud #include <sys/conf.h>
487d4a1addSreinoud #include <sys/device.h>
49d368bbb8Sdyoung #include <sys/bus.h>
507d4a1addSreinoud
51ce1401feSthorpej #include <machine/intr.h>
527d4a1addSreinoud #include <machine/io.h>
537d4a1addSreinoud #include <acorn32/podulebus/podulebus.h>
547d4a1addSreinoud #include <acorn32/podulebus/simidereg.h>
557d4a1addSreinoud
567d4a1addSreinoud #include <dev/ata/atavar.h>
57870dad0fSbjh21 #include <dev/ic/wdcreg.h>
587d4a1addSreinoud #include <dev/ic/wdcvar.h>
597d4a1addSreinoud #include <dev/podulebus/podules.h>
607d4a1addSreinoud
617d4a1addSreinoud
627d4a1addSreinoud /*
637d4a1addSreinoud * Simtec IDE podule device.
647d4a1addSreinoud *
657d4a1addSreinoud * This probes and attaches the top level Simtec IDE device to the podulebus.
667d4a1addSreinoud * It then configures any children of the Simtec IDE device.
677d4a1addSreinoud * The attach args specify whether it is configuring the primary or
687d4a1addSreinoud * secondary channel.
697d4a1addSreinoud * The children are expected to be wdc devices using simide attachments.
707d4a1addSreinoud */
717d4a1addSreinoud
727d4a1addSreinoud /*
737d4a1addSreinoud * Simtec IDE card softc structure.
747d4a1addSreinoud *
757d4a1addSreinoud * Contains the device node, podule information and global information
767d4a1addSreinoud * required by the driver such as the card version and the interrupt mask.
777d4a1addSreinoud */
787d4a1addSreinoud
797d4a1addSreinoud struct simide_softc {
807d4a1addSreinoud struct wdc_softc sc_wdcdev; /* common wdc definitions */
814b51cecfSthorpej struct ata_channel *sc_chanarray[2]; /* channels definition */
827d4a1addSreinoud podule_t *sc_podule; /* Our podule info */
837d4a1addSreinoud int sc_podule_number; /* Our podule number */
847d4a1addSreinoud int sc_ctl_reg; /* Global ctl reg */
857d4a1addSreinoud int sc_version; /* Card version */
867d4a1addSreinoud bus_space_tag_t sc_ctliot; /* Bus tag */
877d4a1addSreinoud bus_space_handle_t sc_ctlioh; /* control handle */
887d4a1addSreinoud struct bus_space sc_tag; /* custom tag */
897d4a1addSreinoud struct simide_channel {
904b51cecfSthorpej struct ata_channel sc_channel; /* generic part */
917d4a1addSreinoud irqhandler_t sc_ih; /* interrupt handler */
927d4a1addSreinoud int sc_irqmask; /* IRQ mask for this channel */
937d4a1addSreinoud } simide_channels[2];
944b51cecfSthorpej struct wdc_regs sc_wdc_regs[2];
957d4a1addSreinoud };
967d4a1addSreinoud
977aa6248cScube int simide_probe (device_t, cfdata_t, void *);
987aa6248cScube void simide_attach (device_t, device_t, void *);
997aa6248cScube void simide_shutdown (void *arg);
1007aa6248cScube int simide_intr (void *arg);
1017d4a1addSreinoud
1027aa6248cScube CFATTACH_DECL_NEW(simide, sizeof(struct simide_softc),
1035a9ddc14Sthorpej simide_probe, simide_attach, NULL, NULL);
1047d4a1addSreinoud
1057d4a1addSreinoud
1067d4a1addSreinoud /*
1077d4a1addSreinoud * Define prototypes for custom bus space functions.
1087d4a1addSreinoud */
1097d4a1addSreinoud
1107d4a1addSreinoud bs_rm_2_proto(simide);
1117d4a1addSreinoud bs_wm_2_proto(simide);
1127d4a1addSreinoud
1137d4a1addSreinoud /*
1147d4a1addSreinoud * Create an array of address structures. These define the addresses and
1157d4a1addSreinoud * masks needed for the different channels.
1167d4a1addSreinoud *
1177d4a1addSreinoud * index = channel
1187d4a1addSreinoud */
1197d4a1addSreinoud
1207d4a1addSreinoud struct {
1217d4a1addSreinoud u_int drive_registers;
1227d4a1addSreinoud u_int aux_register;
1237d4a1addSreinoud u_int irq_mask;
1247d4a1addSreinoud } simide_info[] = {
1257d4a1addSreinoud { PRIMARY_DRIVE_REGISTERS_POFFSET, PRIMARY_AUX_REGISTER_POFFSET,
1267d4a1addSreinoud CONTROL_PRIMARY_IRQ },
1277d4a1addSreinoud { SECONDARY_DRIVE_REGISTERS_POFFSET, SECONDARY_AUX_REGISTER_POFFSET,
1287d4a1addSreinoud CONTROL_SECONDARY_IRQ }
1297d4a1addSreinoud };
1307d4a1addSreinoud
1317d4a1addSreinoud /*
1327d4a1addSreinoud * Card probe function
1337d4a1addSreinoud *
1347d4a1addSreinoud * Just match the manufacturer and podule ID's
1357d4a1addSreinoud */
1367d4a1addSreinoud
1377d4a1addSreinoud int
simide_probe(device_t parent,cfdata_t cf,void * aux)1387aa6248cScube simide_probe(device_t parent, cfdata_t cf, void *aux)
1397d4a1addSreinoud {
1407d4a1addSreinoud struct podule_attach_args *pa = (void *)aux;
1417d4a1addSreinoud
14220518673Sbjh21 return (pa->pa_product == PODULE_SIMTEC_IDE);
1437d4a1addSreinoud }
1447d4a1addSreinoud
1457d4a1addSreinoud /*
1467d4a1addSreinoud * Card attach function
1477d4a1addSreinoud *
1487d4a1addSreinoud * Identify the card version and configure any children.
1497d4a1addSreinoud * Install a shutdown handler to kill interrupts on shutdown
1507d4a1addSreinoud */
1517d4a1addSreinoud
1527d4a1addSreinoud void
simide_attach(device_t parent,device_t self,void * aux)1537aa6248cScube simide_attach(device_t parent, device_t self, void *aux)
1547d4a1addSreinoud {
1557aa6248cScube struct simide_softc *sc = device_private(self);
1567d4a1addSreinoud struct podule_attach_args *pa = (void *)aux;
1577d4a1addSreinoud int status;
1587d4a1addSreinoud u_int iobase;
159870dad0fSbjh21 int channel, i;
1607d4a1addSreinoud struct simide_channel *scp;
1614b51cecfSthorpej struct ata_channel *cp;
1624b51cecfSthorpej struct wdc_regs *wdr;
1637d4a1addSreinoud irqhandler_t *ihp;
1647d4a1addSreinoud
1657d4a1addSreinoud /* Note the podule number and validate */
1667d4a1addSreinoud if (pa->pa_podule_number == -1)
1677d4a1addSreinoud panic("Podule has disappeared !");
1687d4a1addSreinoud
1697aa6248cScube sc->sc_wdcdev.sc_atac.atac_dev = self;
1707d4a1addSreinoud sc->sc_podule_number = pa->pa_podule_number;
1717d4a1addSreinoud sc->sc_podule = pa->pa_podule;
1727d4a1addSreinoud podules[sc->sc_podule_number].attached = 1;
1737d4a1addSreinoud
1744b51cecfSthorpej sc->sc_wdcdev.regs = sc->sc_wdc_regs;
1754b51cecfSthorpej
1767d4a1addSreinoud /*
1777d4a1addSreinoud * Ok we need our own bus tag as the register spacing
1787d4a1addSreinoud * is not the default.
1797d4a1addSreinoud *
1807d4a1addSreinoud * For the podulebus the bus tag cookie is the shift
1817d4a1addSreinoud * to apply to registers
1827d4a1addSreinoud * So duplicate the bus space tag and change the
1837d4a1addSreinoud * cookie.
1847d4a1addSreinoud *
1857d4a1addSreinoud * Also while we are at it replace the default
186e82c4d9bSandvar * read/write multiple short functions with
1877d4a1addSreinoud * optimised versions
1887d4a1addSreinoud */
1897d4a1addSreinoud
1907d4a1addSreinoud sc->sc_tag = *pa->pa_iot;
1917d4a1addSreinoud sc->sc_tag.bs_cookie = (void *) DRIVE_REGISTER_SPACING_SHIFT;
1927d4a1addSreinoud sc->sc_tag.bs_rm_2 = simide_bs_rm_2;
1937d4a1addSreinoud sc->sc_tag.bs_wm_2 = simide_bs_wm_2;
1947d4a1addSreinoud sc->sc_ctliot = pa->pa_iot;
1957d4a1addSreinoud
1967d4a1addSreinoud /* Obtain bus space handles for all the control registers */
1977d4a1addSreinoud if (bus_space_map(sc->sc_ctliot, pa->pa_podule->mod_base +
1987d4a1addSreinoud CONTROL_REGISTERS_POFFSET, CONTROL_REGISTER_SPACE, 0,
1997d4a1addSreinoud &sc->sc_ctlioh))
2007aa6248cScube panic("%s: Cannot map control registers", device_xname(self));
2017d4a1addSreinoud
2027d4a1addSreinoud /* Install a clean up handler to make sure IRQ's are disabled */
2037d4a1addSreinoud if (shutdownhook_establish(simide_shutdown, (void *)sc) == NULL)
2047aa6248cScube panic("%s: Cannot install shutdown handler",
2057aa6248cScube device_xname(self));
2067d4a1addSreinoud
2077d4a1addSreinoud /* Set the interrupt info for this podule */
2087d4a1addSreinoud sc->sc_podule->irq_addr = pa->pa_podule->mod_base
2097d4a1addSreinoud + CONTROL_REGISTERS_POFFSET + (CONTROL_REGISTER_OFFSET << 2);
2107d4a1addSreinoud sc->sc_podule->irq_mask = STATUS_IRQ;
2117d4a1addSreinoud
2127d4a1addSreinoud sc->sc_ctl_reg = 0;
2137d4a1addSreinoud
2147d4a1addSreinoud status = bus_space_read_1(sc->sc_ctliot, sc->sc_ctlioh,
2157d4a1addSreinoud STATUS_REGISTER_OFFSET);
2167d4a1addSreinoud
2177aa6248cScube aprint_normal(":");
2187d4a1addSreinoud /* If any of the bits in STATUS_FAULT are zero then we have a fault. */
2197d4a1addSreinoud if ((status & STATUS_FAULT) != STATUS_FAULT)
2207aa6248cScube aprint_normal(" card/cable fault (%02x) -", status);
2217d4a1addSreinoud
2227d4a1addSreinoud if (!(status & STATUS_RESET))
2237aa6248cScube aprint_normal(" (reset)");
2247d4a1addSreinoud if (!(status & STATUS_ADDR_TEST))
2257aa6248cScube aprint_normal(" (addr)");
2267d4a1addSreinoud if (!(status & STATUS_CS_TEST))
2277aa6248cScube aprint_normal(" (cs)");
2287d4a1addSreinoud if (!(status & STATUS_RW_TEST))
2297aa6248cScube aprint_normal(" (rw)");
2307d4a1addSreinoud
2317aa6248cScube aprint_normal("\n");
2327d4a1addSreinoud
2337d4a1addSreinoud /* Perhaps we should just abort at this point. */
2347d4a1addSreinoud /* if ((status & STATUS_FAULT) != STATUS_FAULT)
2357d4a1addSreinoud return;*/
2367d4a1addSreinoud
2377d4a1addSreinoud /*
2387d4a1addSreinoud * Enable IDE, Obey IORDY and disabled slow mode
2397d4a1addSreinoud */
2407d4a1addSreinoud sc->sc_ctl_reg |= CONTROL_IDE_ENABLE | CONTROL_IORDY
2417d4a1addSreinoud | CONTROL_SLOW_MODE_OFF;
2427d4a1addSreinoud bus_space_write_1(sc->sc_ctliot, sc->sc_ctlioh,
2437d4a1addSreinoud CONTROL_REGISTER_OFFSET, sc->sc_ctl_reg);
2447d4a1addSreinoud
2457d4a1addSreinoud /* Fill in wdc and channel infos */
2469cc521a1Sthorpej sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
2479cc521a1Sthorpej sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
2489cc521a1Sthorpej sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanarray;
2499cc521a1Sthorpej sc->sc_wdcdev.sc_atac.atac_nchannels = 2;
2509edd4d81Sbouyer sc->sc_wdcdev.wdc_maxdrives = 2;
2517d4a1addSreinoud for (channel = 0 ; channel < 2; channel++) {
2527d4a1addSreinoud scp = &sc->simide_channels[channel];
2534b51cecfSthorpej sc->sc_chanarray[channel] = &scp->sc_channel;
2544b51cecfSthorpej cp = &scp->sc_channel;
2554b51cecfSthorpej wdr = &sc->sc_wdc_regs[channel];
2567d4a1addSreinoud
257a963286fSthorpej cp->ch_channel = channel;
2589cc521a1Sthorpej cp->ch_atac = &sc->sc_wdcdev.sc_atac;
2594b51cecfSthorpej wdr->cmd_iot = wdr->ctl_iot = &sc->sc_tag;
2607d4a1addSreinoud iobase = pa->pa_podule->mod_base;
2614b51cecfSthorpej if (bus_space_map(wdr->cmd_iot, iobase +
2627d4a1addSreinoud simide_info[channel].drive_registers,
2634b51cecfSthorpej DRIVE_REGISTERS_SPACE, 0, &wdr->cmd_baseioh))
2647d4a1addSreinoud continue;
265e0884dc3Sbjh21 for (i = 0; i < WDC_NREG; i++) {
2664b51cecfSthorpej if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
2674b51cecfSthorpej i, i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) {
2684b51cecfSthorpej bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
269870dad0fSbjh21 DRIVE_REGISTERS_SPACE);
270870dad0fSbjh21 continue;
271870dad0fSbjh21 }
272870dad0fSbjh21 }
27326cf6855Sjdolecek wdc_init_shadow_regs(wdr);
2744b51cecfSthorpej if (bus_space_map(wdr->ctl_iot, iobase +
2754b51cecfSthorpej simide_info[channel].aux_register, 4, 0, &wdr->ctl_ioh)) {
2764b51cecfSthorpej bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
2777d4a1addSreinoud DRIVE_REGISTERS_SPACE);
2787d4a1addSreinoud continue;
2797d4a1addSreinoud }
2807d4a1addSreinoud /* Disable interrupts and clear any pending interrupts */
2817d4a1addSreinoud scp->sc_irqmask = simide_info[channel].irq_mask;
2827d4a1addSreinoud sc->sc_ctl_reg &= ~scp->sc_irqmask;
2837d4a1addSreinoud bus_space_write_1(sc->sc_ctliot, sc->sc_ctlioh,
2847d4a1addSreinoud CONTROL_REGISTER_OFFSET, sc->sc_ctl_reg);
2857d4a1addSreinoud ihp = &scp->sc_ih;
2867d4a1addSreinoud ihp->ih_func = simide_intr;
2877d4a1addSreinoud ihp->ih_arg = scp;
2887d4a1addSreinoud ihp->ih_level = IPL_BIO;
2897d4a1addSreinoud ihp->ih_name = "simide";
2907d4a1addSreinoud ihp->ih_maskaddr = pa->pa_podule->irq_addr;
2917d4a1addSreinoud ihp->ih_maskbits = scp->sc_irqmask;
2927d4a1addSreinoud if (irq_claim(sc->sc_podule->interrupt, ihp))
2930f09ed48Sprovos panic("%s: Cannot claim interrupt %d",
2947aa6248cScube device_xname(self), sc->sc_podule->interrupt);
2957d4a1addSreinoud /* clear any pending interrupts and enable interrupts */
2967d4a1addSreinoud sc->sc_ctl_reg |= scp->sc_irqmask;
2977d4a1addSreinoud bus_space_write_1(sc->sc_ctliot, sc->sc_ctlioh,
2987d4a1addSreinoud CONTROL_REGISTER_OFFSET, sc->sc_ctl_reg);
299536bcfc8She wdcattach(cp);
3007d4a1addSreinoud }
3017d4a1addSreinoud }
3027d4a1addSreinoud
3037d4a1addSreinoud /*
3047d4a1addSreinoud * Card shutdown function
3057d4a1addSreinoud *
3067d4a1addSreinoud * Called via do_shutdown_hooks() during kernel shutdown.
3077d4a1addSreinoud * Clear the cards's interrupt mask to stop any podule interrupts.
3087d4a1addSreinoud */
3097d4a1addSreinoud
3107d4a1addSreinoud void
simide_shutdown(void * arg)3117aa6248cScube simide_shutdown(void *arg)
3127d4a1addSreinoud {
3137d4a1addSreinoud struct simide_softc *sc = arg;
3147d4a1addSreinoud
3157d4a1addSreinoud sc->sc_ctl_reg &= (CONTROL_PRIMARY_IRQ | CONTROL_SECONDARY_IRQ);
3167d4a1addSreinoud
3177d4a1addSreinoud /* Disable card interrupts */
3187d4a1addSreinoud bus_space_write_1(sc->sc_ctliot, sc->sc_ctlioh,
3197d4a1addSreinoud CONTROL_REGISTER_OFFSET, sc->sc_ctl_reg);
3207d4a1addSreinoud }
3217d4a1addSreinoud
3227d4a1addSreinoud /*
3237d4a1addSreinoud * Podule interrupt handler
3247d4a1addSreinoud *
3257d4a1addSreinoud * If the interrupt was from our card pass it on to the wdc interrupt handler
3267d4a1addSreinoud */
3277d4a1addSreinoud int
simide_intr(void * arg)3287aa6248cScube simide_intr(void *arg)
3297d4a1addSreinoud {
3307d4a1addSreinoud struct simide_channel *scp = arg;
3317d4a1addSreinoud irqhandler_t *ihp = &scp->sc_ih;
3327d4a1addSreinoud volatile u_char *intraddr = (volatile u_char *)ihp->ih_maskaddr;
3337d4a1addSreinoud
3347d4a1addSreinoud /* XXX - not bus space yet - should really be handled by podulebus */
3357d4a1addSreinoud if ((*intraddr) & ihp->ih_maskbits)
3364b51cecfSthorpej wdcintr(&scp->sc_channel);
3377d4a1addSreinoud
3387d4a1addSreinoud return(0);
3397d4a1addSreinoud }
340