xref: /netbsd-src/sys/arch/acorn32/podulebus/sfas.c (revision b7b7574d3bf8eeb51a1fa3977b59142ec6434a55)
1 /*	$NetBSD: sfas.c,v 1.24 2014/02/22 19:03:06 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * Van Jacobson of Lawrence Berkeley Laboratory.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)scsi.c	7.5 (Berkeley) 5/4/91
35  */
36 
37 /*
38  * Copyright (c) 1995 Scott Stevens
39  * Copyright (c) 1995 Daniel Widenfalk
40  * Copyright (c) 1994 Christian E. Hopps
41  *
42  * This code is derived from software contributed to Berkeley by
43  * Van Jacobson of Lawrence Berkeley Laboratory.
44  *
45  * Redistribution and use in source and binary forms, with or without
46  * modification, are permitted provided that the following conditions
47  * are met:
48  * 1. Redistributions of source code must retain the above copyright
49  *    notice, this list of conditions and the following disclaimer.
50  * 2. Redistributions in binary form must reproduce the above copyright
51  *    notice, this list of conditions and the following disclaimer in the
52  *    documentation and/or other materials provided with the distribution.
53  * 3. All advertising materials mentioning features or use of this software
54  *    must display the following acknowledgement:
55  *	This product includes software developed by the University of
56  *	California, Berkeley and its contributors.
57  * 4. Neither the name of the University nor the names of its contributors
58  *    may be used to endorse or promote products derived from this software
59  *    without specific prior written permission.
60  *
61  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
62  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
63  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
64  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
65  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
66  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
67  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
68  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
69  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
70  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
71  * SUCH DAMAGE.
72  *
73  *	@(#)scsi.c	7.5 (Berkeley) 5/4/91
74  */
75 
76 /*
77  * Emulex FAS216 scsi adaptor driver
78  */
79 
80 /*
81  * Modified for NetBSD/arm32 by Scott Stevens
82  */
83 
84 #include <sys/cdefs.h>
85 __KERNEL_RCSID(0, "$NetBSD: sfas.c,v 1.24 2014/02/22 19:03:06 matt Exp $");
86 
87 #include <sys/param.h>
88 #include <sys/systm.h>
89 #include <sys/device.h>
90 #include <sys/buf.h>
91 #include <sys/proc.h>
92 
93 #include <dev/scsipi/scsi_all.h>
94 #include <dev/scsipi/scsipi_all.h>
95 #include <dev/scsipi/scsiconf.h>
96 
97 #include <uvm/uvm_extern.h>
98 
99 #include <machine/pmap.h>
100 #include <machine/cpu.h>
101 #include <machine/io.h>
102 #include <machine/intr.h>
103 #include <arm/arm32/katelib.h>
104 #include <acorn32/podulebus/podulebus.h>
105 #include <acorn32/podulebus/sfasreg.h>
106 #include <acorn32/podulebus/sfasvar.h>
107 
108 void sfas_minphys(struct buf *);
109 void sfas_init_nexus(struct sfas_softc *, struct nexus *);
110 void sfasinitialize(struct sfas_softc *);
111 void sfas_scsi_request(struct scsipi_channel *, scsipi_adapter_req_t, void *);
112 void sfas_donextcmd(struct sfas_softc *, struct sfas_pending *);
113 void sfas_scsidone(struct sfas_softc *, struct scsipi_xfer *, int);
114 void sfasintr(struct sfas_softc *);
115 void sfasiwait(struct sfas_softc *);
116 void sfas_ixfer(void *, int);
117 void sfasreset(struct sfas_softc *, int);
118 int  sfasselect(struct sfas_softc *, struct sfas_pending *, unsigned char *,
119 		int, unsigned char *, int, int);
120 void sfasicmd(struct sfas_softc *, struct sfas_pending *);
121 void sfasgo(struct sfas_softc *, struct sfas_pending *);
122 void sfas_save_pointers(struct sfas_softc *);
123 void sfas_restore_pointers(struct sfas_softc *);
124 void sfas_build_sdtrm(struct sfas_softc *, int, int);
125 int sfas_select_unit(struct sfas_softc *, short);
126 struct nexus *sfas_arbitate_target(struct sfas_softc *, int);
127 void sfas_setup_nexus(struct sfas_softc *, struct nexus *,
128 		      struct sfas_pending *, unsigned char *, int,
129 		      unsigned char *, int, int);
130 int sfas_pretests(struct sfas_softc *, sfas_regmap_p);
131 int sfas_midaction(struct sfas_softc *, sfas_regmap_p, struct nexus *);
132 int sfas_postaction(struct sfas_softc *, sfas_regmap_p, struct nexus *);
133 
134 /*
135  * Initialize these to make 'em patchable. Defaults to enable sync and discon.
136  */
137 u_char	sfas_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
138 u_char	sfas_inhibit_disc[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
139 
140 #undef DEBUG
141 #define DEBUG
142 #ifdef DEBUG
143 #define QPRINTF(a) if (sfas_debug > 1) printf a
144 int	sfas_debug = 2;
145 #else
146 #define QPRINTF
147 #endif
148 
149 /*
150  * default minphys routine for sfas based controllers
151  */
152 void
153 sfas_minphys(struct buf *bp)
154 {
155 
156 	/*
157 	 * No max transfer at this level.
158 	 */
159 	minphys(bp);
160 }
161 
162 /*
163  * Initialize the nexus structs.
164  */
165 void
166 sfas_init_nexus(struct sfas_softc *dev, struct nexus *nexus)
167 {
168 	memset(nexus, 0, sizeof(struct nexus));
169 
170 	nexus->state	= SFAS_NS_IDLE;
171 	nexus->period	= 200;
172 	nexus->offset	= 0;
173 	nexus->syncper	= 5;
174 	nexus->syncoff	= 0;
175 	nexus->config3	= dev->sc_config3 & ~SFAS_CFG3_FASTSCSI;
176 }
177 
178 void
179 sfasinitialize(struct sfas_softc *dev)
180 {
181 	int		 i;
182 
183 	dev->sc_led_status = 0;
184 
185 	TAILQ_INIT(&dev->sc_xs_pending);
186 	TAILQ_INIT(&dev->sc_xs_free);
187 
188 /*
189  * Initialize the sfas_pending structs and link them into the free list. We
190  * have to set vm_link_data.pages to 0 or the vm FIX won't work.
191  */
192 	for(i=0; i<MAXPENDING; i++) {
193 		TAILQ_INSERT_TAIL(&dev->sc_xs_free, &dev->sc_xs_store[i],
194 				  link);
195 	}
196 
197 /*
198  * Calculate the correct clock conversion factor 2 <= factor <= 8, i.e. set
199  * the factor to clock_freq / 5 (int).
200  */
201 	if (dev->sc_clock_freq <= 10)
202 		dev->sc_clock_conv_fact = 2;
203 	if (dev->sc_clock_freq <= 40)
204 		dev->sc_clock_conv_fact = 2+((dev->sc_clock_freq-10)/5);
205 	else
206 		panic("sfasinitialize: Clock frequence too high");
207 
208 /* Setup and save the basic configuration registers */
209 	dev->sc_config1 = (dev->sc_host_id & SFAS_CFG1_BUS_ID_MASK);
210 	dev->sc_config2 = SFAS_CFG2_FEATURES_ENABLE;
211 	dev->sc_config3 = (dev->sc_clock_freq > 25 ? SFAS_CFG3_FASTCLK : 0);
212 
213 /* Precalculate timeout value and clock period. */
214 /* Ekkk ... floating point in the kernel !!!! */
215 /*	dev->sc_timeout_val  = 1+dev->sc_timeout*dev->sc_clock_freq/
216 				 (7.682*dev->sc_clock_conv_fact);*/
217 	dev->sc_timeout_val  = 1+dev->sc_timeout*dev->sc_clock_freq/
218 				 ((7682*dev->sc_clock_conv_fact)/1000);
219 	dev->sc_clock_period = 1000/dev->sc_clock_freq;
220 
221 	sfasreset(dev, 1 | 2);	/* Reset Chip and Bus */
222 
223 	dev->sc_units_disconnected = 0;
224 	dev->sc_msg_in_len = 0;
225 	dev->sc_msg_out_len = 0;
226 
227 	dev->sc_flags = 0;
228 
229 	for(i=0; i<8; i++)
230 		sfas_init_nexus(dev, &dev->sc_nexus[i]);
231 
232 	if (dev->sc_ixfer == NULL)
233 		dev->sc_ixfer = sfas_ixfer;
234 
235 /*
236  * Setup bump buffer.
237  */
238 	dev->sc_bump_va = (u_char *)uvm_km_alloc(kernel_map, dev->sc_bump_sz, 0,
239 	    UVM_KMF_WIRED | UVM_KMF_ZERO);
240 	(void) pmap_extract(pmap_kernel(), (vaddr_t)dev->sc_bump_va,
241 	    (paddr_t *)&dev->sc_bump_pa);
242 
243 /*
244  * Setup pages to noncachable, that way we don't have to flush the cache
245  * every time we need "bumped" transfer.
246  */
247 	pt_entry_t * const ptep = vtopte((vaddr_t) dev->sc_bump_va);
248 	const pt_entry_t opte = *ptep;
249 	const pt_entry_t npte = opte & ~(L2_C | L2_B);
250 	l2pte_set(ptep, npte, opte);
251 	PTE_SYNC(ptep);
252 	cpu_tlb_flushD();
253 	cpu_dcache_wbinv_range((vm_offset_t)dev->sc_bump_va, PAGE_SIZE);
254 
255 	printf(" dmabuf V0x%08x P0x%08x", (u_int)dev->sc_bump_va, (u_int)dev->sc_bump_pa);
256 }
257 
258 
259 /*
260  * used by specific sfas controller
261  */
262 void
263 sfas_scsi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
264 								void *arg)
265 {
266 	struct scsipi_xfer *xs;
267 	struct sfas_softc	*dev = device_private(chan->chan_adapter->adapt_dev);
268 	struct scsipi_periph	*periph;
269 	struct sfas_pending	*pendp;
270 	int			 flags, s, target;
271 
272 	switch (req) {
273 	case ADAPTER_REQ_RUN_XFER:
274 		xs = arg;
275 		periph = xs->xs_periph;
276 		flags = xs->xs_control;
277 		target = periph->periph_target;
278 
279 		if (flags & XS_CTL_DATA_UIO)
280 			panic("sfas: scsi data uio requested");
281 
282 		if ((flags & XS_CTL_POLL) && (dev->sc_flags & SFAS_ACTIVE))
283 			panic("sfas_scsicmd: busy");
284 
285 /* Get hold of a sfas_pending block. */
286 		s = splbio();
287 		pendp = dev->sc_xs_free.tqh_first;
288 		if (pendp == NULL) {
289 			xs->error = XS_RESOURCE_SHORTAGE;
290 			scsipi_done(xs);
291 			splx(s);
292 			return;
293 		}
294 		TAILQ_REMOVE(&dev->sc_xs_free, pendp, link);
295 		pendp->xs = xs;
296 		splx(s);
297 
298 
299 /* If the chip if busy OR the unit is busy, we have to wait for out turn. */
300 		if ((dev->sc_flags & SFAS_ACTIVE) ||
301 		    (dev->sc_nexus[target].flags & SFAS_NF_UNIT_BUSY)) {
302 			s = splbio();
303 			TAILQ_INSERT_TAIL(&dev->sc_xs_pending, pendp, link);
304 			splx(s);
305 		} else
306 			sfas_donextcmd(dev, pendp);
307 
308 		return;
309 
310 	case ADAPTER_REQ_GROW_RESOURCES:
311 	case ADAPTER_REQ_SET_XFER_MODE:
312 		/* XXX Not supported. */
313 		return;
314 	}
315 }
316 
317 /*
318  * Actually select the unit, whereby the whole scsi-process is started.
319  */
320 void
321 sfas_donextcmd(struct sfas_softc *dev, struct sfas_pending *pendp)
322 {
323 	int	s;
324 
325 /*
326  * Special case for scsi unit reset. I think this is waterproof. We first
327  * select the unit during splbio. We then cycle through the generated
328  * interrupts until the interrupt routine signals that the unit has
329  * acknowledged the reset. After that we have to wait a reset to select
330  * delay before anything else can happend.
331  */
332 	if (pendp->xs->xs_control & XS_CTL_RESET) {
333 		struct nexus	*nexus;
334 
335 		s = splbio();
336 		while(!sfasselect(dev, pendp, 0, 0, 0, 0, SFAS_SELECT_K)) {
337 			splx(s);
338 			delay(10);
339 			s = splbio();
340 		}
341 
342 		nexus = dev->sc_cur_nexus;
343 		while(nexus->flags & SFAS_NF_UNIT_BUSY) {
344 			sfasiwait(dev);
345 			sfasintr(dev);
346 		}
347 
348 		nexus->flags |= SFAS_NF_UNIT_BUSY;
349 		splx(s);
350 
351 		sfasreset(dev, 0);
352 
353 		s = splbio();
354 		nexus->flags &= ~SFAS_NF_UNIT_BUSY;
355 		splx(s);
356 	}
357 
358 /*
359  * If we are polling, go to splbio and perform the command, else we poke
360  * the scsi-bus via sfasgo to get the interrupt machine going.
361  */
362 	if (pendp->xs->xs_control & XS_CTL_POLL) {
363 		s = splbio();
364 		sfasicmd(dev, pendp);
365 		TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link);
366 		splx(s);
367 	} else {
368 		sfasgo(dev, pendp);
369 	}
370 }
371 
372 void
373 sfas_scsidone(struct sfas_softc *dev, struct scsipi_xfer *xs, int stat)
374 {
375 	struct sfas_pending	*pendp;
376 	int			 s;
377 
378 	xs->status = stat;
379 
380 	if (stat == 0)
381 		xs->resid = 0;
382 	else {
383 		switch(stat) {
384 		case SCSI_CHECK:
385 		case SCSI_BUSY:
386 			xs->error = XS_BUSY;
387 			break;
388 		case -1:
389 			xs->error = XS_DRIVER_STUFFUP;
390 			QPRINTF(("sfas_scsicmd() bad %x\n", stat));
391 			break;
392 		default:
393 			xs->error = XS_TIMEOUT;
394 			break;
395 		}
396 	}
397 
398 /* Steal the next command from the queue so that one unit can't hog the bus. */
399 	s = splbio();
400 	pendp = dev->sc_xs_pending.tqh_first;
401 	while(pendp) {
402 		if (!(dev->sc_nexus[pendp->xs->xs_periph->periph_target].flags &
403 		      SFAS_NF_UNIT_BUSY))
404 			break;
405 		pendp = pendp->link.tqe_next;
406 	}
407 
408 	if (pendp != NULL) {
409 		TAILQ_REMOVE(&dev->sc_xs_pending, pendp, link);
410 	}
411 
412 	splx(s);
413 	scsipi_done(xs);
414 
415 	if (pendp)
416 		sfas_donextcmd(dev, pendp);
417 }
418 
419 /*
420  * There are two kinds of reset:
421  *  1) CHIP-bus reset. This also implies a SCSI-bus reset.
422  *  2) SCSI-bus reset.
423  * After the appropriate resets have been performed we wait a reset to select
424  * delay time.
425  */
426 void
427 sfasreset(struct sfas_softc *dev, int how)
428 {
429 	sfas_regmap_p	rp;
430 	int		i, s;
431 
432 	rp = dev->sc_fas;
433 
434 	if (how & 1) {
435 		for(i=0; i<8; i++)
436 			sfas_init_nexus(dev, &dev->sc_nexus[i]);
437 
438 		*rp->sfas_command = SFAS_CMD_RESET_CHIP;
439 		delay(1);
440 		*rp->sfas_command = SFAS_CMD_NOP;
441 
442 		*rp->sfas_config1 = dev->sc_config1;
443 		*rp->sfas_config2 = dev->sc_config2;
444 		*rp->sfas_config3 = dev->sc_config3;
445 		*rp->sfas_timeout = dev->sc_timeout_val;
446 		*rp->sfas_clkconv = dev->sc_clock_conv_fact &
447 					SFAS_CLOCK_CONVERSION_MASK;
448 	}
449 
450 	if (how & 2) {
451 		for(i=0; i<8; i++)
452 			sfas_init_nexus(dev, &dev->sc_nexus[i]);
453 
454 		s = splbio();
455 
456 		*rp->sfas_command = SFAS_CMD_RESET_SCSI_BUS;
457 		delay(100);
458 
459 /* Skip interrupt generated by RESET_SCSI_BUS */
460 		while(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING) {
461 			dev->sc_status = *rp->sfas_status;
462 			dev->sc_interrupt = *rp->sfas_interrupt;
463 
464 			delay(100);
465 		}
466 
467 		dev->sc_status = *rp->sfas_status;
468 		dev->sc_interrupt = *rp->sfas_interrupt;
469 
470 		splx(s);
471 	}
472 
473 	if (dev->sc_config_flags & SFAS_SLOW_START)
474 		delay(4*250000); /* RESET to SELECT DELAY*4 for slow devices */
475 	else
476 		delay(250000);	 /* RESET to SELECT DELAY */
477 }
478 
479 /*
480  * Save active data pointers to the nexus block currently active.
481  */
482 void
483 sfas_save_pointers(struct sfas_softc *dev)
484 {
485 	struct nexus	*nx;
486 
487 	nx = dev->sc_cur_nexus;
488 	if (nx) {
489 		nx->cur_link	= dev->sc_cur_link;
490 		nx->max_link	= dev->sc_max_link;
491 		nx->buf		= dev->sc_buf;
492 		nx->len		= dev->sc_len;
493 		nx->dma_len	= dev->sc_dma_len;
494 		nx->dma_buf	= dev->sc_dma_buf;
495 		nx->dma_blk_flg	= dev->sc_dma_blk_flg;
496 		nx->dma_blk_len	= dev->sc_dma_blk_len;
497 		nx->dma_blk_ptr	= dev->sc_dma_blk_ptr;
498 	}
499 }
500 
501 /*
502  * Restore data pointers from the currently active nexus block.
503  */
504 void
505 sfas_restore_pointers(struct sfas_softc *dev)
506 {
507 	struct nexus	*nx;
508 
509 	nx = dev->sc_cur_nexus;
510 	if (nx) {
511 		dev->sc_cur_link    = nx->cur_link;
512 		dev->sc_max_link    = nx->max_link;
513 		dev->sc_buf	    = nx->buf;
514 		dev->sc_len	    = nx->len;
515 		dev->sc_dma_len	    = nx->dma_len;
516 		dev->sc_dma_buf	    = nx->dma_buf;
517 		dev->sc_dma_blk_flg = nx->dma_blk_flg;
518 		dev->sc_dma_blk_len = nx->dma_blk_len;
519 		dev->sc_dma_blk_ptr = nx->dma_blk_ptr;
520 		dev->sc_chain	    = nx->dma;
521 		dev->sc_unit	    = (nx->lun_unit & 0x0F);
522 		dev->sc_lun	    = (nx->lun_unit & 0xF0) >> 4;
523 	}
524 }
525 
526 /*
527  * sfasiwait is used during interrupt and polled IO to wait for an event from
528  * the FAS chip. This function MUST NOT BE CALLED without interrupt disabled.
529  */
530 void
531 sfasiwait(struct sfas_softc *dev)
532 {
533 	sfas_regmap_p	rp;
534 
535 /*
536  * If SFAS_DONT_WAIT is set, we have already grabbed the interrupt info
537  * elsewhere. So we don't have to wait for it.
538  */
539 	if (dev->sc_flags & SFAS_DONT_WAIT) {
540 		dev->sc_flags &= ~SFAS_DONT_WAIT;
541 		return;
542 	}
543 
544 	rp = dev->sc_fas;
545 
546 /* Wait for FAS chip to signal an interrupt. */
547 	while(!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING))
548 		delay(1);
549 
550 /* Grab interrupt info from chip. */
551 	dev->sc_status = *rp->sfas_status;
552 	dev->sc_interrupt = *rp->sfas_interrupt;
553 	if (dev->sc_interrupt & SFAS_INT_RESELECTED) {
554 		dev->sc_resel[0] = *rp->sfas_fifo;
555 		dev->sc_resel[1] = *rp->sfas_fifo;
556 	}
557 }
558 
559 /*
560  * Transfer info to/from device. sfas_ixfer uses polled IO+sfasiwait so the
561  * rules that apply to sfasiwait also applies here.
562  */
563 void
564 sfas_ixfer(void *v, int polling)
565 {
566 	struct sfas_softc *dev = v;
567 	sfas_regmap_p	 rp;
568 	u_char		*buf;
569 	int		 len, mode, phase;
570 
571 	rp = dev->sc_fas;
572 	buf = dev->sc_buf;
573 	len = dev->sc_len;
574 
575 /*
576  * Decode the scsi phase to determine whether we are reading or writing.
577  * mode == 1 => READ, mode == 0 => WRITE
578  */
579 	phase = dev->sc_status & SFAS_STAT_PHASE_MASK;
580 	mode = (phase == SFAS_PHASE_DATA_IN);
581 
582 	while(len && ((dev->sc_status & SFAS_STAT_PHASE_MASK) == phase))
583 		if (mode) {
584 			*rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
585 
586 			sfasiwait(dev);
587 
588 			*buf++ = *rp->sfas_fifo;
589 			len--;
590 		} else {
591 			len--;
592 			*rp->sfas_fifo = *buf++;
593 			*rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
594 
595 			sfasiwait(dev);
596 		}
597 
598 /* Update buffer pointers to reflect the sent/received data. */
599 	dev->sc_buf = buf;
600 	dev->sc_len = len;
601 
602 /*
603  * Since the last sfasiwait will be a phase-change, we can't wait for it
604  * again later, so we have to signal that.
605  * Since this may be called from an interrupt initiated routine then we
606  * must call sfasintr again to avoid losing an interrupt. Phew!
607  */
608 	if(polling)
609 		dev->sc_flags |= SFAS_DONT_WAIT;
610 	else
611 		sfasintr(dev);
612 }
613 
614 /*
615  * Build a Synchronous Data Transfer Request message
616  */
617 void
618 sfas_build_sdtrm(struct sfas_softc *dev, int period, int offset)
619 {
620 	dev->sc_msg_out[0] = 0x01;
621 	dev->sc_msg_out[1] = 0x03;
622 	dev->sc_msg_out[2] = 0x01;
623 	dev->sc_msg_out[3] = period/4;
624 	dev->sc_msg_out[4] = offset;
625 	dev->sc_msg_out_len= 5;
626 }
627 
628 /*
629  * Arbitate the scsi bus and select the unit
630  */
631 int
632 sfas_select_unit(struct sfas_softc *dev, short target)
633 {
634 	sfas_regmap_p	 rp;
635 	struct nexus	*nexus;
636 	int		 s, retcode, i;
637 	u_char		 cmd;
638 
639 	s = splbio();	/* Do this at splbio so that we won't be disturbed. */
640 
641 	retcode = 0;
642 
643 	nexus = &dev->sc_nexus[target];
644 
645 /*
646  * Check if the chip is busy. If not the we mark it as so and hope that nobody
647  * reselects us until we have grabbed the bus.
648  */
649 	if (!(dev->sc_flags & SFAS_ACTIVE) && !dev->sc_sel_nexus) {
650 		dev->sc_flags |= SFAS_ACTIVE;
651 
652 		rp = dev->sc_fas;
653 
654 		*rp->sfas_syncper = nexus->syncper;
655 		*rp->sfas_syncoff = nexus->syncoff;
656 		*rp->sfas_config3 = nexus->config3;
657 
658 		*rp->sfas_config1 = dev->sc_config1;
659 		*rp->sfas_timeout = dev->sc_timeout_val;
660 		*rp->sfas_dest_id = target;
661 
662 /* If nobody has stolen the bus, we can send a select command to the chip. */
663 		if (!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) {
664 			*rp->sfas_fifo = nexus->ID;
665 			if ((nexus->flags & (SFAS_NF_DO_SDTR | SFAS_NF_RESET))
666 			    || (dev->sc_msg_out_len != 0))
667 				cmd = SFAS_CMD_SEL_ATN_STOP;
668 			else {
669 				for(i=0; i<nexus->clen; i++)
670 					*rp->sfas_fifo = nexus->cbuf[i];
671 
672 				cmd = SFAS_CMD_SEL_ATN;
673 			}
674 
675 			dev->sc_sel_nexus = nexus;
676 
677 			*rp->sfas_command = cmd;
678 			retcode = 1;
679 			nexus->flags &= ~SFAS_NF_RETRY_SELECT;
680 		} else
681 			nexus->flags |= SFAS_NF_RETRY_SELECT;
682 	} else
683 		nexus->flags |= SFAS_NF_RETRY_SELECT;
684 
685 	splx(s);
686 	return(retcode);
687 }
688 
689 /*
690  * Grab the nexus if available else return 0.
691  */
692 struct nexus *
693 sfas_arbitate_target(struct sfas_softc *dev, int target)
694 {
695 	struct nexus	*nexus;
696 	int		 s;
697 
698 /*
699  * This is realy simple. Raise interrupt level to splbio. Grab the nexus and
700  * leave.
701  */
702 	nexus = &dev->sc_nexus[target];
703 
704 	s = splbio();
705 
706 	if (nexus->flags & SFAS_NF_UNIT_BUSY)
707 		nexus = 0;
708 	else
709 		nexus->flags |= SFAS_NF_UNIT_BUSY;
710 
711 	splx(s);
712 	return(nexus);
713 }
714 
715 /*
716  * Setup a nexus for use. Initializes command, buffer pointers and DMA chain.
717  */
718 void
719 sfas_setup_nexus(struct sfas_softc *dev, struct nexus *nexus, struct sfas_pending *pendp, unsigned char *cbuf, int clen, unsigned char *buf, int len, int mode)
720 {
721 	char	sync, target, lun;
722 
723 	target = pendp->xs->xs_periph->periph_target;
724 	lun    = pendp->xs->xs_periph->periph_lun;
725 
726 /*
727  * Adopt mode to reflect the config flags.
728  * If we can't use DMA we can't use synch transfer. Also check the
729  * sfas_inhibit_xxx[target] flags.
730  */
731 	if ((dev->sc_config_flags & (SFAS_NO_SYNCH | SFAS_NO_DMA)) ||
732 	    sfas_inhibit_sync[(int)target])
733 		mode &= ~SFAS_SELECT_S;
734 
735 	if ((dev->sc_config_flags & SFAS_NO_RESELECT) ||
736 	    sfas_inhibit_disc[(int)target])
737 		mode &= ~SFAS_SELECT_R;
738 
739 	nexus->xs		= pendp->xs;
740 
741 /* Setup the nexus struct. */
742 	nexus->ID	   = ((mode & SFAS_SELECT_R) ? 0xC0 : 0x80) | lun;
743 	nexus->clen	   = clen;
744 	memcpy(nexus->cbuf, cbuf, nexus->clen);
745 	nexus->cbuf[1] |= lun << 5;		/* Fix the lun bits */
746 	nexus->cur_link	   = 0;
747 	nexus->dma_len	   = 0;
748 	nexus->dma_buf	   = 0;
749 	nexus->dma_blk_len = 0;
750 	nexus->dma_blk_ptr = 0;
751 	nexus->len	   = len;
752 	nexus->buf	   = buf;
753 	nexus->lun_unit	   = (lun << 4) | target;
754 	nexus->state	   = SFAS_NS_SELECTED;
755 
756 /* We must keep these flags. All else must be zero. */
757 	nexus->flags	  &= SFAS_NF_UNIT_BUSY
758 			   | SFAS_NF_SYNC_TESTED | SFAS_NF_SELECT_ME;
759 
760 	if (mode & SFAS_SELECT_I)
761 		nexus->flags |= SFAS_NF_IMMEDIATE;
762 	if (mode & SFAS_SELECT_K)
763 		nexus->flags |= SFAS_NF_RESET;
764 
765 	sync  = ((mode & SFAS_SELECT_S) ? 1 : 0);
766 
767 /* We can't use sync during polled IO. */
768 	if (sync && (mode & SFAS_SELECT_I))
769 		sync = 0;
770 
771 	if (!sync &&
772 	    ((nexus->flags & SFAS_NF_SYNC_TESTED) && (nexus->offset != 0))) {
773 		/*
774 		 * If the scsi unit is set to synch transfer and we don't want
775 		 * that, we have to renegotiate.
776 		 */
777 
778 		nexus->flags |= SFAS_NF_DO_SDTR;
779 		nexus->period = 200;
780 		nexus->offset = 0;
781 	} else if (sync && !(nexus->flags & SFAS_NF_SYNC_TESTED)) {
782 		/*
783 		 * If the scsi unit is not set to synch transfer and we want
784 		 * that, we have to negotiate. This should realy base the
785 		 * period on the clock frequence rather than just check if
786 		 * >25 MHz
787 		 */
788 
789 		nexus->flags |= SFAS_NF_DO_SDTR;
790 		nexus->period = ((dev->sc_clock_freq>25) ? 100 : 200);
791 		nexus->offset = 8;
792 
793 		/* If the user has a long cable, we want to limit the period */
794 		if ((nexus->period == 100) &&
795 		    (dev->sc_config_flags & SFAS_SLOW_CABLE))
796 			nexus->period = 200;
797 	}
798 
799 /*
800  * Fake a DMA-block for polled IO. This way we can use the same code to handle
801  * reselection. Much nicer this way.
802  */
803 	if ((mode & SFAS_SELECT_I) || (dev->sc_config_flags & SFAS_NO_DMA)) {
804 		nexus->dma[0].ptr = buf;
805 		nexus->dma[0].len = len;
806 		nexus->dma[0].flg = SFAS_CHAIN_PRG;
807 		nexus->max_link   = 1;
808 	} else {
809 		nexus->max_link = dev->sc_build_dma_chain(dev, nexus->dma,
810 							  buf, len);
811 	}
812 
813 /* Flush the caches. */
814 
815 	if (len && !(mode & SFAS_SELECT_I))
816 		cpu_dcache_wbinv_range((vm_offset_t)buf, len);
817 }
818 
819 int
820 sfasselect(struct sfas_softc *dev, struct sfas_pending *pendp, unsigned char *cbuf, int clen, unsigned char *buf, int len, int mode)
821 {
822 	struct nexus	*nexus;
823 
824 /* Get the nexus struct. */
825 	nexus = sfas_arbitate_target(dev, pendp->xs->xs_periph->periph_target);
826 	if (nexus == NULL)
827 		return(0);
828 
829 /* Setup the nexus struct. */
830 	sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode);
831 
832 /* Post it to the interrupt machine. */
833 	sfas_select_unit(dev, pendp->xs->xs_periph->periph_target);
834 
835 	return(1);
836 }
837 
838 void
839 sfasgo(struct sfas_softc *dev, struct sfas_pending *pendp)
840 {
841 	int	 s;
842 	char	*buf;
843 
844 	buf    = pendp->xs->data;
845 
846 	if (sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen,
847 		      buf, pendp->xs->datalen, SFAS_SELECT_RS)) {
848 		/*
849 		 * We got the command going so the sfas_pending struct is now
850 		 * free to reuse.
851 		 */
852 
853 		s = splbio();
854 		TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link);
855 		splx(s);
856 	} else {
857 		/*
858 		 * We couldn't make the command fly so we have to wait. The
859 		 * struct MUST be inserted at the head to keep the order of
860 		 * the commands.
861 		 */
862 
863 		s = splbio();
864 		TAILQ_INSERT_HEAD(&dev->sc_xs_pending, pendp, link);
865 		splx(s);
866 	}
867 
868 	return;
869 }
870 
871 /*
872  * Part one of the interrupt machine. Error checks and reselection test.
873  * We don't know if we have an active nexus here!
874  */
875 int
876 sfas_pretests(struct sfas_softc *dev, sfas_regmap_p rp)
877 {
878 	struct nexus	*nexus;
879 	int		 i, s;
880 
881 	if (dev->sc_interrupt & SFAS_INT_SCSI_RESET_DETECTED) {
882 		/*
883 		 * Cleanup and notify user. Lets hope that this is all we
884 		 * have to do
885 		 */
886 
887 		for(i=0; i<8; i++) {
888 			if (dev->sc_nexus[i].xs)
889 				sfas_scsidone(dev, dev->sc_nexus[i].xs, -2);
890 
891 			sfas_init_nexus(dev, &dev->sc_nexus[i]);
892 		}
893 		printf("sfasintr: SCSI-RESET detected!");
894 		return(-1);
895 	}
896 
897 	if (dev->sc_interrupt & SFAS_INT_ILLEGAL_COMMAND) {
898 		/* Something went terrible wrong! Dump some data and panic! */
899 
900 		printf("FIFO:");
901 		while(*rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK)
902 			printf(" %x", *rp->sfas_fifo);
903 		printf("\n");
904 
905 		printf("CMD: %x\n", *rp->sfas_command);
906 		panic("sfasintr: ILLEGAL COMMAND!");
907 	}
908 
909 	if (dev->sc_interrupt & SFAS_INT_RESELECTED) {
910 		/* We were reselected. Set the chip as busy */
911 
912 		s = splbio();
913 		dev->sc_flags |= SFAS_ACTIVE;
914 		if (dev->sc_sel_nexus) {
915 			dev->sc_sel_nexus->flags |= SFAS_NF_SELECT_ME;
916 			dev->sc_sel_nexus = 0;
917 		}
918 		splx(s);
919 
920 		if (dev->sc_units_disconnected) {
921 			/* Find out who reselected us. */
922 
923 			dev->sc_resel[0] &= ~(1<<dev->sc_host_id);
924 
925 			for(i=0; i<8; i++)
926 				if (dev->sc_resel[0] & (1<<i))
927 					break;
928 
929 			if (i == 8)
930 				panic("Illegal reselection!");
931 
932 			if (dev->sc_nexus[i].state == SFAS_NS_DISCONNECTED) {
933 				/*
934 				 * This unit had disconnected, so we reconnect
935 				 * it.
936 				 */
937 
938 				dev->sc_cur_nexus = &dev->sc_nexus[i];
939 				nexus = dev->sc_cur_nexus;
940 
941 				*rp->sfas_syncper = nexus->syncper;
942 				*rp->sfas_syncoff = nexus->syncoff;
943 				*rp->sfas_config3 = nexus->config3;
944 
945 				*rp->sfas_dest_id = i & 7;
946 
947 				dev->sc_units_disconnected--;
948 				dev->sc_msg_in_len= 0;
949 
950 				/* Restore active pointers. */
951 				sfas_restore_pointers(dev);
952 
953 				nexus->state = SFAS_NS_RESELECTED;
954 
955 				*rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED;
956 
957 				return(1);
958 			}
959 		}
960 
961 		/* Somehow we got an illegal reselection. Dump and panic. */
962 		printf("sfasintr: resel[0] %x resel[1] %x disconnected %d\n",
963 		       dev->sc_resel[0], dev->sc_resel[1],
964 		       dev->sc_units_disconnected);
965 		panic("sfasintr: Unexpected reselection!");
966 	}
967 
968 	return(0);
969 }
970 
971 /*
972  * Part two of the interrupt machine. Handle disconnection and post command
973  * processing. We know that we have an active nexus here.
974  */
975 int
976 sfas_midaction(struct sfas_softc *dev, sfas_regmap_p rp, struct nexus *nexus)
977 {
978 	int	i, left, len, s;
979 	u_char	status, msg;
980 
981 	if (dev->sc_interrupt & SFAS_INT_DISCONNECT) {
982 		s = splbio();
983 		dev->sc_cur_nexus = 0;
984 
985 		/* Mark chip as busy and clean up the chip FIFO. */
986 		dev->sc_flags &= ~SFAS_ACTIVE;
987 		*rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
988 
989 		/* Let the nexus state reflect what we have to do. */
990 		switch(nexus->state) {
991 		case SFAS_NS_SELECTED:
992 			dev->sc_sel_nexus = 0;
993 			nexus->flags &= ~SFAS_NF_SELECT_ME;
994 
995 			/*
996 			 * We were trying to select the unit. Probably no unit
997 			 * at this ID.
998 			 */
999 			nexus->xs->resid = dev->sc_len;
1000 
1001 			nexus->status = -2;
1002 			nexus->flags &= ~SFAS_NF_UNIT_BUSY;
1003 			nexus->state = SFAS_NS_FINISHED;
1004 			break;
1005 
1006 		case SFAS_NS_DONE:
1007 			/* All done. */
1008 			nexus->xs->resid = dev->sc_len;
1009 
1010 			nexus->flags &= ~SFAS_NF_UNIT_BUSY;
1011 			nexus->state  = SFAS_NS_FINISHED;
1012 			dev->sc_led(dev, 0);
1013 			break;
1014 
1015 		case SFAS_NS_DISCONNECTING:
1016 			/*
1017 			 * We have received a DISCONNECT message, so we are
1018 			 * doing a normal disconnection.
1019 			 */
1020 			nexus->state = SFAS_NS_DISCONNECTED;
1021 
1022 			dev->sc_units_disconnected++;
1023 			break;
1024 
1025 		case SFAS_NS_RESET:
1026 			/*
1027 			 * We were reseting this SCSI-unit. Clean up the
1028 			 * nexus struct.
1029 			 */
1030 			dev->sc_led(dev, 0);
1031 			sfas_init_nexus(dev, nexus);
1032 			break;
1033 
1034 		default:
1035 			/*
1036 			 * Unexpected disconnection! Cleanup and exit. This
1037 			 * shouldn't cause any problems.
1038 			 */
1039 			printf("sfasintr: Unexpected disconnection\n");
1040 			printf("sfasintr: u %x s %d p %d f %x c %x\n",
1041 			       nexus->lun_unit, nexus->state,
1042 			       dev->sc_status & SFAS_STAT_PHASE_MASK,
1043 			       nexus->flags, nexus->cbuf[0]);
1044 
1045 			nexus->xs->resid = dev->sc_len;
1046 
1047 			nexus->flags &= ~SFAS_NF_UNIT_BUSY;
1048 			nexus->state = SFAS_NS_FINISHED;
1049 			nexus->status = -3;
1050 
1051 			dev->sc_led(dev, 0);
1052 			break;
1053 		}
1054 
1055 		/*
1056 		 * If we have disconnected units, we MUST enable reselection
1057 		 * within 250ms.
1058 		 */
1059 		if (dev->sc_units_disconnected &&
1060 		    !(dev->sc_flags & SFAS_ACTIVE))
1061 			*rp->sfas_command = SFAS_CMD_ENABLE_RESEL;
1062 
1063 		splx(s);
1064 
1065 		/* Select the first pre-initialized nexus we find. */
1066 		for(i=0; i<8; i++)
1067 			if (dev->sc_nexus[i].flags & (SFAS_NF_SELECT_ME | SFAS_NF_RETRY_SELECT))
1068 				if (sfas_select_unit(dev, i) == 2)
1069 					break;
1070 
1071 		/* We are done with this nexus! */
1072 		if (nexus->state == SFAS_NS_FINISHED)
1073 			sfas_scsidone(dev, nexus->xs, nexus->status);
1074 
1075 		return(1);
1076 	}
1077 
1078 	switch(nexus->state) {
1079 	case SFAS_NS_SELECTED:
1080 		dev->sc_cur_nexus = nexus;
1081 		dev->sc_sel_nexus = 0;
1082 
1083 		nexus->flags &= ~SFAS_NF_SELECT_ME;
1084 
1085 		/*
1086 		 * We have selected a unit. Setup chip, restore pointers and
1087 		 * light the led.
1088 		 */
1089 		*rp->sfas_syncper = nexus->syncper;
1090 		*rp->sfas_syncoff = nexus->syncoff;
1091 		*rp->sfas_config3 = nexus->config3;
1092 
1093 		sfas_restore_pointers(dev);
1094 
1095 		nexus->status	= 0xFF;
1096 		dev->sc_msg_in[0] = 0xFF;
1097 		dev->sc_msg_in_len= 0;
1098 
1099 		dev->sc_led(dev, 1);
1100 
1101 		break;
1102 
1103 	case SFAS_NS_DATA_IN:
1104 	case SFAS_NS_DATA_OUT:
1105 		/* We have transfered data. */
1106 		if (dev->sc_dma_len)
1107 			if (dev->sc_cur_link < dev->sc_max_link) {
1108 				/*
1109 				 * Clean up DMA and at the same time get how
1110 				 * many bytes that were NOT transfered.
1111 				 */
1112 			  left = dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR);
1113 			  len  = dev->sc_dma_len;
1114 
1115 			  if (nexus->state == SFAS_NS_DATA_IN) {
1116 			    /*
1117 			     * If we were bumping we may have had an odd length
1118 			     * which means that there may be bytes left in the
1119 			     * fifo. We also need to move the data from the
1120 			     * bump buffer to the actual memory.
1121 			     */
1122 			    if (dev->sc_dma_buf == dev->sc_bump_pa)
1123 			    {
1124 			      while((*rp->sfas_fifo_flags&SFAS_FIFO_COUNT_MASK)
1125 				    && left)
1126 				dev->sc_bump_va[len-(left--)] = *rp->sfas_fifo;
1127 
1128 			      memcpy(dev->sc_buf, dev->sc_bump_va, len-left);
1129 			    }
1130 			  } else {
1131 			    /* Count any unsent bytes and flush them. */
1132 			    left+= *rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK;
1133 			    *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
1134 			  }
1135 
1136 			  /*
1137 			   * Update pointers/length to reflect the transfered
1138 			   * data.
1139 			   */
1140 			  dev->sc_len -= len-left;
1141 			  dev->sc_buf += len-left;
1142 
1143 			  dev->sc_dma_buf = (char *)dev->sc_dma_buf + len-left;
1144 			  dev->sc_dma_len = left;
1145 
1146 			  dev->sc_dma_blk_ptr = (char *)dev->sc_dma_blk_ptr +
1147 				  len-left;
1148 			  dev->sc_dma_blk_len -= len-left;
1149 
1150 			  /*
1151 			   * If it was the end of a DMA block, we select the
1152 			   * next to begin with.
1153 			   */
1154 			  if (!dev->sc_dma_blk_len)
1155 			    dev->sc_cur_link++;
1156 			}
1157 		break;
1158 
1159 	case SFAS_NS_STATUS:
1160 		/*
1161 		 * If we were not sensing, grab the status byte. If we were
1162 		 * sensing and we got a bad status, let the user know.
1163 		 */
1164 
1165 		status = *rp->sfas_fifo;
1166 		msg = *rp->sfas_fifo;
1167 
1168 		nexus->status = status;
1169 		if (status != 0)
1170 			nexus->status = -1;
1171 
1172 		/*
1173 		 * Preload the command complete message. Handeled in
1174 		 * sfas_postaction.
1175 		 */
1176 		dev->sc_msg_in[0] = msg;
1177 		dev->sc_msg_in_len = 1;
1178 		nexus->flags |= SFAS_NF_HAS_MSG;
1179 		break;
1180 
1181 	default:
1182 		break;
1183 	}
1184 
1185 	return(0);
1186 }
1187 
1188 /*
1189  * Part three of the interrupt machine. Handle phase changes (and repeated
1190  * phase passes). We know that we have an active nexus here.
1191  */
1192 int
1193 sfas_postaction(struct sfas_softc *dev, sfas_regmap_p rp, struct nexus *nexus)
1194 {
1195 	int	i, len;
1196 	u_char	cmd;
1197 	short	offset, period;
1198 
1199 	cmd = 0;
1200 
1201 	switch(dev->sc_status & SFAS_STAT_PHASE_MASK) {
1202 	case SFAS_PHASE_DATA_OUT:
1203 	case SFAS_PHASE_DATA_IN:
1204 		if ((dev->sc_status & SFAS_STAT_PHASE_MASK) ==
1205 		    SFAS_PHASE_DATA_OUT)
1206 			nexus->state = SFAS_NS_DATA_OUT;
1207 		else
1208 			nexus->state = SFAS_NS_DATA_IN;
1209 
1210 		/* Make DMA ready to accept new data. Load active pointers
1211 		 * from the DMA block. */
1212 		dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR);
1213 		if (dev->sc_cur_link < dev->sc_max_link) {
1214 		  if (!dev->sc_dma_blk_len) {
1215 		    dev->sc_dma_blk_ptr = dev->sc_chain[dev->sc_cur_link].ptr;
1216 		    dev->sc_dma_blk_len = dev->sc_chain[dev->sc_cur_link].len;
1217 		    dev->sc_dma_blk_flg = dev->sc_chain[dev->sc_cur_link].flg;
1218 		  }
1219 
1220 		  /* We should use polled IO here. */
1221 		  if (dev->sc_dma_blk_flg == SFAS_CHAIN_PRG) {
1222 			dev->sc_ixfer(dev, nexus->xs->xs_control & XS_CTL_POLL);
1223 			dev->sc_cur_link++;
1224 			dev->sc_dma_len = 0;
1225 			break;
1226 		  }
1227 		  else if (dev->sc_dma_blk_flg == SFAS_CHAIN_BUMP)
1228 			len = dev->sc_dma_blk_len;
1229 		  else
1230 			len = dev->sc_need_bump(dev, dev->sc_dma_blk_ptr,
1231 						dev->sc_dma_blk_len);
1232 
1233 		  /*
1234 		   * If len != 0 we must bump the data, else we just DMA it
1235 		   * straight into memory.
1236 		   */
1237 		  if (len) {
1238 			dev->sc_dma_buf = dev->sc_bump_pa;
1239 			dev->sc_dma_len = len;
1240 
1241 			if (nexus->state == SFAS_NS_DATA_OUT)
1242 			  memcpy(dev->sc_bump_va, dev->sc_buf, dev->sc_dma_len);
1243 		  } else {
1244 			dev->sc_dma_buf = dev->sc_dma_blk_ptr;
1245 			dev->sc_dma_len = dev->sc_dma_blk_len;
1246 		  }
1247 
1248 		  /* Load DMA with address and length of transfer. */
1249 		  dev->sc_setup_dma(dev, dev->sc_dma_buf, dev->sc_dma_len,
1250 				    ((nexus->state == SFAS_NS_DATA_OUT) ?
1251 				     SFAS_DMA_WRITE : SFAS_DMA_READ));
1252 
1253 /*		  printf("Using DMA !!!!\n");*/
1254 		  cmd = SFAS_CMD_TRANSFER_INFO | SFAS_CMD_DMA;
1255 		} else {
1256 			/*
1257 			 * Hmmm, the unit wants more info than we have or has
1258 			 * more than we want. Let the chip handle that.
1259 			 */
1260 
1261 			*rp->sfas_tc_low = 0; /* was 256 but this does not make sense */
1262 			*rp->sfas_tc_mid = 1;
1263 			*rp->sfas_tc_high = 0;
1264 			cmd = SFAS_CMD_TRANSFER_PAD;
1265 		}
1266 		break;
1267 
1268 	case SFAS_PHASE_COMMAND:
1269 		/* The scsi unit wants the command, send it. */
1270 		nexus->state = SFAS_NS_SVC;
1271 
1272 		*rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
1273 		for(i=0; i<5; i++);
1274 
1275 		for(i=0; i<nexus->clen; i++)
1276 			*rp->sfas_fifo = nexus->cbuf[i];
1277 		cmd = SFAS_CMD_TRANSFER_INFO;
1278 		break;
1279 
1280 	case SFAS_PHASE_STATUS:
1281 		/*
1282 		 * We've got status phase. Request status and command
1283 		 * complete message.
1284 		 */
1285 		nexus->state = SFAS_NS_STATUS;
1286 		cmd = SFAS_CMD_COMMAND_COMPLETE;
1287 		break;
1288 
1289 	case SFAS_PHASE_MESSAGE_OUT:
1290 		/*
1291 		 * Either the scsi unit wants us to send a message or we have
1292 		 * asked for it by seting the ATN bit.
1293 		 */
1294 		nexus->state = SFAS_NS_MSG_OUT;
1295 
1296 		*rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
1297 
1298 		if (nexus->flags & SFAS_NF_DO_SDTR) {
1299 			/* Send a Synchronous Data Transfer Request. */
1300 
1301 			sfas_build_sdtrm(dev, nexus->period, nexus->offset);
1302 			nexus->flags |= SFAS_NF_SDTR_SENT;
1303 			nexus->flags &= ~SFAS_NF_DO_SDTR;
1304 		} else if (nexus->flags & SFAS_NF_RESET) {
1305 			/* Send a reset scsi unit message. */
1306 
1307 			dev->sc_msg_out[0] = 0x0C;
1308 			dev->sc_msg_out_len = 1;
1309 			nexus->state = SFAS_NS_RESET;
1310 			nexus->flags &= ~SFAS_NF_RESET;
1311 		} else if (dev->sc_msg_out_len == 0) {
1312 			/* Don't know what to send so we send a NOP message. */
1313 
1314 			dev->sc_msg_out[0] = 0x08;
1315 			dev->sc_msg_out_len = 1;
1316 		}
1317 
1318 		cmd = SFAS_CMD_TRANSFER_INFO;
1319 
1320 		for(i=0; i<dev->sc_msg_out_len; i++)
1321 			*rp->sfas_fifo = dev->sc_msg_out[i];
1322 		dev->sc_msg_out_len = 0;
1323 
1324 		break;
1325 
1326 	case SFAS_PHASE_MESSAGE_IN:
1327 		/* Receive a message from the scsi unit. */
1328 		nexus->state = SFAS_NS_MSG_IN;
1329 
1330 		while(!(nexus->flags & SFAS_NF_HAS_MSG)) {
1331 			*rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
1332 			sfasiwait(dev);
1333 
1334 			dev->sc_msg_in[dev->sc_msg_in_len++] = *rp->sfas_fifo;
1335 
1336 			/* Check if we got all the bytes in the message. */
1337 			if (dev->sc_msg_in[0] >= 0x80)       ;
1338 			else if (dev->sc_msg_in[0] >= 0x30)  ;
1339 			else if (((dev->sc_msg_in[0] >= 0x20) &&
1340 				  (dev->sc_msg_in_len == 2)) ||
1341 				 ((dev->sc_msg_in[0] != 0x01) &&
1342 				  (dev->sc_msg_in_len == 1))) {
1343 				nexus->flags |= SFAS_NF_HAS_MSG;
1344 				break;
1345 			} else {
1346 			  if (dev->sc_msg_in_len >= 2)
1347 			    if ((dev->sc_msg_in[1]+2) == dev->sc_msg_in_len) {
1348 				nexus->flags |= SFAS_NF_HAS_MSG;
1349 				break;
1350 			    }
1351 			}
1352 
1353 			*rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED;
1354 			sfasiwait(dev);
1355 
1356 			if ((dev->sc_status & SFAS_STAT_PHASE_MASK) !=
1357 			    SFAS_PHASE_MESSAGE_IN)
1358 				break;
1359 		}
1360 
1361 		cmd = SFAS_CMD_MESSAGE_ACCEPTED;
1362 		if (nexus->flags & SFAS_NF_HAS_MSG) {
1363 			/* We have a message. Decode it. */
1364 
1365 			switch(dev->sc_msg_in[0]) {
1366 			case 0x00:	/* COMMAND COMPLETE */
1367 				nexus->state = SFAS_NS_DONE;
1368 				break;
1369 			case 0x04:	/* DISCONNECT */
1370 				nexus->state = SFAS_NS_DISCONNECTING;
1371 				break;
1372 			case 0x02:	/* SAVE DATA POINTER */
1373 				sfas_save_pointers(dev);
1374 				break;
1375 			case 0x03:	/* RESTORE DATA POINTERS */
1376 				sfas_restore_pointers(dev);
1377 				break;
1378 			case 0x07:	/* MESSAGE REJECT */
1379 				/*
1380 				 * If we had sent a SDTR and we got a message
1381 				 * reject, the scsi docs say that we must go
1382 				 * to async transfer.
1383 				 */
1384 				if (nexus->flags & SFAS_NF_SDTR_SENT) {
1385 					nexus->flags &= ~SFAS_NF_SDTR_SENT;
1386 
1387 					nexus->config3 &= ~SFAS_CFG3_FASTSCSI;
1388 					nexus->syncper = 5;
1389 					nexus->syncoff = 0;
1390 
1391 					*rp->sfas_syncper = nexus->syncper;
1392 					*rp->sfas_syncoff = nexus->syncoff;
1393 					*rp->sfas_config3 = nexus->config3;
1394 				} else
1395 				/*
1396 				 * Something was rejected but we don't know
1397 				 * what! PANIC!
1398 				 */
1399 				  panic("sfasintr: Unknown message rejected!");
1400 				break;
1401 			case 0x08:	/* MO OPERATION */
1402 				break;
1403 			case 0x01:	/* EXTENDED MESSAGE */
1404 				switch(dev->sc_msg_in[2]) {
1405 				case 0x01:/* SYNC. DATA TRANSFER REQUEST */
1406 					/* Decode the SDTR message. */
1407 					period = 4*dev->sc_msg_in[3];
1408 					offset = dev->sc_msg_in[4];
1409 
1410 					/*
1411 					 * Make sure that the specs are within
1412 					 * chip limits. Note that if we
1413 					 * initiated the negotiation the specs
1414 					 * WILL be withing chip limits. If it
1415 					 * was the scsi unit that initiated
1416 					 * the negotiation, the specs may be
1417 					 * to high.
1418 					 */
1419 					if (offset > 16)
1420 						offset = 16;
1421 					if ((period < 200) &&
1422 					    (dev->sc_clock_freq <= 25))
1423 						period = 200;
1424 
1425 					if (offset == 0)
1426 					       period = 5*dev->sc_clock_period;
1427 
1428 					nexus->syncper = period/
1429 							  dev->sc_clock_period;
1430 					nexus->syncoff = offset;
1431 
1432 					if (period < 200)
1433 					  nexus->config3 |= SFAS_CFG3_FASTSCSI;
1434 					else
1435 					  nexus->config3 &=~SFAS_CFG3_FASTSCSI;
1436 
1437 					nexus->flags |= SFAS_NF_SYNC_TESTED;
1438 
1439 					*rp->sfas_syncper = nexus->syncper;
1440 					*rp->sfas_syncoff = nexus->syncoff;
1441 					*rp->sfas_config3 = nexus->config3;
1442 
1443 					/*
1444 					 * Hmmm, it seems that the scsi unit
1445 					 * initiated sync negotiation, so lets
1446 					 * reply acording to scsi-2 standard.
1447 					 */
1448 					if (!(nexus->flags& SFAS_NF_SDTR_SENT))
1449 					{
1450 					  if ((dev->sc_config_flags &
1451 					       SFAS_NO_SYNCH) ||
1452 					      (dev->sc_config_flags &
1453 					       SFAS_NO_DMA) ||
1454 					      sfas_inhibit_sync[
1455 							nexus->lun_unit & 7]) {
1456 					          period = 200;
1457 					          offset = 0;
1458 					  }
1459 
1460 					  nexus->offset = offset;
1461 					  nexus->period = period;
1462 					  nexus->flags |= SFAS_NF_DO_SDTR;
1463 					  *rp->sfas_command = SFAS_CMD_SET_ATN;
1464 					}
1465 
1466 					nexus->flags &= ~SFAS_NF_SDTR_SENT;
1467 					break;
1468 
1469 				case 0x00: /* MODIFY DATA POINTERS */
1470 				case 0x02: /* EXTENDED IDENTIFY (SCSI-1) */
1471 				case 0x03: /* WIDE DATA TRANSFER REQUEST */
1472 			        default:
1473 					/* Reject any unhandeled messages. */
1474 
1475 					dev->sc_msg_out[0] = 0x07;
1476 					dev->sc_msg_out_len = 1;
1477 					*rp->sfas_command = SFAS_CMD_SET_ATN;
1478 					cmd = SFAS_CMD_MESSAGE_ACCEPTED;
1479 					break;
1480 				}
1481 				break;
1482 
1483 			default:
1484 				/* Reject any unhandeled messages. */
1485 
1486 				dev->sc_msg_out[0] = 0x07;
1487 				dev->sc_msg_out_len = 1;
1488 				*rp->sfas_command = SFAS_CMD_SET_ATN;
1489 				cmd = SFAS_CMD_MESSAGE_ACCEPTED;
1490 				break;
1491 			}
1492 			nexus->flags &= ~SFAS_NF_HAS_MSG;
1493 			dev->sc_msg_in_len = 0;
1494 		}
1495 		break;
1496 	default:
1497 		printf("SFASINTR: UNKNOWN PHASE! phase: %d\n",
1498 		       dev->sc_status & SFAS_STAT_PHASE_MASK);
1499 		dev->sc_led(dev, 0);
1500 		sfas_scsidone(dev, nexus->xs, -4);
1501 
1502 		return(-1);
1503 	}
1504 
1505 	if (cmd)
1506 		*rp->sfas_command = cmd;
1507 
1508 	return(0);
1509 }
1510 
1511 /*
1512  * Stub for interrupt machine.
1513  */
1514 void
1515 sfasintr(struct sfas_softc *dev)
1516 {
1517 	sfas_regmap_p	 rp;
1518 	struct nexus	*nexus;
1519 
1520 	rp = dev->sc_fas;
1521 
1522 	if (!sfas_pretests(dev, rp)) {
1523 
1524 		nexus = dev->sc_cur_nexus;
1525 		if (nexus == NULL)
1526 			nexus = dev->sc_sel_nexus;
1527 
1528 		if (nexus)
1529 			if (!sfas_midaction(dev, rp, nexus))
1530 				sfas_postaction(dev, rp, nexus);
1531 	}
1532 }
1533 
1534 /*
1535  * sfasicmd is used to perform IO when we can't use interrupts. sfasicmd
1536  * emulates the normal environment by waiting for the chip and calling
1537  * sfasintr.
1538  */
1539 void
1540 sfasicmd(struct sfas_softc *dev, struct sfas_pending *pendp)
1541 {
1542 	struct nexus	*nexus;
1543 
1544 	nexus = &dev->sc_nexus[pendp->xs->xs_periph->periph_target];
1545 
1546 	if (!sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen,
1547 			(char *)pendp->xs->data, pendp->xs->datalen,
1548 			SFAS_SELECT_I))
1549 		panic("sfasicmd: Couldn't select unit");
1550 
1551 	while(nexus->state != SFAS_NS_FINISHED) {
1552 		sfasiwait(dev);
1553 		sfasintr(dev);
1554 	}
1555 
1556 	nexus->flags &= ~SFAS_NF_SYNC_TESTED;
1557 }
1558 
1559 
1560 #ifdef SFAS_DEBUG
1561 
1562 void
1563 dump_nexus(struct nexus *nexus)
1564 {
1565 	int loop;
1566 
1567 	printf("nexus=%08x\n", (u_int)nexus);
1568 	printf("scsi_fer=%08x\n", (u_int)nexus->xs);
1569 	printf("ID=%02x\n", nexus->ID);
1570 	printf("clen=%02x\n", nexus->clen);
1571 	printf("cbuf=");
1572 	for (loop = 0; loop< 14; ++loop)
1573 		printf(" %02x\n", nexus->cbuf[loop]);
1574 	printf("\n");
1575 	printf("DMA:\n");
1576 	for (loop = 0; loop < MAXCHAIN; ++loop)
1577 		printf("dma_chain: %08x %04x %04x\n", nexus->dma[loop].ptr,
1578 		    nexus->dma[loop].len, nexus->dma[loop].flg);
1579 	printf("\n");
1580 
1581 	printf("max_link=%d\n", nexus->max_link);
1582 	printf("cur_link=%d\n", nexus->cur_link);
1583 
1584 	printf("buf=%08x\n", (u_int)nexus->buf);
1585 	printf("len=%08x\n", nexus->len);
1586 	printf("dma_buf=%08x\n", (u_int)nexus->dma_buf);
1587 	printf("dma_len=%08x\n", nexus->dma_len);
1588 	printf("dma_blk_ptr=%08x\n", (u_int)nexus->dma_blk_ptr);
1589 	printf("dma_blk_len=%08x\n", nexus->dma_blk_len);
1590 	printf("dma_blk_flag=%08x\n", nexus->dma_blk_flg);
1591 	printf("state=%02x\n", nexus->state);
1592 	printf("flags=%04x\n", nexus->flags);
1593 	printf("period=%d\n", nexus->period);
1594 	printf("offset=%d\n", nexus->offset);
1595 	printf("syncper=%d\n", nexus->syncper);
1596 	printf("syncoff=%d\n", nexus->syncoff);
1597 	printf("config3=%02x\n", nexus->config3);
1598 	printf("lun_unit=%d\n", nexus->lun_unit);
1599 	printf("status=%02x\n", nexus->status);
1600 	printf("\n");
1601 }
1602 
1603 void
1604 dump_nexii(struct sfas_softc *sc)
1605 {
1606 	int loop;
1607 
1608 	for (loop = 0; loop < 8; ++loop) {
1609 		dump_nexus(&sc->sc_nexus[loop]);
1610 	}
1611 }
1612 
1613 void
1614 dump_sfassoftc(struct sfas_softc *sc)
1615 {
1616 	printf("sfassoftc @ 0x%08x\n", (u_int)sc);
1617 	printf("clock_freq = %d\n", sc->sc_clock_freq);
1618 	printf("timeout = %d\n", sc->sc_timeout);
1619 	printf("host_id = %d\n", sc->sc_host_id);
1620 	printf("config_flags = 0x%08x\n", sc->sc_config_flags);
1621 	printf("led_status = %d\n", sc->sc_led_status);
1622 
1623 	dump_nexii(sc);
1624 	printf("cur_nexus = 0x%08x\n", (u_int)sc->sc_cur_nexus);
1625 	printf("sel_nexus = 0x%08x\n", (u_int)sc->sc_sel_nexus);
1626 	printf("\n");
1627 }
1628 
1629 #endif	/* SFAS_DEBUG */
1630