1*d7cdbe27Sthorpej /* $NetBSD: rapide.c,v 1.33 2023/12/20 06:13:59 thorpej Exp $ */
27d4a1addSreinoud
37d4a1addSreinoud /*
47d4a1addSreinoud * Copyright (c) 1997-1998 Mark Brinicombe
57d4a1addSreinoud * Copyright (c) 1997-1998 Causality Limited
67d4a1addSreinoud *
77d4a1addSreinoud * Redistribution and use in source and binary forms, with or without
87d4a1addSreinoud * modification, are permitted provided that the following conditions
97d4a1addSreinoud * are met:
107d4a1addSreinoud * 1. Redistributions of source code must retain the above copyright
117d4a1addSreinoud * notice, this list of conditions and the following disclaimer.
127d4a1addSreinoud * 2. Redistributions in binary form must reproduce the above copyright
137d4a1addSreinoud * notice, this list of conditions and the following disclaimer in the
147d4a1addSreinoud * documentation and/or other materials provided with the distribution.
157d4a1addSreinoud * 3. All advertising materials mentioning features or use of this software
167d4a1addSreinoud * must display the following acknowledgement:
177d4a1addSreinoud * This product includes software developed by Mark Brinicombe
187d4a1addSreinoud * for the NetBSD Project.
197d4a1addSreinoud * 4. The name of the author may not be used to endorse or promote products
207d4a1addSreinoud * derived from this software without specific prior written permission.
217d4a1addSreinoud *
227d4a1addSreinoud * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
237d4a1addSreinoud * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
247d4a1addSreinoud * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
257d4a1addSreinoud * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
267d4a1addSreinoud * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
277d4a1addSreinoud * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
287d4a1addSreinoud * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
297d4a1addSreinoud * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
307d4a1addSreinoud * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
317d4a1addSreinoud * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
327d4a1addSreinoud *
337d4a1addSreinoud * Card driver and probe and attach functions to use generic IDE driver
347d4a1addSreinoud * for the RapIDE podule
357d4a1addSreinoud */
367d4a1addSreinoud
377d4a1addSreinoud /*
387d4a1addSreinoud * Thanks to Chris Honey at Raymond Datalink for providing information on
397d4a1addSreinoud * addressing the RapIDE podule.
407d4a1addSreinoud * RapIDE32 is Copyright (C) 1995,1996 Raymond Datalink. RapIDE32 is
417d4a1addSreinoud * manufactured under license by Yellowstone Educational Solutions.
427d4a1addSreinoud */
437d4a1addSreinoud
447d4a1addSreinoud /*
457d4a1addSreinoud * At present this driver only supports the Issue 2 RapIDE podule.
467d4a1addSreinoud */
477d4a1addSreinoud
487d4a1addSreinoud /*
497d4a1addSreinoud * A small amount of work is required for Issue 1 podule support.
507d4a1addSreinoud * The primary differences are the register addresses.
517d4a1addSreinoud * Things are eased by the fact that we can identify the card by register
527d4a1addSreinoud * the same register on both issues of the podule.
537d4a1addSreinoud * Once we kmnow the issue we must change all our addresses accordingly.
547d4a1addSreinoud * All the control registers are mapped the same between cards.
557d4a1addSreinoud * The interrupt handler needs to take note that the issue 1 card needs
567d4a1addSreinoud * the interrupt to be cleared via the interrupt clear register.
577d4a1addSreinoud * This means we share addresses for the mapping of the control block and
587d4a1addSreinoud * thus the card driver does not need to know about the differences.
597d4a1addSreinoud * The differences show up a the controller level.
607d4a1addSreinoud * A structure is used to hold the information about the addressing etc.
617d4a1addSreinoud * An array of these structures holds the information for the primary and
627d4a1addSreinoud * secondary connectors. This needs to be extended to hold this information
634c5a18c4Sperry * for both issues. Then the indexing of these structures will use the
647d4a1addSreinoud * card version number.
657d4a1addSreinoud *
667d4a1addSreinoud * Opps just noticed a mistake. The interrupt request register is different
677d4a1addSreinoud * between cards so the card level attach routine will need to consider this.
687d4a1addSreinoud */
697d4a1addSreinoud
701b7326b5Slukem #include <sys/cdefs.h>
71*d7cdbe27Sthorpej __KERNEL_RCSID(0, "$NetBSD: rapide.c,v 1.33 2023/12/20 06:13:59 thorpej Exp $");
721b7326b5Slukem
737d4a1addSreinoud #include <sys/param.h>
747d4a1addSreinoud #include <sys/systm.h>
757d4a1addSreinoud #include <sys/conf.h>
767d4a1addSreinoud #include <sys/device.h>
77d368bbb8Sdyoung #include <sys/bus.h>
787d4a1addSreinoud
79ce1401feSthorpej #include <machine/intr.h>
807d4a1addSreinoud #include <machine/io.h>
817d4a1addSreinoud #include <machine/bootconfig.h>
827d4a1addSreinoud #include <arm/iomd/iomdreg.h>
837d4a1addSreinoud #include <arm/iomd/iomdvar.h>
847d4a1addSreinoud #include <acorn32/podulebus/podulebus.h>
857d4a1addSreinoud #include <acorn32/podulebus/rapidereg.h>
867d4a1addSreinoud
877d4a1addSreinoud #include <dev/ata/atavar.h>
88870dad0fSbjh21 #include <dev/ic/wdcreg.h>
897d4a1addSreinoud #include <dev/ic/wdcvar.h>
907d4a1addSreinoud #include <dev/podulebus/podules.h>
917d4a1addSreinoud
927d4a1addSreinoud
937d4a1addSreinoud /*
947d4a1addSreinoud * RapIDE podule device.
957d4a1addSreinoud *
967d4a1addSreinoud * This probes and attaches the top level RapIDE device to the podulebus.
977d4a1addSreinoud * It then configures any children of the RapIDE device.
987d4a1addSreinoud * The attach args specify whether it is configuring the primary or
997d4a1addSreinoud * secondary channel.
1007d4a1addSreinoud * The children are expected to be wdc devices using rapide attachments.
1017d4a1addSreinoud */
1027d4a1addSreinoud
1037d4a1addSreinoud /*
1047d4a1addSreinoud * RapIDE card softc structure.
1057d4a1addSreinoud *
1067d4a1addSreinoud * Contains the device node, podule information and global information
1077d4a1addSreinoud * required by the driver such as the card version and the interrupt mask.
1087d4a1addSreinoud */
1097d4a1addSreinoud
1107d4a1addSreinoud struct rapide_softc {
1117d4a1addSreinoud struct wdc_softc sc_wdcdev; /* common wdc definitions */
1124b51cecfSthorpej struct ata_channel *sc_chanarray[2]; /* channels definition */
1137d4a1addSreinoud podule_t *sc_podule; /* Our podule info */
1147d4a1addSreinoud int sc_podule_number; /* Our podule number */
1157d4a1addSreinoud int sc_intr_enable_mask; /* Global intr mask */
1167d4a1addSreinoud int sc_version; /* Card version */
1177d4a1addSreinoud bus_space_tag_t sc_ctliot; /* Bus tag */
1187d4a1addSreinoud bus_space_handle_t sc_ctlioh; /* control handler */
1197d4a1addSreinoud struct rapide_channel {
1204b51cecfSthorpej struct ata_channel rc_channel; /* generic part */
1217d4a1addSreinoud irqhandler_t rc_ih; /* interrupt handler */
1227d4a1addSreinoud int rc_irqmask; /* IRQ mask for this channel */
1237d4a1addSreinoud } rapide_channels[2];
1244b51cecfSthorpej struct wdc_regs sc_wdc_regs[2];
1257d4a1addSreinoud };
1267d4a1addSreinoud
1277aa6248cScube int rapide_probe (device_t, struct cfdata *, void *);
1287aa6248cScube void rapide_attach (device_t, device_t, void *);
1297aa6248cScube void rapide_shutdown (void *arg);
1307aa6248cScube int rapide_intr (void *);
1317d4a1addSreinoud
1327aa6248cScube CFATTACH_DECL_NEW(rapide, sizeof(struct rapide_softc),
1335a9ddc14Sthorpej rapide_probe, rapide_attach, NULL, NULL);
1347d4a1addSreinoud
1357d4a1addSreinoud /*
1367d4a1addSreinoud * We have a private bus space tag.
1377d4a1addSreinoud * This is created by copying the podulebus tag and then replacing
1387d4a1addSreinoud * a couple of the transfer functions.
1397d4a1addSreinoud */
1407d4a1addSreinoud
1417d4a1addSreinoud static struct bus_space rapide_bs_tag;
1427d4a1addSreinoud
1437d4a1addSreinoud bs_rm_4_proto(rapide);
1447d4a1addSreinoud bs_wm_4_proto(rapide);
1457d4a1addSreinoud
1467d4a1addSreinoud /*
1477d4a1addSreinoud * Create an array of address structures. These define the addresses and
1487d4a1addSreinoud * masks needed for the different channels for the card.
1497d4a1addSreinoud *
1507d4a1addSreinoud * XXX - Needs some work for issue 1 cards.
1517d4a1addSreinoud */
1527d4a1addSreinoud
1537d4a1addSreinoud struct {
1547d4a1addSreinoud u_int registers;
1557d4a1addSreinoud u_int aux_register;
1567d4a1addSreinoud u_int data_register;
1577d4a1addSreinoud u_int irq_mask;
1587d4a1addSreinoud } rapide_info[] = {
1597d4a1addSreinoud { PRIMARY_DRIVE_REGISTERS_OFFSET, PRIMARY_AUX_REGISTER_OFFSET,
1607d4a1addSreinoud PRIMARY_DATA_REGISTER_OFFSET, PRIMARY_IRQ_MASK },
1617d4a1addSreinoud { SECONDARY_DRIVE_REGISTERS_OFFSET, SECONDARY_AUX_REGISTER_OFFSET,
1627d4a1addSreinoud SECONDARY_DATA_REGISTER_OFFSET, SECONDARY_IRQ_MASK }
1637d4a1addSreinoud };
1647d4a1addSreinoud
1657d4a1addSreinoud
1667d4a1addSreinoud /*
1677d4a1addSreinoud * Card probe function
1687d4a1addSreinoud *
1697d4a1addSreinoud * Just match the manufacturer and podule ID's
1707d4a1addSreinoud */
1717d4a1addSreinoud
1727d4a1addSreinoud int
rapide_probe(device_t parent,cfdata_t cf,void * aux)1737aa6248cScube rapide_probe(device_t parent, cfdata_t cf, void *aux)
1747d4a1addSreinoud {
1757d4a1addSreinoud struct podule_attach_args *pa = (void *)aux;
1767d4a1addSreinoud
17720518673Sbjh21 return (pa->pa_product == PODULE_RAPIDE);
1787d4a1addSreinoud }
1797d4a1addSreinoud
1807d4a1addSreinoud /*
1817d4a1addSreinoud * Card attach function
1827d4a1addSreinoud *
1837d4a1addSreinoud * Identify the card version and configure any children.
1847d4a1addSreinoud * Install a shutdown handler to kill interrupts on shutdown
1857d4a1addSreinoud */
1867d4a1addSreinoud
1877d4a1addSreinoud void
rapide_attach(device_t parent,device_t self,void * aux)1887aa6248cScube rapide_attach(device_t parent, device_t self, void *aux)
1897d4a1addSreinoud {
1907aa6248cScube struct rapide_softc *sc = device_private(self);
1917d4a1addSreinoud struct podule_attach_args *pa = (void *)aux;
1927d4a1addSreinoud bus_space_tag_t iot;
1937d4a1addSreinoud bus_space_handle_t ctlioh;
1947d4a1addSreinoud u_int iobase;
195870dad0fSbjh21 int channel, i;
1967d4a1addSreinoud struct rapide_channel *rcp;
1974b51cecfSthorpej struct ata_channel *cp;
1984b51cecfSthorpej struct wdc_regs *wdr;
1997d4a1addSreinoud irqhandler_t *ihp;
2007d4a1addSreinoud
2017d4a1addSreinoud /* Note the podule number and validate */
2027d4a1addSreinoud if (pa->pa_podule_number == -1)
2037d4a1addSreinoud panic("Podule has disappeared !");
2047d4a1addSreinoud
2057aa6248cScube sc->sc_wdcdev.sc_atac.atac_dev = self;
2067d4a1addSreinoud sc->sc_podule_number = pa->pa_podule_number;
2077d4a1addSreinoud sc->sc_podule = pa->pa_podule;
2087d4a1addSreinoud podules[sc->sc_podule_number].attached = 1;
2097d4a1addSreinoud
2104b51cecfSthorpej sc->sc_wdcdev.regs = sc->sc_wdc_regs;
2114b51cecfSthorpej
2127d4a1addSreinoud set_easi_cycle_type(sc->sc_podule_number, EASI_CYCLE_TYPE_C);
2137d4a1addSreinoud
2147d4a1addSreinoud /*
2157d4a1addSreinoud * Duplicate the podule bus space tag and provide alternative
2167d4a1addSreinoud * bus_space_read_multi_4() and bus_space_write_multi_4()
2177d4a1addSreinoud * functions.
2187d4a1addSreinoud */
2197d4a1addSreinoud rapide_bs_tag = *pa->pa_iot;
2207d4a1addSreinoud rapide_bs_tag.bs_rm_4 = rapide_bs_rm_4;
2217d4a1addSreinoud rapide_bs_tag.bs_wm_4 = rapide_bs_wm_4;
2227d4a1addSreinoud sc->sc_ctliot = iot = &rapide_bs_tag;
2237d4a1addSreinoud
2247d4a1addSreinoud if (bus_space_map(iot, pa->pa_podule->easi_base +
2257d4a1addSreinoud CONTROL_REGISTERS_OFFSET, CONTROL_REGISTER_SPACE, 0, &ctlioh))
2267aa6248cScube panic("%s: Cannot map control registers", device_xname(self));
2277d4a1addSreinoud
2287d4a1addSreinoud sc->sc_ctlioh = ctlioh;
2297d4a1addSreinoud sc->sc_version = bus_space_read_1(iot, ctlioh, VERSION_REGISTER_OFFSET) & VERSION_REGISTER_MASK;
2307d4a1addSreinoud /* bus_space_unmap(iot, ctl_ioh, CONTROL_REGISTER_SPACE);*/
2317d4a1addSreinoud
2327aa6248cScube aprint_normal(": Issue %d\n", sc->sc_version + 1);
2337d4a1addSreinoud if (sc->sc_version != VERSION_2_ID)
2347d4a1addSreinoud return;
2357d4a1addSreinoud
2367d4a1addSreinoud if (shutdownhook_establish(rapide_shutdown, (void *)sc) == NULL)
2377aa6248cScube panic("%s: Cannot install shutdown handler", device_xname(self));
2387d4a1addSreinoud
2397d4a1addSreinoud /* Set the interrupt info for this podule */
2407d4a1addSreinoud sc->sc_podule->irq_addr = pa->pa_podule->easi_base
2417d4a1addSreinoud + CONTROL_REGISTERS_OFFSET + IRQ_REQUEST_REGISTER_BYTE_OFFSET;
2427d4a1addSreinoud sc->sc_podule->irq_mask = IRQ_MASK;
2437d4a1addSreinoud
2447d4a1addSreinoud iobase = pa->pa_podule->easi_base;
2457d4a1addSreinoud
2467d4a1addSreinoud /* Fill in wdc and channel infos */
2479cc521a1Sthorpej sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32;
2489cc521a1Sthorpej sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
2499cc521a1Sthorpej sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanarray;
2509cc521a1Sthorpej sc->sc_wdcdev.sc_atac.atac_nchannels = 2;
2519edd4d81Sbouyer sc->sc_wdcdev.wdc_maxdrives = 2;
2527d4a1addSreinoud for (channel = 0 ; channel < 2; channel++) {
2537d4a1addSreinoud rcp = &sc->rapide_channels[channel];
2544b51cecfSthorpej sc->sc_chanarray[channel] = &rcp->rc_channel;
2554b51cecfSthorpej cp = &rcp->rc_channel;
2564b51cecfSthorpej wdr = &sc->sc_wdc_regs[channel];
2577d4a1addSreinoud
258a963286fSthorpej cp->ch_channel = channel;
2599cc521a1Sthorpej cp->ch_atac = &sc->sc_wdcdev.sc_atac;
2604b51cecfSthorpej wdr->cmd_iot = iot;
2614b51cecfSthorpej wdr->ctl_iot = iot;
2624b51cecfSthorpej wdr->data32iot = iot;
2637d4a1addSreinoud
2647d4a1addSreinoud if (bus_space_map(iot, iobase + rapide_info[channel].registers,
2654b51cecfSthorpej DRIVE_REGISTERS_SPACE, 0, &wdr->cmd_baseioh))
2667d4a1addSreinoud continue;
267d6e10578Sbjh21 for (i = 0; i < WDC_NREG; i++) {
2684b51cecfSthorpej if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
2694b51cecfSthorpej i, i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) {
2704b51cecfSthorpej bus_space_unmap(iot, wdr->cmd_baseioh,
271870dad0fSbjh21 DRIVE_REGISTERS_SPACE);
272870dad0fSbjh21 continue;
273870dad0fSbjh21 }
274870dad0fSbjh21 }
27526cf6855Sjdolecek wdc_init_shadow_regs(wdr);
2767d4a1addSreinoud if (bus_space_map(iot, iobase +
2774b51cecfSthorpej rapide_info[channel].aux_register, 4, 0, &wdr->ctl_ioh)) {
2784b51cecfSthorpej bus_space_unmap(iot, wdr->cmd_baseioh,
2797d4a1addSreinoud DRIVE_REGISTERS_SPACE);
2807d4a1addSreinoud continue;
2817d4a1addSreinoud }
2827d4a1addSreinoud if (bus_space_map(iot, iobase +
2834b51cecfSthorpej rapide_info[channel].data_register, 4, 0, &wdr->data32ioh)) {
2844b51cecfSthorpej bus_space_unmap(iot, wdr->cmd_baseioh,
2857d4a1addSreinoud DRIVE_REGISTERS_SPACE);
2864b51cecfSthorpej bus_space_unmap(iot, wdr->ctl_ioh, 4);
2877d4a1addSreinoud continue;
2887d4a1addSreinoud }
2897d4a1addSreinoud /* Disable interrupts and clear any pending interrupts */
2907d4a1addSreinoud rcp->rc_irqmask = rapide_info[channel].irq_mask;
2917d4a1addSreinoud sc->sc_intr_enable_mask &= ~rcp->rc_irqmask;
2927d4a1addSreinoud bus_space_write_1(iot, sc->sc_ctlioh, IRQ_MASK_REGISTER_OFFSET,
2937d4a1addSreinoud sc->sc_intr_enable_mask);
2947d4a1addSreinoud /* XXX - Issue 1 cards will need to clear any pending interrupts */
2957d4a1addSreinoud ihp = &rcp->rc_ih;
2967d4a1addSreinoud ihp->ih_func = rapide_intr;
2977d4a1addSreinoud ihp->ih_arg = rcp;
2987d4a1addSreinoud ihp->ih_level = IPL_BIO;
2997d4a1addSreinoud ihp->ih_name = "rapide";
3007d4a1addSreinoud ihp->ih_maskaddr = pa->pa_podule->irq_addr;
3017d4a1addSreinoud ihp->ih_maskbits = rcp->rc_irqmask;
3027d4a1addSreinoud if (irq_claim(sc->sc_podule->interrupt, ihp))
3030f09ed48Sprovos panic("%s: Cannot claim interrupt %d",
3047aa6248cScube device_xname(self), sc->sc_podule->interrupt);
3057d4a1addSreinoud /* clear any pending interrupts and enable interrupts */
3067d4a1addSreinoud sc->sc_intr_enable_mask |= rcp->rc_irqmask;
3077d4a1addSreinoud bus_space_write_1(iot, sc->sc_ctlioh,
3087d4a1addSreinoud IRQ_MASK_REGISTER_OFFSET, sc->sc_intr_enable_mask);
3097d4a1addSreinoud /* XXX - Issue 1 cards will need to clear any pending interrupts */
310536bcfc8She wdcattach(cp);
3117d4a1addSreinoud }
3127d4a1addSreinoud }
3137d4a1addSreinoud
3147d4a1addSreinoud /*
3157d4a1addSreinoud * Card shutdown function
3167d4a1addSreinoud *
3177d4a1addSreinoud * Called via do_shutdown_hooks() during kernel shutdown.
3187d4a1addSreinoud * Clear the cards's interrupt mask to stop any podule interrupts.
3197d4a1addSreinoud */
3207d4a1addSreinoud
3217d4a1addSreinoud void
rapide_shutdown(void * arg)3227aa6248cScube rapide_shutdown(void *arg)
3237d4a1addSreinoud {
3247d4a1addSreinoud struct rapide_softc *sc = arg;
3257d4a1addSreinoud
3267d4a1addSreinoud /* Disable card interrupts */
3277d4a1addSreinoud bus_space_write_1(sc->sc_ctliot, sc->sc_ctlioh,
3287d4a1addSreinoud IRQ_MASK_REGISTER_OFFSET, 0);
3297d4a1addSreinoud }
3307d4a1addSreinoud
3317d4a1addSreinoud /*
3327d4a1addSreinoud * Podule interrupt handler
3337d4a1addSreinoud *
3347d4a1addSreinoud * If the interrupt was from our card pass it on to the wdc interrupt handler
3357d4a1addSreinoud */
3367d4a1addSreinoud
3377d4a1addSreinoud int
rapide_intr(void * arg)3387aa6248cScube rapide_intr(void *arg)
3397d4a1addSreinoud {
3407d4a1addSreinoud struct rapide_channel *rcp = arg;
3417d4a1addSreinoud irqhandler_t *ihp = &rcp->rc_ih;
3427d4a1addSreinoud volatile u_char *intraddr = (volatile u_char *)ihp->ih_maskaddr;
3437d4a1addSreinoud
3447d4a1addSreinoud /* XXX - Issue 1 cards will need to clear the interrupt */
3457d4a1addSreinoud
3467d4a1addSreinoud /* XXX - not bus space yet - should really be handled by podulebus */
3477d4a1addSreinoud if ((*intraddr) & ihp->ih_maskbits)
3484b51cecfSthorpej wdcintr(&rcp->rc_channel);
3497d4a1addSreinoud
3507d4a1addSreinoud return(0);
3517d4a1addSreinoud }
352