1.\" $NetBSD: pci_configure_bus.9,v 1.3 2001/12/26 01:02:01 wiz Exp $ 2.\" 3.\" Copyright 2001 Wasabi Systems, Inc. 4.\" All rights reserved. 5.\" 6.\" Written by Allen Briggs for Wasabi Systems, Inc. 7.\" 8.\" Redistribution and use in source and binary forms, with or without 9.\" modification, are permitted provided that the following conditions 10.\" are met: 11.\" 1. Redistributions of source code must retain the above copyright 12.\" notice, this list of conditions and the following disclaimer. 13.\" 2. Redistributions in binary form must reproduce the above copyright 14.\" notice, this list of conditions and the following disclaimer in the 15.\" documentation and/or other materials provided with the distribution. 16.\" 3. All advertising materials mentioning features or use of this software 17.\" must display the following acknowledgement: 18.\" This product includes software developed for the NetBSD Project by 19.\" Wasabi Systems, Inc. 20.\" 4. The name of Wasabi Systems, Inc. may not be used to endorse 21.\" or promote products derived from this software without specific prior 22.\" written permission. 23.\" 24.\" THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 25.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 28.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34.\" POSSIBILITY OF SUCH DAMAGE. 35.\" 36.Dd February 9, 2001 37.Dt PCI_CONFIGURE_BUS 9 38.Os 39.Sh NAME 40.Nm pci_configure_bus 41.Nm pci_conf_interrupt 42.Nd perform PCI bus configuration 43.Sh SYNOPSIS 44.Fd #include <dev/pci/pciconf.h> 45.Ft int 46.Fo pci_configure_bus 47.Fa "pci_chipset_tag_t pc" 48.Fa "struct extent *ioext" 49.Fa "struct extent *memext" 50.Fa "struct extent *pmemext" 51.Fc 52.Sh DESCRIPTION 53The 54.Fn pci_configure_bus 55function configures a PCI bus for use. This involves: 56.Bl -bullet 57.It 58Defining bus numbers for all busses on the system, 59.It 60Setting the Base Address Registers for all devices, 61.It 62Setting up the interrupt line register for all devices, and 63.It 64Configuring bus latency timers for all devices. 65.El 66.Pp 67In traditional PCs and Alpha systems, the BIOS or firmware takes care 68of this task, but that is not the case for all systems. 69.Fn pci_configure_bus 70should be called prior to the auto-configuration of the bus. 71.Pp 72The 73.Fa pc 74argument is a machine-dependent tag used to specify the PCI chipset to the 75system. This should be the same value used with 76.Fn pci_make_tag . 77The extent arguments 78define memory extents from which the address space for the cards will be 79taken. These addresses should be in the PCI address space. The 80.Fa ioext 81extent is for PCI I/O accesses. The 82.Fa memext 83extent is for PCI memory accesses that might have side effects. I.e., 84that can not be cached. The 85.Fa pmemext 86extent is for PCI memory accesses that can be cached. The 87.Fa pmemext 88extent will be used for any ROMs and any memory regions that are marked as 89.Dq prefetchable 90in their BAR. If an implementation does not distinguish between 91prefetchable and non-prefetchable memory, it may pass NULL for 92.Fa pmemext . 93In this case, prefetchable memory allocations will be made from the 94non-prefetchable region. 95.Pp 96One of the functions of 97.Fn pci_configure_bus 98is to configure interrupt 99.Dq line 100information. This must be done on a machine-dependent basis, so a 101machine-dependent function 102.Fn pci_conf_interrupt 103must be defined. The prototype for this function is 104.Pp 105.Fn "void pci_conf_interrupt" "pci_chipset_tag_t pc" "int bus" \ 106 "int device" "int function" "int swiz" "int *iline" 107.Pp 108In this function, 109.Fa bus , 110.Fa device , 111and 112.Fa function , 113uniquely identify the item being configured. The 114.Fa swiz 115argument is a 116.Dq swizzle , 117a sum of the device numbers of the primary interface of the bridges between 118the host bridge and the current device. The function is responsible for 119setting the value of 120.Fa iline . 121See chapter 9 of the 122.Dq PCI-to-PCI Bridge Architecture Specification 123for more information on swizzling (also known as interrupt routing). 124.Sh RETURN VALUES 125If successful 126.Fn pci_configure_bus 127returns 0. A non-zero return value means that the bus was not completely 128configured for some reason. A description of the failure will be displayed 129on the console. 130.Sh ENVIRONMENT 131The 132.Fn pci_configure_bus 133function is only included in the kernel if the kernel is compiled with 134the 135.Dv PCI_NETBSD_CONFIGURE 136option enabled. 137.Sh EXAMPLES 138The 139.Fn pci_conf_interrupt 140function in the sandpoint implementation looks like: 141.Pp 142.Bd -literal -compact 143void 144pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int func, 145 int swiz, int *iline) 146{ 147 if (bus == 0) { 148 *iline = dev; 149 } else { 150 *iline = 13 + ((swiz + dev + 3) & 3); 151 } 152} 153.Ed 154.Pp 155The BeBox has nearly 1GB of PCI I/O memory starting at processor address 1560x81000000 (PCI I/O address 0x01000000), and nearly 1GB of PCI memory 157starting at 0xC0000000 (PCI memory address 0x00000000). 158The 159.Fn pci_configure_bus 160function might be called as follows: 161.Pp 162.Bd -literal -compact 163 struct extent *ioext, *memext; 164 ... 165 ioext = extent_create("pciio", 0x01000000, 0x0fffffff, M_DEVBUF, 166 NULL, 0, EX_NOWAIT); 167 memext = extent_create("pcimem", 0x00000000, 0x0fffffff, M_DEVBUF, 168 NULL, 0, EX_NOWAIT); 169 ... 170 pci_configure_bus(0, ioext, memext, NULL); 171 ... 172 extent_destroy(ioext); 173 extent_destroy(memext); 174 ... 175.Ed 176.Pp 177Note that this must be called before the PCI bus is attached during 178autoconfiguration. 179.Sh SEE ALSO 180.Xr pci 4 , 181.Xr extent 9 182.Sh HISTORY 183.Fn pci_configure_bus 184was added in 185.Nx 1.6 . 186