xref: /netbsd-src/share/man/man9/pci.9 (revision eb961d0e02b7a46a9acfa877b02df48df6637278)
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37.Dd March 1, 2006
38.Dt PCI 9
39.Os
40.Sh NAME
41.Nm PCI ,
42.Nm pci_conf_read ,
43.Nm pci_conf_write ,
44.Nm pci_conf_print ,
45.Nm pci_conf_capture ,
46.Nm pci_conf_restore ,
47.Nm pci_find_device ,
48.Nm pci_get_capability ,
49.Nm pci_mapreg_type ,
50.Nm pci_mapreg_map ,
51.Nm pci_mapreg_info ,
52.Nm pci_intr_map ,
53.Nm pci_intr_string ,
54.Nm pci_intr_evcnt ,
55.Nm pci_intr_establish ,
56.Nm pci_intr_disestablish ,
57.Nm pci_get_powerstate ,
58.Nm pci_set_powerstate ,
59.Nm pci_vpd_read ,
60.Nm pci_vpd_write ,
61.Nm pci_make_tag ,
62.Nm pci_decompose_tag ,
63.Nm pci_findvendor ,
64.Nm pci_devinfo ,
65.Nm PCI_VENDOR ,
66.Nm PCI_PRODUCT ,
67.Nm PCI_REVISION
68.Nd Peripheral Component Interconnect
69.Sh SYNOPSIS
70.In machine/bus.h
71.In dev/pci/pcivar.h
72.In dev/pci/pcireg.h
73.In dev/pci/pcidevs.h
74.Ft pcireg_t
75.Fn pci_conf_read "pci_chipset_tag_t pc" "pcitag_t tag" "int reg"
76.Ft void
77.Fn pci_conf_write "pci_chipset_tag_t pc" "pcitag_t tag" "int reg" \
78"pcireg_t val"
79.Ft void
80.Fn pci_conf_print "pci_chipset_tag_t pc" "pcitag_t tag" \
81"void (*func)(pci_chipset_tag_t, pcitag_t, const pcireg_t *)"
82.Ft void
83.Fn pci_conf_capture "pci_chipset_tag_t pc" "pcitag_t tag" \
84"struct pci_conf_state *"
85.Ft void
86.Fn pci_conf_restore "pci_chipset_tag_t pc" "pcitag_t tag" \
87"struct pci_conf_state *"
88.Ft int
89.Fn pci_find_device "struct pci_attach_args *pa" \
90"int (*func)(struct pci_attach_args *)"
91.Ft int
92.Fn pci_get_capability "pci_chipset_tag_t pc" "pcitag_t tag" \
93"int capid" "int *offsetp" "pcireg_t *valuep"
94.Ft pcireg_t
95.Fn pci_mapreg_type "pci_chipset_tag_t pc" "pcitag_t tag" "int reg"
96.Ft int
97.Fn pci_mapreg_map "struct pci_attach_args *pa" "int reg" \
98"pcireg_t type"  "int busflags" "bus_space_tag_t *tagp" \
99"bus_space_handle_t *handlep" "bus_addr_t *basep" "bus_size_t *sizep"
100.Ft int
101.Fn pci_mapreg_info "pci_chipset_tag_t pc" "pcitag_t tag" "int reg" \
102"pcireg_t type" "bus_addr_t *basep" "bus_size_t *sizep" "int *flagsp"
103.Ft int
104.Fn pci_find_rom "struct pci_attach_args *pa" \
105"bus_space_tag_t bst" "bus_space_handle_t bsh" "int code" \
106"bus_space_handle_t *handlep" "bus_space_size_t *sizep"
107.Ft int
108.Fn pci_intr_map "struct pci_attach_args *pa" "pci_intr_handle_t *ih"
109.Ft const char *
110.Fn pci_intr_string "pci_chipset_tag_t pc" "pci_intr_handle_t ih"
111.Ft const struct evcnt *
112.Fn pci_intr_evcnt "pci_chipset_tag_t pc" "pci_intr_handle_t ih"
113.Ft void *
114.Fn pci_intr_establish "pci_chipset_tag_t pc" "pci_intr_handle_t ih" \
115"int level" "int (*handler)(void *)" "void *arg"
116.Ft void
117.Fn pci_intr_disestablish "pci_chipset_tag_t pc" "void *ih"
118.Ft int
119.Fn pci_set_powerstate "pci_chipset_tag_t pc" "pcitag_t tag" \
120"int newstate"
121.Ft int
122.Fn pci_get_powerstate "pci_chipset_tag_t pc" "pcitag_t tag"
123.Ft int
124.Fn pci_vpd_read "pci_chipset_tag_t pc" "pcitag_t tag" "int offset" \
125"int count" "pcireg_t *data"
126.Ft int
127.Fn pci_vpd_write "pci_chipset_tag_t pc" "pcitag_t tag" "int offset" \
128"int count" "pcireg_t *data"
129.Ft pcitag_t
130.Fn pci_make_tag "pci_chipset_tag_t pc" "int bus" "int device" \
131"int function"
132.Ft void
133.Fn pci_decompose_tag "pci_chipset_tag_t pc" "pcitag_t tag" \
134"int *busp" "int *devicep" "int *functionp"
135.Ft char *
136.Fn pci_findvendor "pcireg_t id"
137.Ft void
138.Fn pci_devinfo "pcireg_t id" "pcireg_t class" "int show" "char *cp" "size_t len"
139.Ft int
140.Fn PCI_VENDOR "pcireg_t id"
141.Ft int
142.Fn PCI_PRODUCT "pcireg_t id"
143.Ft int
144.Fn PCI_REVISION "pcireg_t id"
145.Sh DESCRIPTION
146The machine-independent
147.Nm
148subsystem provides support for PCI devices.
149.Pp
150The PCI bus was initially developed by Intel in the early 1990's to
151replace the ISA bus for interfacing with their Pentium processor.
152The PCI specification is widely regarded as well designed, and the
153PCI bus has found widespread acceptance in machines ranging from
154Apple's PowerPC-based systems to Sun's UltraSPARC-based machines.
155.Pp
156The PCI bus is a multiplexed bus, allowing addresses and data on the same
157pins for a reduced number of pins.
158Data transfers can be 8-bit, 16-bit or 32-bit.
159A 64-bit extended PCI bus is also defined.
160Multi-byte transfers are little-endian.
161The PCI bus operates up to 33MHz and any device on the bus can be
162the bus master.
163.Pp
164AGP is a version of PCI optimised for high-throughput data rates,
165particularly for accelerated frame buffers.
166.Pp
167The PCI bus is a "plug and play" bus, in the sense that devices can be
168configured dynamically by software.
169The PCI interface chip on a PCI device bus presents a small window
170of registers into the PCI configuration space.
171These registers contain information about the device such as the vendor
172and a product ID.
173The configuration registers can also be written to by software to alter
174how the device interfaces to the PCI bus.
175An important register in the configuration space is the Base Address
176Register (BAR).
177The BAR is written to by software to map the device registers into a
178window of processor address space.
179Once this mapping is done, the device registers can be accessed relative
180to the base address.
181.Sh DATA TYPES
182Drivers for devices attached to the
183.Nm
184will make use of the following data types:
185.Bl -tag -width compact
186.It Fa pcireg_t
187Configuration space register.
188.It Fa pci_chipset_tag_t
189Chipset tag for the PCI bus.
190.It Fa pcitag_t
191Configuration tag describing the location and function of the PCI
192device.
193It contains the tuple
194.Ao
195bus, device, function
196.Ac .
197.It Fa pci_intr_handle_t
198The opaque handle describing an established interrupt handler.
199.It Fa struct pci_attach_args
200Devices have their identity recorded in this structure.
201It contains the following members:
202.Bd -literal
203	bus_space_tag_t pa_iot;		/* pci i/o space tag */
204	bus_space_tag_t pa_memt;	/* pci mem space tag */
205	bus_dma_tag_t pa_dmat;		/* DMA tag */
206	pci_chipset_tag_t pa_pc;
207	int pa_flags;			/* flags */
208	pcitag_t pa_tag;
209	pcireg_t pa_id;
210	pcireg_t pa_class;
211.Ed
212.It Fa struct pci_conf_state
213Stores the PCI configuration state of a device.
214It contains the following member:
215.Bd -literal
216	pcireg_t reg[16];			/* pci conf register */
217.Ed
218.El
219.Sh FUNCTIONS
220.Bl -tag -width compact
221.It Fn pci_conf_read "pc" "tag" "reg"
222Read from register
223.Fa reg
224in PCI configuration space.
225The argument
226.Fa tag
227is the PCI tag for the current device attached to PCI chipset
228.Fa pc .
229.It Fn pci_conf_write "pc" "tag" "reg" "val"
230Write to register
231.Fa reg
232in PCI configuration space.
233The argument
234.Fa tag
235is the PCI tag for the current device attached to PCI chipset
236.Fa pc .
237.It Fn pci_conf_print "pc" "tag" "func"
238Print out most of the registers in the PCI configuration for the
239device.
240The argument
241.Fa tag
242is the PCI tag for the current device attached to PCI chipset
243.Fa pc .
244The argument
245.Fa func
246is a function called by
247.Fn pci_conf_print
248to print the device-dependent registers.
249This function is only useful for driver development and is usually
250wrapped in pre-processor declarations.
251.It Fn pci_conf_capture "pc" "tag" "pcs"
252Capture PCI configuration space into structure
253.Fa pcs .
254The argument
255.Fa tag
256is the PCI tag for the current device attached to the PCI
257chipset
258.Fa pc .
259.It Fn pci_conf_restore "pc" "tag" "pcs"
260Restores PCI configuration space from structure
261.Fa pcs .
262The argument
263.Fa tag
264is the PCI tag for the current device attached to the PCI
265chipset
266.Fa pc .
267.It Fn pci_find_device "pa" "func"
268Find a device using a match function on all probed busses.
269The argument
270.Fa func
271is called by
272.Fn pci_find_device
273to match a device.
274The argument
275.Fa pa
276is filled in if the device is matched.
277.Fn pci_find_device
278returns 1 if the device is matched, and zero otherwise.
279This function is specifically for use by LKMs (see
280.Xr lkm 4 )
281and its use otherwise is strongly discouraged.
282.It Fn pci_get_capability "pc" "tag" "capid" "offsetp" "valuep"
283Parse the device capability list in configuration space looking for
284capability
285.Fa capid .
286If
287.Fa offsetp
288is not NULL, the register offset in configuration space is returned in
289.Fa offsetp .
290If
291.Fa valuep
292is not NULL, the value of the capability is returned in
293.Fa valuep .
294The argument
295.Fa tag
296is the PCI tag for the current device attached to PCI chipset
297.Fa pc .
298This function returns 1 if the capability was found.
299If the capability was not found, it returns zero, and
300.Fa offsetp
301and
302.Fa valuep
303remain unchanged.
304.It Fn pci_mapreg_type "pc" "tag" "reg"
305Interrogates the Base Address Register (BAR) in configuration space
306specified by
307.Fa reg
308and returns the default (or current) mapping type.
309Valid returns values are:
310.Bl -tag -width compact
311.It Dv PCI_MAPREG_TYPE_IO
312The mapping is to I/O address space.
313.It Dv PCI_MAPREG_TYPE_MEM
314The mapping is to memory address space.
315.It Dv PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT
316The mapping is to 64-bit memory address space.
317.It Dv PCI_MAPREG_TYPE_ROM
318The mapping is to ROM.
319Note that in the current implementation,
320.Dv PCI_MAPREG_TYPE_ROM
321has the same numeric value as
322.Dv PCI_MAPREG_TYPE_MEM .
323.El
324.Pp
325The argument
326.Fa tag
327is the PCI tag for the current device attached to PCI chipset
328.Fa pc .
329.It Fn pci_mapreg_map "pa" "reg" "type"  "busflags" "tagp" "handlep" "basep" "sizep"
330Maps the register windows for the device into kernel virtual address
331space.
332This function is generally only called during the driver attach step
333and takes a pointer to the
334.Em struct pci_attach_args
335in
336.Fa pa .
337The physical address of the mapping is in the Base Address Register
338(BAR) in configuration space specified by
339.Fa reg .
340Valid values for the type of mapping
341.Fa type
342are:
343.Bl -tag -width compact
344.It Dv PCI_MAPREG_TYPE_IO
345The mapping should be to I/O address space.
346.It Dv PCI_MAPREG_TYPE_MEM
347The mapping should be to memory address space.
348.It Dv PCI_MAPREG_TYPE_ROM
349The mapping is to access ROM.
350This type of mapping is only permitted when the value for
351.Fa reg
352is
353.Dv PCI_MAPREG_ROM .
354.El
355.Pp
356The argument
357.Fa busflags
358are bus-space flags passed to
359.Fn bus_space_map
360to perform the mapping (see
361.Xr bus_space 9 ) .
362The bus-space tag and handle for the mapped register window are
363returned in
364.Fa tagp
365and
366.Fa handlep
367respectively.
368The bus-address and size of the mapping are returned in
369.Fa basep
370and
371.Fa sizep
372respectively.
373If any of
374.Fa tagp ,
375.Fa handlep ,
376.Fa basep ,
377or
378.Fa sizep
379are NULL then
380.Fn pci_mapreg_map
381does not define their return value.
382This function returns zero on success and non-zero on error.
383.It Fn pci_mapreg_info "pc" "tag" "reg" "type" "basep" "sizep" "flagsp"
384Performs the same operations as
385.Fn pci_mapreg_map
386but doesn't actually map the register window into kernel virtual
387address space.
388Returns the bus-address, size and bus flags in
389.Fa basep ,
390.Fa sizep
391and
392.Fa flagsp
393respectively.
394These return values can be used by
395.Fn bus_space_map
396to actually map the register window into kernel virtual address space.
397This function is useful for setting up the registers in configuration
398space and deferring the mapping to a later time, such as in a
399bus-independent attachment routine.
400.Fa pci_mapreg_info
401returns zero on success and non-zero on failure.
402.It Fn pci_find_rom "pa" "bst" "bsh" "code" "handlep" "sizep"
403Locates a suitable ROM image within a PCI expansion ROM previously mapped with
404.Fn pci_mapreg_map
405and creates a subregion for it with
406.Fn bus_space_subregion .
407The
408.Fa bst
409and
410.Fa bsh
411arguments are the bus tag and handle obtained with the prior call to
412.Fn pci_mapreg_map .
413Valid values for the image type
414.Fa code
415are:
416.Bl -tag -width compact
417.It Dv PCI_ROM_CODE_TYPE_X86
418Find a ROM image containing i386 executable code for use by PC BIOS.
419.It Dv PCI_ROM_CODE_TYPE_OFW
420Find a ROM image containing Forth code for use by Open Firmware.
421.It Dv PCI_ROM_CODE_TYPE_HPPA
422Find a ROM image containing HP PA/RISC executable code.
423.El
424.Pp
425The created subregion will cover the entire selected ROM image, including
426header data.
427The handle to this subregion is returned in
428.Fa handlep .
429The size of the image (and the corresponding subregion) is returned in
430.Fa sizep .
431This function can only be used with expansion ROMs located at the
432.Dv PCI_MAPREG_ROM
433base address register (BAR).
434.It Fn pci_intr_map "pa" "ih"
435See
436.Xr pci_intr 9 .
437.It Fn pci_intr_string "pc" "ih"
438See
439.Xr pci_intr 9 .
440.It Fn pci_intr_evcnt "pc" "ih"
441See
442.Xr pci_intr 9 .
443.It Fn pci_intr_establish "pc" "ih" "level" "handler" "arg"
444See
445.Xr pci_intr 9 .
446.It Fn pci_intr_disestablish "pc" "ih"
447See
448.Xr pci_intr 9 .
449.It Fn pci_set_powerstate "pc" "tag" "newstate"
450Set power state of the device to newstate.
451Valid values for
452.Fa newstate
453are:
454.Pp
455.Bl -tag -width PCI_PWR_D0 -compact
456.It Dv PCI_PWR_D0
457.It Dv PCI_PWR_D1
458.It Dv PCI_PWR_D2
459.It Dv PCI_PWR_D3
460.El
461.It Fn pci_get_powerstate "pc" "tag"
462Get current power state of the device.
463.It Fn pci_vpd_read "pc" "tag" "offset" "count" "data"
464Read
465.Fa count
46632-bit words of Vital Product Data for the device starting at offset
467.Fa offset
468into the buffer pointed to by
469.Fa data .
470Returns 0 on success or non-zero if the device has no Vital Product Data
471capability or if reading the Vital Product Data fails.
472.It Fn pci_vpd_write "pc" "tag" "offset" "count" "data"
473Write
474.Fa count
47532-bit words of Vital Product Data for the device starting at offset
476.Fa offset
477from the buffer pointed to by
478.Fa data .
479Returns 0 on success or non-zero if the device has no Vital Product Data
480capability of if writing the Vital Product Data fails.
481.It Fn pci_make_tag "pc" "bus" "device" "function"
482Create a new PCI tag for the PCI device specified by the tuple
483.Ao
484bus, device, function
485.Ac .
486This function is not useful to the usual PCI device driver.
487It is generally used by drivers of multi-function devices when
488attaching other PCI device drivers to each function.
489.It Fn pci_decompose_tag "pc" "tag" "busp" "devicep" "fnp"
490Decompose the PCI tag
491.Fa tag
492generated by
493.Fn pci_make_tag
494into its
495.Ao
496bus, device, function
497.Ac
498tuple.
499.It Fn pci_findvendor "id"
500Return the string of the vendor name for the device specified by
501.Fa id .
502.It Fn pci_devinfo "id" "class" "show" "cp" "len"
503Returns the description string from the in-kernel PCI database for the
504device described by
505.Fa id
506and
507.Fa class .
508The description string is returned in
509.Fa cp ;
510the size of that storage is given in
511.Fa len .
512The argument
513.Fa show
514specifies whether the PCI subsystem should report the string to the
515console.
516.It Fn PCI_VENDOR "id"
517Return the PCI vendor id for device
518.Fa id .
519.It Fn PCI_PRODUCT "id"
520Return the PCI product id for device
521.Fa id .
522.It Fn PCI_REVISION "id"
523Return the PCI product revision for device
524.Fa id .
525.El
526.Sh AUTOCONFIGURATION
527During autoconfiguration, a
528.Nm
529driver will receive a pointer to
530.Fa struct pci_attach_args
531describing the device attaches to the PCI bus.
532Drivers match the device using the
533.Fa pa_id
534member using
535.Fn PCI_VENDOR .
536.Fn PCI_PRODUCT
537and
538.Fn PCI_REVISION .
539.Pp
540During the driver attach step, drivers can read the device
541configuration space using
542.Fn pci_conf_read .
543The meaning attached to registers in the PCI configuration space are
544device-dependent, but will usually contain physical addresses of the
545device register windows.
546Device options can also be stored into the PCI configuration space using
547.Fn pci_conf_write .
548For example, the driver can request support for bus-mastering DMA by
549writing the option to the PCI configuration space.
550.Pp
551Device capabilities can be queried using
552.Fn pci_get_capability ,
553and returns device-specific information which can be found in the PCI
554configuration space to alter device operation.
555.Pp
556After reading the physical addresses of the device register windows
557from configuration space, these windows must be mapped into kernel
558virtual address space using
559.Fn pci_mapreg_map .
560Device registers can now be accessed using the standard bus-space API
561(see
562.Xr bus_space 9 ) .
563.Pp
564Details of using PCI interrupts is described in
565.Xr pci_intr 9 .
566.Sh DMA SUPPORT
567The PCI bus supports bus-mastering operations from any device on the bus.
568The DMA facilities are accessed through the standard
569.Xr bus_dma 9
570interface.
571To support DMA transfers from the device to the host, it is necessary
572to enable bus-mastering in the PCI configuration space for the device.
573.Pp
574During system shutdown, it is necessary to abort any DMA transfers in
575progress by registering a shutdown hook (see
576.Xr shutdownhook_establish 9 ) .
577.Sh CODE REFERENCES
578This section describes places within the
579.Nx
580source tree where actual code implementing or using the
581machine-independent PCI subsystem can be found.
582All pathnames are relative to
583.Pa /usr/src .
584.Pp
585The PCI subsystem itself is implemented within the files
586.Pa sys/dev/pci/pci.c ,
587.Pa sys/dev/pci/pci_subr.c ,
588.Pa sys/dev/pci/pci_map.c ,
589.Pa sys/dev/pci/pci_quirks.c ,
590and
591.Pa sys/dev/pci/pciconf.c .
592Machine-dependent portions are implemented within the file
593.Pa sys/arch/\*[Lt]arch\*[Gt]/pci/pci_machdep.c .
594.Pp
595The database of known devices exists within the file
596.Pa sys/dev/pci/pcidevs_data.h
597and is generated automatically from the file
598.Pa sys/dev/pci/pcidevs .
599New vendor and product identifiers should be added to this file.
600The database can be regenerated using the Makefile
601.Pa sys/dev/pci/Makefile.pcidevs .
602.Sh SEE ALSO
603.Xr pci 4 ,
604.Xr autoconf 9 ,
605.Xr bus_dma 9 ,
606.Xr bus_space 9 ,
607.Xr driver 9 ,
608.Xr pci_configure_bus 9 ,
609.Xr pci_intr 9 ,
610.Xr shutdownhook_establish 9
611.Sh HISTORY
612The machine-independent PCI subsystem appeared in
613.Nx 1.2 .
614