xref: /netbsd-src/share/man/man9/pci.9 (revision eb7c1594f145c931049e1fd9eb056a5987e87e59)
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37.Dd March 25, 2003
38.Dt PCI 9
39.Os
40.Sh NAME
41.Nm PCI ,
42.Nm pci_conf_read ,
43.Nm pci_conf_write ,
44.Nm pci_conf_print ,
45.Nm pci_find_device ,
46.Nm pci_get_capability ,
47.Nm pci_mapreg_type ,
48.Nm pci_mapreg_map ,
49.Nm pci_mapreg_info ,
50.Nm pci_intr_map ,
51.Nm pci_intr_string ,
52.Nm pci_intr_evcnt ,
53.Nm pci_intr_establish ,
54.Nm pci_intr_disestablish ,
55.Nm pci_get_powerstate ,
56.Nm pci_set_powerstate ,
57.Nm pci_vpd_read ,
58.Nm pci_vpd_write ,
59.Nm pci_make_tag ,
60.Nm pci_decompose_tag ,
61.Nm pci_findvendor ,
62.Nm pci_devinfo ,
63.Nm PCI_VENDOR ,
64.Nm PCI_PRODUCT ,
65.Nm PCI_REVISION
66.Nd Peripheral Component Interconnect
67.Sh SYNOPSIS
68.In machine/bus.h
69.In dev/pci/pcivar.h
70.In dev/pci/pcireg.h
71.In dev/pci/pcidevs.h
72.Ft pcireg_t
73.Fn pci_conf_read "pci_chipset_tag_t pc" "pcitag_t tag" "int reg"
74.Ft void
75.Fn pci_conf_write "pci_chipset_tag_t pc" "pcitag_t tag" "int reg" \
76"pcireg_t val"
77.Ft void
78.Fn pci_conf_print "pci_chipset_tag_t pc" "pcitag_t tag" \
79"void (*func)(pci_chipset_tag_t, pcitag_t, const pcireg_t *)"
80.Ft int
81.Fn pci_find_device "struct pci_attach_args *pa" \
82"int (*func)(struct pci_attach_args *)"
83.Ft int
84.Fn pci_get_capability "pci_chipset_tag_t pc" "pcitag_t tag" \
85"int capid" "int *offsetp" "pcireg_t *valuep"
86.Ft pcireg_t
87.Fn pci_mapreg_type "pci_chipset_tag_t pc" "pcitag_t tag" "int reg"
88.Ft int
89.Fn pci_mapreg_map "struct pci_attach_args *pa" "int reg" \
90"pcireg_t type"  "int busflags" "bus_space_tag_t *tagp" \
91"bus_space_handle_t *handlep" "bus_addr_t *basep" "bus_size_t *sizep"
92.Ft int
93.Fn pci_mapreg_info "pci_chipset_tag_t pc" "pcitag_t tag" "int reg" \
94"pcireg_t type" "bus_addr_t *basep" "bus_size_t *sizep" "int *flagsp"
95.Ft int
96.Fn pci_intr_map "struct pci_attach_args *pa" "pci_intr_handle_t *ih"
97.Ft const char *
98.Fn pci_intr_string "pci_chipset_tag_t pc" "pci_intr_handle_t ih"
99.Ft const struct evcnt *
100.Fn pci_intr_evcnt "pci_chipset_tag_t pc" "pci_intr_handle_t ih"
101.Ft void *
102.Fn pci_intr_establish "pci_chipset_tag_t pc" "pci_intr_handle_t ih" \
103"int level" "int (*handler)(void *)" "void *arg"
104.Ft void
105.Fn pci_intr_disestablish "pci_chipset_tag_t pc" "void *ih"
106.Ft int
107.Fn pci_set_powerstate "pci_chipset_tag_t pc" "pcitag_t tag" \
108"int newstate"
109.Ft int
110.Fn pci_get_powerstate "pci_chipset_tag_t pc" "pcitag_t tag"
111.Ft int
112.Fn pci_vpd_read "pci_chipset_tag_t pc" "pcitag_t tag" "int offset" \
113"int count" "pcireg_t *data"
114.Ft int
115.Fn pci_vpd_write "pci_chipset_tag_t pc" "pcitag_t tag" "int offset" \
116"int count" "pcireg_t *data"
117.Ft pcitag_t
118.Fn pci_make_tag "pci_chipset_tag_t pc" "int bus" "int device" \
119"int function"
120.Ft void
121.Fn pci_decompose_tag "pci_chipset_tag_t pc" "pcitag_t tag" \
122"int *busp" "int *devicep" "int *functionp"
123.Ft char *
124.Fn pci_findvendor "pcireg_t id"
125.Ft void
126.Fn pci_devinfo "pcireg_t id" "pcireg_t class" "int show" "char *cp"
127.Ft int
128.Fn PCI_VENDOR "pcireg_t id"
129.Ft int
130.Fn PCI_PRODUCT "pcireg_t id"
131.Ft int
132.Fn PCI_REVISION "pcireg_t id"
133.Sh DESCRIPTION
134The machine-independent
135.Nm
136subsystem provides support for PCI devices.
137.Pp
138The PCI bus was initially developed by Intel in the early 1990's to
139replace the ISA bus for interfacing with their Pentium processor.
140The PCI specification is widely regarded as well designed, and the
141PCI bus has found widespread acceptance in machines ranging from
142Apple's PowerPC-based systems to Sun's UltraSPARC-based machines.
143.Pp
144The PCI bus is a multiplexed bus, allowing addresses and data on the same
145pins for a reduced number of pins.
146Data transfers can be 8-bit, 16-bit or 32-bit.
147A 64-bit extended PCI bus is also defined.
148Multi-byte transfers are little-endian.
149The PCI bus operates up to 33MHz and any device on the bus can be
150the bus master.
151.Pp
152AGP is a version of PCI optimised for high-throughput data rates,
153particularly for accelerated frame buffers.
154.Pp
155The PCI bus is a "plug and play" bus, in the sense that devices can be
156configured dynamically by software.
157The PCI interface chip on a PCI device bus presents a small window
158of registers into the PCI configuration space.
159These registers contain information about the device such as the vendor
160and a product ID.
161The configuration registers can also be written to by software to alter
162how the device interfaces to the PCI bus.
163An important register in the configuration space is the Base Address
164Register (BAR).
165The BAR is written to by software to map the device registers into a
166window of processor address space.
167Once this mapping is done, the device registers can be accessed relative
168to the base address.
169.Sh DATA TYPES
170Drivers for devices attached to the
171.Nm
172will make use of the following data types:
173.Bl -tag -width compact
174.It Fa pcireg_t
175Configuration space register.
176.It Fa pci_chipset_tag_t
177Chipset tag for the PCI bus.
178.It Fa pcitag_t
179Configuration tag describing the location and function of the PCI
180device.
181It contains the tuple
182.Ao
183bus, device, function
184.Ac .
185.It Fa pci_intr_handle_t
186The opaque handle describing an established interrupt handler.
187.It Fa struct pci_attach_args
188Devices have their identity recorded in this structure.
189It contains the following members:
190.Bd -literal
191	bus_space_tag_t pa_iot;		/* pci i/o space tag */
192	bus_space_tag_t pa_memt;	/* pci mem space tag */
193	bus_dma_tag_t pa_dmat;		/* DMA tag */
194	pci_chipset_tag_t pa_pc;
195	int pa_flags;			/* flags */
196	pcitag_t pa_tag;
197	pcireg_t pa_id;
198	pcireg_t pa_class;
199.Ed
200.El
201.Sh FUNCTIONS
202.Bl -tag -width compact
203.It Fn pci_conf_read "pc" "tag" "reg"
204Read from register
205.Fa reg
206in PCI configuration space.
207The argument
208.Fa tag
209is the PCI tag for the current device attached to PCI chipset
210.Fa pc .
211.It Fn pci_conf_write "pc" "tag" "reg" "val"
212Write to register
213.Fa reg
214in PCI configuration space.
215The argument
216.Fa tag
217is the PCI tag for the current device attached to PCI chipset
218.Fa pc .
219.It Fn pci_conf_print "pc" "tag" "func"
220Print out most of the registers in the PCI configuration for the
221device.
222The argument
223.Fa tag
224is the PCI tag for the current device attached to PCI chipset
225.Fa pc .
226The argument
227.Fa func
228is a function called by
229.Fn pci_conf_print
230to print the device-dependent registers.
231This function is only useful for driver development and is usually
232wrapped in pre-processor declarations.
233.It Fn pci_find_device "pa" "func"
234Find a device using a match function on all probed busses.
235The argument
236.Fa func
237is called by
238.Fn pci_find_device
239to match a device.
240The argument
241.Fa pa
242is filled in if the device is matched.
243.Fn pci_find_device
244returns 1 if the device is matched, and zero otherwise.
245This function is specifically for use by LKMs (see
246.Xr lkm 4 )
247and its use otherwise is strongly discouraged.
248.It Fn pci_get_capability "pc" "tag" "capid" "offsetp" "valuep"
249Parse the device capability list in configuration space looking for
250capability
251.Fa capid .
252If
253.Fa offsetp
254is not NULL, the register offset in configuration space is returned in
255.Fa offsetp .
256If
257.Fa valuep
258is not NULL, the value of the capability is returned in
259.Fa valuep .
260The argument
261.Fa tag
262is the PCI tag for the current device attached to PCI chipset
263.Fa pc .
264This function returns 1 if the capability was found.
265If the capability was not found, it returns zero, and
266.Fa offsetp
267and
268.Fa valuep
269remain unchanged.
270.It Fn pci_mapreg_type "pc" "tag" "reg"
271Interrogates the Base Address Register (BAR) in configuration space
272specified by
273.Fa reg
274and returns the default (or current) mapping type.
275Valid returns values are:
276.Bl -tag -width compact
277.It PCI_MAPREG_TYPE_IO
278The mapping is to I/O address space.
279.It PCI_MAPREG_TYPE_MEM
280The mapping is to memory address space.
281.It PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT
282The mapping is to 64-bit memory address space.
283.It PCI_MAPREG_TYPE_ROM
284The mapping is to ROM.
285.El
286.sp
287The argument
288.Fa tag
289is the PCI tag for the current device attached to PCI chipset
290.Fa pc .
291.It Fn pci_mapreg_map "pa" "reg" "type"  "busflags" "tagp" "handlep" "basep" "sizep"
292Maps the register windows for the device into kernel virtual address
293space.
294This function is generally only called during the driver attach step
295and takes a pointer to the
296.Em struct pci_attach_args
297in
298.Fa pa .
299The physical address of the mapping is in the Base Address Register
300(BAR) in configuration space specified by
301.Fa reg .
302Valid values for the type of mapping
303.Fa type
304are:
305.Bl -tag -width compact
306.It PCI_MAPREG_TYPE_IO
307The mapping should be to I/O address space.
308.It PCI_MAPREG_TYPE_MEM
309The mapping should be to memory address space.
310.It PCI_MAPREG_TYPE_ROM
311The mapping is to access ROM.
312.El
313.sp
314The argument
315.Fa busflags
316are bus-space flags passed to
317.Fn bus_space_map
318to perform the mapping (see
319.Xr bus_space 9 ) .
320The bus-space tag and handle for the mapped register window are
321returned in
322.Fa tagp
323and
324.Fa handlep
325respectively.
326The bus-address and size of the mapping are returned in
327.Fa basep
328and
329.Fa sizep
330respectively.
331If any of
332.Fa tagp ,
333.Fa handlep ,
334.Fa basep ,
335or
336.Fa sizep
337are NULL then
338.Fn pci_mapreg_map
339does not define their return value.
340This function returns zero on success and non-zero on error.
341.It Fn pci_mapreg_info "pc" "tag" "reg" "type" "basep" "sizep" "flagsp"
342Performs the same operations as
343.Fn pci_mapreg_map
344but doesn't actually map the register window into kernel virtual
345address space.
346Returns the bus-address, size and bus flags in
347.Fa basep ,
348.Fa sizep
349and
350.Fa flagsp
351respectively.
352These return values can be used by
353.Fn bus_space_map
354to actually map the register window into kernel virtual address space.
355This function is useful for setting up the registers in configuration
356space and deferring the mapping to a later time, such as in a
357bus-independent attachment routine.
358.Fa pci_mapreg_info
359returns zero on success and non-zero on failure.
360.It Fn pci_intr_map "pa" "ih"
361See
362.Xr pci_intr 9 .
363.It Fn pci_intr_string "pc" "ih"
364See
365.Xr pci_intr 9 .
366.It Fn pci_intr_evcnt "pc" "ih"
367See
368.Xr pci_intr 9 .
369.It Fn pci_intr_establish "pc" "ih" "level" "handler" "arg"
370See
371.Xr pci_intr 9 .
372.It Fn pci_intr_disestablish "pc" "ih"
373See
374.Xr pci_intr 9 .
375.It Fn pci_set_powerstate "pc" "tag" "newstate"
376Set power state of the device to newstate.
377Valid values for
378.Fa newstate
379are:
380.Pp
381.Bl -tag -width PCI_PWR_D0 -compact
382.It PCI_PWR_D0
383.It PCI_PWR_D1
384.It PCI_PWR_D2
385.It PCI_PWR_D3
386.El
387.It Fn pci_get_powerstate "pc" "tag"
388Get current power state of the device.
389.It Fn pci_vpd_read "pc" "tag" "offset" "count" "data"
390Read
391.Fa count
39232-bit words of Vital Product Data for the device starting at offset
393.Fa offset
394into the buffer pointed to by
395.Fa data .
396Returns 0 on success or non-zero if the device has no Vital Product Data
397capability or if reading the Vital Product Data fails.
398.It Fn pci_vpd_write "pc" "tag" "offset" "count" "data"
399Write
400.Fa count
40132-bit words of Vital Product Data for the device starting at offset
402.Fa offset
403from the buffer pointed to by
404.Fa data .
405Returns 0 on success or non-zero if the device has no Vital Product Data
406capability of if writing the Vital Product Data fails.
407.It Fn pci_make_tag "pc" "bus" "device" "function"
408Create a new PCI tag for the PCI device specified by the tuple
409.Ao
410bus, device, function
411.Ac .
412This function is not useful to the usual PCI device driver.
413It is generally used by drivers of multi-function devices when
414attaching other PCI device drivers to each function.
415.It Fn pci_decompose_tag "pc" "tag" "busp" "devicep" "fnp"
416Decompose the PCI tag
417.Fa tag
418generated by
419.Fn pci_make_tag
420into its
421.Ao
422bus, device, function
423.Ac
424tuple.
425.It Fn pci_findvendor "id"
426Return the string of the vendor name for the device specified by
427.Fa id .
428.It Fn pci_devinfo "id" "class" "show" "cp"
429Returns the description string from the in-kernel PCI database for the
430device described by
431.Fa id
432and
433.Fa class .
434The description string is returned in
435.Fa cp .
436The argument
437.Fa show
438specifies whether the PCI subsystem should report the string to the
439console.
440.It Fn PCI_VENDOR "id"
441Return the PCI vendor id for device
442.Fa id .
443.It Fn PCI_PRODUCT "id"
444Return the PCI product id for device
445.Fa id .
446.It Fn PCI_REVISION "id"
447Return the PCI product revision for device
448.Fa id .
449.El
450.Sh AUTOCONFIGURATION
451During autoconfiguration, a
452.Nm
453driver will receive a pointer to
454.Fa struct pci_attach_args
455describing the device attaches to the PCI bus.
456Drivers match the device using the
457.Fa pa_id
458member using
459.Fn PCI_VENDOR .
460.Fn PCI_PRODUCT
461and
462.Fn PCI_REVISION .
463.Pp
464During the driver attach step, drivers can read the device
465configuration space using
466.Fn pci_conf_read .
467The meaning attached to registers in the PCI configuration space are
468device-dependent, but will usually contain physical addresses of the
469device register windows.
470Device options can also be stored into the PCI configuration space using
471.Fn pci_conf_write .
472For example, the driver can request support for bus-mastering DMA by
473writing the option to the PCI configuration space.
474.Pp
475Device capabilities can be queried using
476.Fn pci_get_capability ,
477and returns device-specific information which can be found in the PCI
478configuration space to alter device operation.
479.Pp
480After reading the physical addresses of the device register windows
481from configuration space, these windows must be mapped into kernel
482virtual address space using
483.Fn pci_mapreg_map .
484Device registers can now be accessed using the standard bus-space API
485(see
486.Xr bus_space 9 ) .
487.Pp
488Details of using PCI interrupts is described in
489.Xr pci_intr 9 .
490.Sh DMA SUPPORT
491The PCI bus supports bus-mastering operations from any device on the bus.
492The DMA facilities are accessed through the standard
493.Xr bus_dma 9
494interface.
495To support DMA transfers from the device to the host, it is necessary
496to enable bus-mastering in the PCI configuration space for the device.
497.Pp
498During system shutdown, it is necessary to abort any DMA transfers in
499progress by registering a shutdown hook (see
500.Xr shutdownhook_establish 9 ) .
501.Sh CODE REFERENCES
502This section describes places within the
503.Nx
504source tree where actual code implementing or using the
505machine-independent PCI subsystem can be found.
506All pathnames are relative to
507.Pa /usr/src .
508.Pp
509The PCI subsystem itself is implemented within the files
510.Pa sys/dev/pci/pci.c ,
511.Pa sys/dev/pci/pci_subr.c ,
512.Pa sys/dev/pci/pci_map.c ,
513.Pa sys/dev/pci/pci_quirks.c ,
514and
515.Pa sys/dev/pci/pciconf.c .
516Machine-dependent portions are implemented within the file
517.Pa sys/arch/\*[Lt]arch\*[Gt]/pci/pci_machdep.c .
518.Pp
519The database of known devices exists within the file
520.Pa sys/dev/pci/pcidevs_data.h
521and is generated automatically from the file
522.Pa sys/dev/pci/pcidevs .
523New vendor and product identifiers should be added to this file.
524The database can be regenerated using the Makefile
525.Pa sys/dev/pci/Makefile.pcidevs .
526.Sh SEE ALSO
527.Xr pci 4 ,
528.Xr autoconf 9 ,
529.Xr bus_dma 9 ,
530.Xr bus_space 9 ,
531.Xr driver 9 ,
532.Xr pci_configure_bus 9 ,
533.Xr pci_intr 9 ,
534.Xr shutdownhook_establish 9
535.Sh HISTORY
536The machine-independent PCI subsystem appeared in
537.Nx 1.2 .
538