1.\" $NetBSD: mi_switch.9,v 1.1 2007/07/21 08:51:31 dsieger Exp $ 2.\" 3.\" Copyright (c) 1996, 2002 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Paul Kranenburg. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 3. All advertising materials mentioning features or use of this software 18.\" must display the following acknowledgement: 19.\" This product includes software developed by the NetBSD 20.\" Foundation, Inc. and its contributors. 21.\" 4. Neither the name of The NetBSD Foundation nor the names of its 22.\" contributors may be used to endorse or promote products derived 23.\" from this software without specific prior written permission. 24.\" 25.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35.\" POSSIBILITY OF SUCH DAMAGE. 36.\" 37.Dd July 21, 2007 38.Dt MI_SWITCH 9 39.Os 40.Sh NAME 41.Nm mi_switch 42.Nd machine independent context switch prelude 43.Sh SYNOPSIS 44.Ft int 45.Fn mi_switch "struct lwp *l" 46.Sh DESCRIPTION 47The 48.Fn mi_switch 49function implements the machine-independent prelude to an LWP context 50switch. It is called from only a few distinguished places in the 51kernel code as a result of the principle of non-preemptable kernel 52mode execution. The three major uses of 53.Fn mi_switch 54can be enumerated as follows: 55.Bl -enum -offset indent 56.It 57From within 58.Xr cv_wait 9 59and associated methods 60when the current LWP voluntarily relinquishes the CPU to wait for 61some resource to become available. 62.It 63From within 64.Xr preempt 9 65when the current LWP voluntarily relinquishes the CPU or when the 66kernel prepares a return to user-mode execution. 67.It 68In the signal handling code 69if a signal is delivered that causes an LWP to stop 70.Pq see Xr issignal 9 . 71.El 72.Pp 73.Fn mi_switch 74records the amount of time the current LWP has been running in the 75LWP structure and checks this value against the CPU time limits 76allocated to the LWP 77.Pq see Xr getrlimit 2 . 78Exceeding the soft limit results in a 79.Dv SIGXCPU 80signal to be posted to the LWP, while exceeding the hard limit will 81cause a 82.Dv SIGKILL . 83.Pp 84Unless 85.Fa l->l_switchto 86is not 87.Dv NULL , 88.Fn mi_switch 89will call 90.Fn sched_nextlwp 91to select a new LWP from the scheduler's runqueue structures. If no 92runnable LWP is found, the idle LWP is used. 93If the new LWP is not equal to the current one, 94.Fn mi_switch 95will hand over control to the machine-dependent function 96.Xr cpu_switchto 9 97to switch to the new LWP. 98.Pp 99.Fn mi_switch 100has to be called with the LWP lock held 101(through calling 102.Fn lwp_lock 103first) and at the 104.Xr splsched 9 105interrupt protection level. It returns with the LWP lock released. 106.Sh RETURN VALUES 107.Fn mi_switch 108returns 1 if a context switch was performed to a 109different LWP, 0 otherwise. 110.Sh SEE ALSO 111.Xr condvar 9 , 112.Xr cpu_switchto 9 , 113.Xr csf 9 , 114.Xr pmap 9 , 115.Xr ras 9 , 116.Xr sched_4bsd 9 , 117.Xr splsched 9 118