xref: /netbsd-src/share/man/man9/man9.x86/tsc.9 (revision ba65fde2d7fefa7d39838fa5fa855e62bd606b5e)
1.\" $NetBSD: tsc.9,v 1.4 2011/10/25 05:41:35 jruoho Exp $
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7.\" by Jukka Ruohonen.
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30.Dd October 25, 2011
31.Dt TSC 9 x86
32.Os
33.Sh NAME
34.Nm tsc
35.Nd Time Stamp Counter
36.Sh SYNOPSIS
37.In x86/x86/tsc.h
38.Ft uint64_t
39.Fn rdtsc "void"
40.Ft void
41.Fn tsc_tc_init "void"
42.Ft void
43.Fn tsc_sync_ap "struct cpu_info *ci"
44.Ft void
45.Fn tsc_sync_bp "struct cpu_info *ci"
46.Ft void
47.Fn tsc_sync_drift "int64_t drift"
48.Sh DESCRIPTION
49The time stamp counter
50.Pq Tn TSC
51is a hardware counter found in all contemporary x86 processors.
52The counter is implemented as a 64-bit model-specific register
53.Pq Tn MSR
54that is incremented at every clock cycle.
55The
56.Tn RDTSC
57.Pq Dq read time stamp counter
58register has been present since the original Pentium.
59.Pp
60Already because of the access method,
61.Tn TSC
62has traditionally provided a low-overhead and high-resolution
63way to obtain
64.Tn CPU
65timing information.
66Recently, however, this reliability has been undermined by
67such factors as system sleep states,
68.Tn CPU
69.Dq hotplugging ,
70.Dq hibernation ,
71and
72.Tn CPU
73frequency scaling.
74.Pp
75These potential new sources of unreliability are easily understandable
76when one recalls that the counter measures cycles and not
77.Dq time .
78Comparing the cycle counts only makes sense when the clock frequency
79is stable; to convert the cycle counts to time units, a general equation
80would be:
81.Dq seconds = cycles / frequency in Hz .
82The use of
83.Tn TSC
84as a source of high-resolution timing can be thus discouraged.
85But the basic premise is still guaranteed:
86.Tn TSC
87is a monotonically increasing counter.
88.Sh FUNCTIONS
89.Bl -tag -width abcd
90.It Fn rdtsc ""
91The
92.Fn rdtsc
93function returns the value read from
94.Dv RDTSC .
95.It Fn tsc_tc_init ""
96The
97.Fn tsc_tc_init
98function initializes the
99.Tn TSC
100as a
101.Xr timecounter 9 .
102The function is called early in the boot process when the processors attach.
103.It Fn tsc_sync_ap "ci"
104The
105.Fn tsc_sync_ap
106function synchronizes the counter for the boot processor
107.Pq Tn BP .
108The supplied
109.Fa ci
110must refer to the
111.Tn BP
112itself.
113The
114.Nm
115interface takes internally care of such issues as out-of-order execution,
116where instructions are not necessarily performed in the order of execution,
117possibly causing a misleading cycle count.
118.It Fn tsc_sync_bp "ci"
119The
120.Fn tsc_sync_bp
121function synchronize the counter for the application processor
122.Fa ci .
123Interrupts must be off at machine-level when the function is called.
124.Pp
125It is necessary to call both
126.Fn tsc_sync_ap
127and
128.Fn tsc_sync_bp
129during the boot, but additional synchronization
130may be required also during runtime.
131As an example, the
132.Tn TSC
133needs to be synchronized for all processors when the system resumes from an
134.Xr acpi 4
135sleep state.
136.It Fn tsc_sync_drift "drift"
137Finally, the
138.Fn tsc_sync_drift
139function records
140.Fa drift ,
141measured in clock cycles.
142This is called when the
143.Tn APs
144attach.
145.El
146.\"
147.\" Some references that are not worth adding to the actual page:
148.\"
149.\" http://lwn.net/Articles/209101/
150.\" http://lwn.net/Articles/388188/
151.\" http://lkml.org/lkml/2005/11/4/173
152.\" http://www.ccsl.carleton.ca/~jamuir/rdtscpm1.pdf
153.\"
154.Sh SEE ALSO
155.Xr gettimeofday 2 ,
156.Xr hpet 4 ,
157.Xr hz 9 ,
158.Xr rdmsr 9 ,
159.Xr timecounter 9
160