1.\" $NetBSD: tsc.9,v 1.3 2011/03/13 04:57:21 jruoho Exp $ 2.\" 3.\" Copyright (c) 2011 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Jukka Ruohonen. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.Dd March 13, 2011 31.Dt TSC 9 x86 32.Os 33.Sh NAME 34.Nm tsc 35.Nd Time Stamp Counter 36.Sh SYNOPSIS 37.In x86/x86/tsc.h 38.Ft void 39.Fn tsc_tc_init "void" 40.Ft void 41.Fn tsc_sync_ap "struct cpu_info *ci" 42.Ft void 43.Fn tsc_sync_bp "struct cpu_info *ci" 44.Ft void 45.Fn tsc_sync_drift "int64_t drift" 46.Sh DESCRIPTION 47The time stamp counter 48.Pq Tn TSC 49is a hardware counter found in all contemporary x86 processors. 50The counter is implemented as a 64-bit model-specific register 51.Pq Tn MSR 52that is incremented at every clock cycle. 53The 54.Tn RDTSC 55.Pq Dq read time stamp counter 56register has been present since the original Pentium. 57.Pp 58Already because of the access method, 59.Tn TSC 60has traditionally provided a low-overhead and high-resolution 61way to obtain 62.Tn CPU 63timing information. 64Recently, however, this reliability has been undermined by 65such factors as system sleep states, 66.Tn CPU 67.Dq hotplugging , 68.Dq hibernation , 69and 70.Tn CPU 71frequency scaling. 72.Pp 73These potential new sources of unreliability are easily understandable 74when one recalls that the counter measures cycles and not 75.Dq time . 76Comparing the cycle counts only makes sense when the clock frequency 77is stable; to convert the cycle counts to time units, a general equation 78would be: 79.Dq seconds = cycles / frequency in Hz . 80The use of 81.Tn TSC 82as a source of high-resolution timing can be thus discouraged. 83But the basic premise is still guaranteed: 84.Tn TSC 85is a monotonically increasing counter. 86.Sh FUNCTIONS 87.Bl -tag -width abcd 88.It Fn tsc_tc_init "" 89The 90.Fn tsc_tc_init 91function initializes the 92.Tn TSC 93as a 94.Xr timecounter 9 . 95The function is called early in the boot process when the processors attach. 96.It Fn tsc_sync_ap "ci" 97The 98.Fn tsc_sync_ap 99function synchronizes the counter for the boot processor 100.Pq Tn BP . 101The supplied 102.Fa ci 103must refer to the 104.Tn BP 105itself. 106The 107.Nm 108interface takes internally care of such issues as out-of-order execution, 109where instructions are not necessarily performed in the order of execution, 110possibly causing a misleading cycle count. 111.It Fn tsc_sync_bp "ci" 112The 113.Fn tsc_sync_bp 114function synchronize the counter for the application processor 115.Fa ci . 116Interrupts must be off at machine-level when the function is called. 117.Pp 118It is necessary to call both 119.Fn tsc_sync_ap 120and 121.Fn tsc_sync_bp 122during the boot, but additional synchronization 123may be required also during runtime. 124As an example, the 125.Tn TSC 126needs to be synchronized for all processors when the system resumes from an 127.Xr acpi 4 128sleep state. 129.It Fn tsc_sync_drift "drift" 130Finally, the 131.Fn tsc_sync_drift 132function records 133.Fa drift , 134measured in clock cycles. 135This is called when the 136.Tn APs 137attach. 138.El 139.\" 140.\" Some references that are not worth adding to the actual page: 141.\" 142.\" http://lwn.net/Articles/209101/ 143.\" http://lwn.net/Articles/388188/ 144.\" http://lkml.org/lkml/2005/11/4/173 145.\" http://www.ccsl.carleton.ca/~jamuir/rdtscpm1.pdf 146.\" 147.Sh SEE ALSO 148.Xr gettimeofday 2 , 149.Xr hpet 4 , 150.Xr hz 9 , 151.Xr timecounter 9 152