1.\" $NetBSD: wm.4,v 1.42 2021/02/17 08:15:43 knakahara Exp $ 2.\" 3.\" Copyright 2002, 2003 Wasabi Systems, Inc. 4.\" All rights reserved. 5.\" 6.\" Written by Jason R. Thorpe for Wasabi Systems, Inc. 7.\" 8.\" Redistribution and use in source and binary forms, with or without 9.\" modification, are permitted provided that the following conditions 10.\" are met: 11.\" 1. Redistributions of source code must retain the above copyright 12.\" notice, this list of conditions and the following disclaimer. 13.\" 2. Redistributions in binary form must reproduce the above copyright 14.\" notice, this list of conditions and the following disclaimer in the 15.\" documentation and/or other materials provided with the distribution. 16.\" 3. All advertising materials mentioning features or use of this software 17.\" must display the following acknowledgement: 18.\" This product includes software developed for the NetBSD Project by 19.\" Wasabi Systems, Inc. 20.\" 4. The name of Wasabi Systems, Inc. may not be used to endorse 21.\" or promote products derived from this software without specific prior 22.\" written permission. 23.\" 24.\" THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 25.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 28.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34.\" POSSIBILITY OF SUCH DAMAGE. 35.\" 36.Dd February 17, 2021 37.Dt WM 4 38.Os 39.Sh NAME 40.Nm wm 41.Nd Intel i8254x Gigabit Ethernet driver 42.Sh SYNOPSIS 43.Cd "wm* at pci? dev ? function ?" 44.Pp 45.Cd options WM_RX_PROCESS_LIMIT_DEFAULT 46.Cd options WM_RX_INTR_PROCESS_LIMIT_DEFAULT 47.Pp 48Configuration of PHYs may also be necessary. 49See 50.Xr mii 4 . 51.Sh DESCRIPTION 52The 53.Nm 54device driver supports Gigabit Ethernet interfaces based on the Intel 55i8254x family of Gigabit Ethernet chips. 56The interfaces supported by the 57.Nm 58driver include: 59.Bl -bullet 60.It 61Intel i82542 1000BASE-X Ethernet 62.It 63Intel i82543GC 1000BASE-X Ethernet 64.It 65Intel i82543GC 1000BASE-T Ethernet 66.It 67Intel i82544EI 1000BASE-T Ethernet 68.It 69Intel i82544EI 1000BASE-X Ethernet 70.It 71Intel i82544GC 1000BASE-T Ethernet 72.It 73Intel i82544GC (LOM) 1000BASE-T Ethernet 74.It 75Intel i82540EM 1000BASE-T Ethernet 76.It 77Intel i82540EM (LOM) 1000BASE-T Ethernet 78.It 79Intel i82540EP 1000BASE-T Ethernet 80.It 81Intel i82541EI 1000BASE-T Ethernet 82.It 83Intel i82541EI (Mobile) 1000BASE-T Ethernet 84.It 85Intel i82541ER 1000BASE-T Ethernet 86.It 87Intel i82541GI 1000BASE-T Ethernet 88.It 89Intel i82541PI 1000BASE-T Ethernet 90.It 91Intel i82545EM 1000BASE-T Ethernet 92.It 93Intel i82545EM 1000BASE-X Ethernet 94.It 95Intel i82545GB 1000BASE-T Ethernet 96.It 97Intel i82545GB 1000BASE-X Ethernet 98.It 99Intel i82545GM 1000BASE-T Ethernet 100.It 101Intel i82546EB 1000BASE-T Ethernet 102.Pq dual-port 103.It 104Intel i82546EB 1000BASE-X Ethernet 105.Pq dual-port 106.It 107Intel i82546GB 1000BASE-T Ethernet 108.Pq dual-port 109.It 110Intel i82546GB 1000BASE-X Ethernet 111.Pq dual-port 112.It 113Intel i82547EI 1000BASE-T Ethernet 114.Pq CSA 115.It 116Intel i82547GI 1000BASE-T Ethernet 117.Pq CSA 118.It 119Intel i82571 1000BASE-T Ethernet 120.Pq dual-port 121.It 122Intel i82572 1000BASE-T Ethernet 123.It 124Intel i82573 1000BASE-T Ethernet 125.It 126Intel i82575 1000BASE-T Ethernet 127.It 128Intel i82576 Ethernet (Copper, Fiber) 129.It 130Intel i80003 Ethernet (Copper, Fiber) 131.It 132Intel i82801H (ICH8 LAN) 1000BASE-T Ethernet 133.It 134Intel i82801I (ICH9 LAN) 1000BASE-T Ethernet 135.It 136Intel i82801J (ICH10 LAN) 1000BASE-T Ethernet 137.It 138Intel 82578 with Intel 5 series chipset (PCH) 139.It 140Intel 82579 with Intel 6 or 7 series chipset (PCH2) 141.It 142Intel 82580 Ethernet (Copper, Fiber) 143.It 144Intel 82583 1000BASE-T Ethernet 145.It 146Intel I350 Ethernet (Copper, Fiber) 147.It 148Intel I354 (C2000 Internal) Ethernet (Copper, Fiber) 149.It 150Intel I210 Ethernet (Copper, Fiber) 151.It 152Intel I211 Ethernet 153.It 154Intel I217 and I218 Ethernet 155.It 156Intel I219 Ethernet (with Intel [123]00 series chipset) 157.El 158.Pp 159In addition to Intel's own 160.Dq PRO/1000 161line of Gigabit Ethernet interfaces, these chips also appear on 162some server systems, processor evaluation boards, and in embedded 163systems. 164.Pp 165The i825[478]x supports IPv4/TCP/UDP checksumming and TCP segmentation 166in hardware. 167The 168.Nm 169driver supports these features of the chip. 170At least for some chips (e.g. I219) hardware TCP segmentation is slow, 171and slows down transmit performance when turned on. 172See 173.Xr ifconfig 8 174for information on how to enable this feature. 175.Pp 176Many chips supported by the 177.Nm 178driver support jumbo frames, however several chips do not support 179jumbo frames, e.g. i82542, i82081H and 82567V. 180Jumbo frames can be configured via the interface MTU setting. 181Selecting an MTU larger than 1500 bytes with the 182.Xr ifconfig 8 183utility configures the adapter to receive and transmit jumbo frames. 184.\" .Sh DIAGNOSTICS 185.\" XXX to be done. 186.Sh OPTIONS 187.Bl -tag -width WM_RX_INTR_PROCESS_LIMIT_DEFAULT -offset 3n 188.It Dv WM_RX_PROCESS_LIMIT_DEFAULT 189The maximum number of received packets processed in each 190.Xr softint 9 191context. 192This option only affects multiqueue. 193The value range is from zero to 194.Dv UINT_MAX . 195The default value is 100. 196When you increase this value, both the receive latency and 197the receive throughput will increase. 198.It Dv WM_TX_PROCESS_LIMIT_DEFAULT 199Transmit side of 200.Dv WM_RX_PROCESS_LIMIT_DEFAULT . 201.It Dv WM_RX_INTR_PROCESS_LIMIT_DEFAULT 202The maximum number of received packets processed in each 203hardware interrupt context. 204This option only affects multiqueue. 205The value range is from zero to 206.Dv UINT_MAX . 207The default value is 0. 208When you increase this value, both the receive latency and 209the receive throughput will decrease. 210.It Dv WM_TX_INTR_PROCESS_LIMIT_DEFAULT 211Transmit side of 212.Dv WM_RX_INTR_PROCESS_LIMIT_DEFAULT . 213.It Dv WM_EVENT_COUNTERS 214Enable many event counters such as each Tx drop counter and Rx interrupt 215counter. 216In 64 bit architectures, this is enabled by default. 217Caution: If this flag is enabled, the number of evcnt entries increase 218very much. 219.It Dv WM_DISABLE_EVENT_COUNTERS 220Disable event counters for 64 bit architectures. 221.It Dv WM_DISABLE_MSI 222If this option is set non-zero value, this driver does not use msi. 223The default value is 0. 224.It Dv WM_DISABLE_MSIX 225If this option is set non-zero value, this driver does not use msix. 226The default value is 0. 227.El 228.Pp 229Setting 230.Dv WM_RX_INTR_PROCESS_LIMIT_DEFAULT 231to zero means so-called polling mode, that is, once an interrupt occurs, 232the driver keep processing received packets until 233.Dv WM_RX_PROCESS_LIMIT_DEFAULT . 234Polling mode increases latency a little, however it suppresses 235performance degradation at high load very well. 236.Pp 237If you want to disable polling mode (to use traditional interrupt 238driven mode), you should set 239.Dv WM_RX_PROCESS_LIMIT_DEFAULT 240to zero and set 241.Dv WM_RX_INTR_PROCESS_LIMIT_DEFAULT 242to 243.Dv UINT_MAX . 244.Sh SEE ALSO 245.Xr arp 4 , 246.Xr ifmedia 4 , 247.Xr mii 4 , 248.Xr netintro 4 , 249.Xr pci 4 , 250.Xr ifconfig 8 251.Sh HISTORY 252The 253.Nm 254driver first appeared in 255.Nx 1.6 . 256.Sh AUTHORS 257The 258.Nm 259driver was written by 260.An Jason R. Thorpe Aq Mt thorpej@wasabisystems.com . 261.Sh BUGS 262EEE (Energy Efficiency Ethernet) is not currently supported. 263