1.\" $NetBSD: ntwoc.4,v 1.3 2001/09/22 01:39:13 wiz Exp $ 2.\" 3.\" Copyright (c) 2000 Christian E. Hopps 4.\" All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 3. The name of the author may not be used to endorse or promote products 15.\" derived from this software without specific prior written permission 16.\" 17.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27.\" 28.Dd October 2, 1998 29.Dt NTWOC 4 30.Os 31.Sh NAME 32.Nm ntwoc 33.Nd Riscom/N2, N2pci, WANic/400 synchronous serial interfaces 34.Sh SYNOPSIS 35.Cd "ntowc* at pci? dev ? function ? flags 0" 36.Cd "ntowc0 at isa? port 0x300 irq 5 iomem 0xc8000 flags 1" 37.Sh DESCRIPTION 38The 39.Nm 40device driver supports bit-synchronous serial communication using 41Cisco HDLC framing. The cards are capable of being driven by 42the line clock or from an internal baud rate generator. 43The devices all use the Hitachi hd64570 serial chip. 44The hd64570 supports 2 asynchronous/byte-synchronous/bit-synchronous 45serial ports, and has a 4-channel DMA controller for loading 46the serial port FIFOs. 47.Pp 48The isa Riscom/N2 card has a jumper block to set the irq and a DIP switch 49to set the port address the card will use. The values programmed 50into the card must be specified with the 51.Cm port 52and 53.Cm irq 54locators in the kernel configuration line. 55The 56.Cm iomem 57locator must be specified and must occur on a 16k boundary. 58The driver utilizes a 16k region of io memory. Bit 0 of the 59.Cm flags 60locator indicates if there is a second serial port available on the 61card. 62.Pp 63Currently 64clock source and speed information is specified with the 65.Cm flags 66locator in the kernel configuration file. The flags field has the 67following format. 68.Bd -literal 69 3 2 1 701 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 71+-------------+ +-----+ +-----+ + +---+ +-+ + +---+ +-+ + 72 tmc tdiv rdiv e1 rxs1 ts1 e0 rxs0 txs0 np(*) 73.Ed 74.Bl -tag -width "rxs0 rxs1" 75.It Va tmc 76Defines the timer constant. The base clock frequency is divided 77by 78.Va tmc 79to generate the main clock for receiving and sending. Further 80division is possible with the 81.Va tdiv 82and 83.Va rdiv 84divisor options. A value of 0 is treated as 256. 85.It Va tdiv 86Defines the transmit divisor as 87.Pf "2^(" Va tdiv ) . 88The internal transmit clock 89frequency is determined by dividing the base clock frequency by 90.Va tmc 91and then dividing by 92.Pf "2^(" Va tdiv ) . 93.It Va rdiv 94Defines the receive divisor as 95.Pf "2^(" Va rdiv ) . 96The internal receive clock 97frequency is determined by dividing the base clock frequency by 98.Va tmc 99and then dividing by 100.Pf "2^(" Va rdiv ) . 101.It Va e0 Va e1 102If true the internal clock source is used to drive the line clock for port 0 103or port 1 respectively. 104.It Va rxs0 Va rxs1 105Specifies which clock source to use for receiving data on port 0 and 106port 1 respectively. The following values are accepted: 107.Pp 108.Bl -tag -width "000" -compact 109.It 0 110Line clock. 111.It 1 112Line clock with noise suppression. 113.It 2 114Internal clock. 115.El 116.It Va txs0 Va txs1 117Specifies which clock source to use for transmitting data on port 0 118and port 1 respectively. The following values are accepted: 119.Pp 120.Bl -tag -width "000" -compact 121.It 0 122Line clock. 123.It 1 124Internal clock. 125.It 2 126Receive clock. 127.El 128.It Va np 129(For the isa card only) A value of 1 indicates there is a second serial 130port present on the card. This is auto-detected on the pci card and need 131not be specified. 132.El 133.Sh HARDWARE 134Cards supported by the 135.Nm 136driver include: 137.Pp 138.Bl -item -compact 139.It 140SDL Communications Riscom/N2 141.It 142SDL Communications N2pci 143.It 144SDL Communications WAN/ic 400 (untested) 145.El 146.Sh DIAGNOSTICS 147.Bl -diag 148.It "ntwo0: TXDMA underrun - fifo depth maxed" 149Indicates that the serial port's FIFO is being drained faster 150than DMA can fill it. The driver automatically increases the 151low-water mark at which to begin dma transfers when underruns 152occur. This diagnostic is issued when the low-water mark is 153maximized (i.e., 1 less than the depth of the FIFO). 154.It "ntwo0: RXDMA buffer overflow" 155Indicates that a frame is being received by the card, but 156there are no free receive buffers. 157.El 158.Sh SEE ALSO 159.Xr intro 4 , 160.Xr isa 4 , 161.Xr pci 4 , 162.Xr ifconfig 8 163.Sh HISTORY 164The pci driver first appeared in 165.Nx 1.4 . 166Much of the isa driver was adapted from the 167.Fx 168.Nm sr 169driver and first appeared in 170.Nx 1.5 . 171.Sh BUGS 172Use of the 173.Cm flags 174locator for setting the clock sources and speeds should be replaced with 175ioctl's and a control program. 176