1.\" $NetBSD: gpioirq.4,v 1.2 2018/05/20 12:08:46 wiz Exp $ 2.\" 3.\" Copyright (c) 2016 Brad Spencer <brad@anduin.eldar.org> 4.\" 5.\" Permission to use, copy, modify, and distribute this software for any 6.\" purpose with or without fee is hereby granted, provided that the above 7.\" copyright notice and this permission notice appear in all copies. 8.\" 9.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16.\" 17.Dd May 11, 2018 18.Dt GPIOIRQ 4 19.Os 20.Sh NAME 21.Nm gpioirq 22.Nd Install an interrupt handler on a GPIO pin 23.Sh SYNOPSIS 24.Cd "gpioirq* at gpio? offset 0 mask 0x1 flag 0x00" 25.Sh DESCRIPTION 26The 27.Nm 28driver attaches an interrupt handler to a single GPIO pin. 29.Pp 30The pin number is specified in the kernel configuration file with the 31.Ar offset 32locator. 33The 34.Ar mask 35locator should always be 0x1. 36.Pp 37The 38.Ar flag 39locator specifies the interrupt mode to use: 40.Bl -tag -width "XXXXXXXX" 41.It Dv 0x01 42Interrupt on the positive 43.Pq rising 44edge of the pin. 45.It Dv 0x02 46Interrupt on the negative 47.Pq falling 48edge of the pin. 49.It Dv 0x04 50Interrupt on both edges of the pin. 51.It Dv 0x08 52Assert the intrerrupt as long as the pin is high. 53.It Dv 0x10 54Assert the interrupt as long as the pin is low. 55.El 56.Pp 57Note that the interrupts modes are mutually-exclusive, and exactly one 58interrupt mode must be specified. 59These flags correspond to the 60.Dv GPIO_INTR 61mode bits defined in 62.Pa sys/gpio.h . 63In addition to the interrupt mode, setting 64.Dv 0x1000 65in 66.Ar flags 67will enable the printing of a message to the console whenever the 68interrupt handler is called. 69.Pp 70The 71.Ar offset , 72.Ar mask , 73and 74.Ar flag 75locators can also be specified when 76.Nm 77is attached at runtime using the 78.Dv GPIOATTACH 79.Xr ioctl 2 80on the 81.Xr gpio 4 82device. 83.Sh SEE ALSO 84.Xr gpio 4 , 85.Xr drvctl 8 , 86.Xr gpioctl 8 87.Sh HISTORY 88The 89.Nm 90driver first appeared in 91.Nx 9.0 . 92.Sh AUTHORS 93.An -nosplit 94The 95.Nm 96driver was written by 97.An Brad Spencer Aq Mt brad@anduin.eldar.org . 98