1.\" $NetBSD: ahc.4,v 1.29 2005/09/09 14:11:39 drochner Exp $ 2.\" 3.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 4.\" Justin T. Gibbs. All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 3. The name of the author may not be used to endorse or promote products 15.\" derived from this software without specific prior written permission. 16.\" 17.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27.\" 28.\" $FreeBSD: src/share/man/man4/ahc.4,v 1.22 2000/02/14 16:40:58 gibbs Exp $ 29.\" 30.Dd May 12, 2005 31.Dt AHC 4 32.Os 33.\".Os FreeBSD 34.Sh NAME 35.Nm ahc 36.Nd Adaptec VL/EISA/PCI/CardBus SCSI host adapter driver 37.Sh SYNOPSIS 38.ie 0 \{ 39For one or more VL/EISA cards: 40.Cd device eisa 41.Cd device ahc 42\} 43\{For VL cards: 44.Cd "ahc0 at isa? port ? irq ?" 45.Pp 46For EISA cards: 47.Cd "ahc* at eisa? slot ?"\} 48.Pp 49.ie 0 \{ 50For one or more PCI cards: 51.Cd device pci 52.Cd device ahc 53\} 54\{For PCI cards: 55.Cd "ahc* at pci? dev ? function ?" 56.Pp 57For CardBus cards: 58.Cd "ahc* at cardbus? function ?"\} 59.Pp 60To allow PCI adapters to use memory mapped I/O if enabled: 61.Cd options AHC_ALLOW_MEMIO 62.Pp 63Disable tagged queuing (avoids hangs on some hardware under load) 64.Cd options AHC_NO_TAGS 65.Pp 66Change the default SCSI id for cards without a SEEPROM (default 7): 67.Cd options AHC_CARDBUS_DEFAULT_SCSI_ID=integer 68.Pp 69.if 0 \{ 70To configure one or more controllers to assume the target role: 71.Cd options AHC_TMODE_ENABLE \*[Lt]bitmask of units\*[Gt] 72.Pp 73\} 74.ie 0 \{ 75For one or more SCSI buses: 76.Cd device scbus0 at ahc0 77\} 78\{For 79.Tn SCSI 80buses: 81.Cd scsibus* at ahc?\} 82.Sh DESCRIPTION 83.ie 0 \{ 84This driver provides access to the 85.Tn SCSI 86bus(es) connected to Adaptec 87.Tn AIC7770 , 88.Tn AIC7850 , 89.Tn AIC7860 , 90.Tn AIC7870 , 91.Tn AIC7880 , 92.Tn AIC7890 , 93.Tn AIC7891 , 94.Tn AIC7892 , 95.Tn AIC7895 , 96.Tn AIC7896 , 97.Tn AIC7897 98and 99.Tn AIC7899 100host adapter chips. 101These chips are found on many motherboards as well as the following 102Adaptec SCSI controller cards: 103.Tn 274X(W) , 104.Tn 274X(T) , 105.Tn 284X , 106.Tn 2910 , 107.Tn 2915 , 108.Tn 2920C , 109.Tn 2930C , 110.Tn 2930U2 , 111.Tn 2940 , 112.Tn 2940U , 113.Tn 2940AU , 114.Tn 2940UW , 115.Tn 2940UW Dual , 116.Tn 2940UW Pro , 117.Tn 2940U2W , 118.Tn 2940U2B , 119.Tn 2950U2W , 120.Tn 2950U2B , 121.Tn 19160B , 122.Tn 29160B , 123.Tn 29160N , 124.Tn 3940 , 125.Tn 3940U , 126.Tn 3940AU , 127.Tn 3940UW , 128.Tn 3940AUW , 129.Tn 3940U2W , 130.Tn 3950U2 , 131.Tn 3960 , 132.Tn 39160 , 133.Tn 3985 , 134and 135.Tn 4944UW . 136\} 137\{The 138.Nm 139device driver supports 140.Tn SCSI 141controllers based on 142.Tn Adaptec 143.Tn AIC77xx 144and 145.Tn AIC78xx 146.Tn SCSI 147host adapter chips found on many motherboards as well as 148.Tn Adaptec 149.Tn SCSI 150controller cards.\} 151.Pp 152Driver features include support for twin and wide buses, 153fast, ultra or ultra2 synchronous transfers depending on controller type, 154.ie 0 \{ 155tagged queuing, SCB paging, and target mode. 156\} 157\{ 158tagged queuing and SCB paging.\} 159.Pp 160Memory mapped I/O can be enabled for PCI devices with the 161.Dq Dv AHC_ALLOW_MEMIO 162configuration option. 163Memory mapped I/O is more efficient than the alternative, programmed I/O. 164Most PCI BIOSes will map devices so that either technique for communicating 165with the card is available. 166In some cases, 167usually when the PCI device is sitting behind a PCI-\*[Gt]PCI bridge, 168the BIOS may fail to properly initialize the chip for memory mapped I/O. 169The typical symptom of this problem is a system hang if memory mapped I/O 170is attempted. 171Most modern motherboards perform the initialization correctly and work fine 172with this option enabled. 173.Pp 174.if 0 \{ 175Individual controllers may be configured to operate in the target role 176through the 177.Dq Dv AHC_TMODE_ENABLE 178configuration option. The value assigned to this option should be a bitmap 179of all units where target mode is desired. 180For example, a value of 0x25, would enable target mode on units 0, 2, and 5. 181.Pp 182\} 183Per target configuration performed in the 184.Tn SCSI-Select 185menu, accessible at boot 186in 187.No non- Ns Tn EISA 188models, 189or through an 190.Tn EISA 191configuration utility for 192.Tn EISA 193models, 194is honored by this driver. 195This includes synchronous/asynchronous transfers, 196maximum synchronous negotiation rate, 197wide transfers, 198disconnection, 199the host adapter's SCSI ID, 200and, 201in the case of 202.Tn EISA 203Twin Channel controllers, 204the primary channel selection. 205For systems that store non-volatile settings in a system specific manner 206rather than a serial EEPROM directly connected to the aic7xxx controller, 207the 208.Tn BIOS 209must be enabled for the driver to access this information. 210This restriction applies to all 211.Tn EISA 212and many motherboard configurations. 213.Pp 214Note that I/O addresses are determined automatically by the probe routines, 215but care should be taken when using a 284x 216.Pq Tn VESA No local bus controller 217in an 218.Tn EISA 219system. The jumpers setting the I/O area for the 284x should match the 220.Tn EISA 221slot into which the card is inserted to prevent conflicts with other 222.Tn EISA 223cards. 224.Pp 225Performance and feature sets vary throughout the aic7xxx product line. 226The following table provides a comparison of the different chips supported 227by the 228.Nm 229driver. Note that wide and twin channel features, although always supported 230by a particular chip, may be disabled in a particular motherboard or card 231design. 232.Pp 233.Bd -filled -offset indent 234.Bl -column "aic7770 " "10 " "EISA/VL " "10MHz " "16bit " "SCBs " Features 235.Em "Chip MIPS Bus MaxSync MaxWidth SCBs Features" 236aic7770 10 EISA/VL 10MHz 16Bit 4 1 237aic7850 10 PCI/32 10MHz 8Bit 3 238aic7860 10 PCI/32 20MHz 8Bit 3 239aic7870 10 PCI/32 10MHz 16Bit 16 240aic7880 10 PCI/32 20MHz 16Bit 16 241aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8 242aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8 243aic7892 20 PCI/64 80MHz 16Bit 16 3 4 5 6 7 8 244aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5 245aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8 246aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8 247aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8 248aic7899 20 PCI/64 80MHz 16Bit 16 2 3 4 5 6 7 8 249.El 250.Bl -enum -compact 251.It 252Multiplexed Twin Channel Device - One controller servicing two buses. 253.It 254Multi-function Twin Channel Device - Two controllers on one chip. 255.It 256Command Channel Secondary DMA Engine - Allows scatter gather list and 257SCB prefetch. 258.It 25964 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 260.It 261Block Move Instruction Support - Doubles the speed of certain sequencer 262operations. 263.It 264.Sq Bayonet 265style Scatter Gather Engine - Improves S/G prefetch performance. 266.It 267Queuing Registers - Allows queuing of new transactions without pausing the 268sequencer. 269.It 270Multiple Target IDs - Allows the controller to respond to selection as a 271target on multiple SCSI IDs. 272.El 273.Ed 274.Sh HARDWARE 275Supported 276.Tn SCSI 277controllers include: 278.Pp 279.Bl -item -offset indent 280.It 281.Tn Adaptec AHA-2742W 282EISA Fast Wide SCSI adapter 283.It 284.Tn Adaptec AHA-274xAT 285EISA dual channel Fast SCSI adapter 286.It 287.Tn Adaptec AHA-284x 288VL Fast SCSI adapter 289.It 290.Tn Adaptec AHA-2910 291PCI Fast SCSI adapter (no SCSI BIOS) 292.It 293.Tn Adaptec AHA-2915 294PCI Fast SCSI adapter (no SCSI BIOS) 295.It 296.Tn Adaptec AHA-2920C 297PCI Fast SCSI adapter 298.Bl -item -offset indent 299.It 300Note: 301Adaptec AHA-2920/A which use the Future Domain's chips are not supported 302by this driver. 303.El 304.It 305.Tn Adaptec AHA-2930C 306PCI Ultra SCSI adapter 307.It 308.Tn Adaptec AHA-2930U2 309PCI Ultra2 Wide LVD SCSI adapter 310.It 311.Tn Adaptec AHA-2940 312PCI Fast SCSI adapter 313.It 314.Tn Adaptec AHA-2940U 315PCI Ultra SCSI adapter 316.It 317.Tn Adaptec AHA-2940AU 318PCI Ultra SCSI adapter 319.It 320.Tn Adaptec AHA-2940UW 321PCI Ultra Wide SCSI adapter 322.It 323.Tn Adaptec AHA-2940UW Dual 324PCI dual channel Ultra Wide SCSI adapter 325.It 326.Tn Adaptec AHA-2940UW Pro 327PCI Ultra Wide SCSI adapter 328.It 329.Tn Adaptec AHA-2940U2W 330PCI Ultra2 Wide LVD SCSI adapter 331.It 332.Tn Adaptec AHA-2940U2B 333PCI Ultra2 Wide LVD SCSI adapter 334.It 335.Tn Adaptec AHA-2944W 336PCI Fast Wide Differential SCSI adapter 337.It 338.Tn Adaptec AHA-2944UW 339PCI Ultra Wide Differential SCSI adapter 340.It 341.Tn Adaptec AHA-2950U2W 342.It 343.Tn Adaptec AHA-2950U2B 34464bit PCI Ultra2 Wide LVD SCSI adapter 345.It 346.Tn Adaptec AHA-19160B 347PCI Ultra160 Wide LVD SCSI adapter 348.It 349.Tn Adaptec AHA-29160N 350PCI Ultra160 Wide LVD SCSI adapter 351.It 352.Tn Adaptec AHA-29160B 35364bit PCI Ultra160 Wide LVD SCSI adapter 354.It 355.Tn Adaptec AHA-3940 356PCI dual channel Fast SCSI adapter 357.It 358.Tn Adaptec AHA-3940U 359PCI dual channel Ultra SCSI adapter 360.It 361.Tn Adaptec AHA-3940AU 362PCI dual channel Ultra SCSI adapter 363.It 364.Tn Adaptec AHA-3940UW 365PCI dual channel Ultra Wide SCSI adapter 366.It 367.Tn Adaptec AHA-3940AUW 368PCI dual channel Ultra Wide SCSI adapter 369.It 370.Tn Adaptec AHA-3940U2W 371PCI dual channel Ultra2 Wide LVD SCSI adapter 372.It 373.Tn Adaptec AHA-3950U2 37464bit PCI dual channel Ultra2 Wide LVD SCSI adapter 375.It 376.Tn Adaptec AHA-3960 37764bit PCI dual channel Ultra160 Wide LVD SCSI adapter 378.It 379.Tn Adaptec AHA-3985 380PCI dual channel Fast SCSI RAID adapter 381.It 382.Tn Adaptec AHA-39160 38364bit PCI dual channel Ultra160 Wide LVD SCSI adapter 384.It 385.Tn Adaptec AHA-4944UW 386PCI quad channel PCI Ultra Wide Differential SCSI adapter 387.It 388Other SCSI controllers based on the 389.Tn Adaptec 390.Tn AIC7770 , 391.Tn AIC7850 , 392.Tn AIC7860 , 393.Tn AIC7870 , 394.Tn AIC7880 , 395.Tn AIC7890 , 396.Tn AIC7891 , 397.Tn AIC7892 , 398.Tn AIC7895 , 399.Tn AIC7896 , 400.Tn AIC7897 401and 402.Tn AIC7899 403.Tn SCSI 404host adapter chips. 405.El 406.Sh SCSI CONTROL BLOCKS (SCBs) 407Every transaction sent to a device on the SCSI bus is assigned a 408.Sq SCSI Control Block 409(SCB). The SCB contains all of the information required by the 410controller to process a transaction. The chip feature table lists 411the number of SCBs that can be stored in on-chip memory. All chips 412with model numbers greater than or equal to 7870 allow for the on chip 413SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 414Very few Adaptec controller configurations have external SRAM. 415.Pp 416If external SRAM is not available, SCBs are a limited resource. 417Using the SCBs in a straight forward manner would only allow the driver to 418handle as many concurrent transactions as there are physical SCBs. 419To fully use the SCSI bus and the devices on it, 420requires much more concurrency. 421The solution to this problem is 422.Em SCB Paging , 423a concept similar to memory paging. SCB paging takes advantage of 424the fact that devices usually disconnect from the SCSI bus for long 425periods of time without talking to the controller. The SCBs 426for disconnected transactions are only of use to the controller 427when the transfer is resumed. When the host queues another transaction 428for the controller to execute, the controller firmware will use a 429free SCB if one is available. Otherwise, the state of the most recently 430disconnected (and therefor most likely to stay disconnected) SCB is 431saved, via DMA, to host memory, and the local SCB reused to start 432the new transaction. This allows the controller to queue up to 433255 transactions regardless of the amount of SCB space. Since the 434local SCB space serves as a cache for disconnected transactions, the 435more SCB space available, the less host bus traffic consumed saving 436and restoring SCB data. 437.Sh SEE ALSO 438.Xr aha 4 , 439.Xr ahb 4 , 440.Xr ahd 4 , 441.Xr cd 4 , 442.Xr ch 4 , 443.Xr intro 4 , 444.Xr scsi 4 , 445.Xr sd 4 , 446.Xr st 4 447.Sh HISTORY 448The 449.Nm 450driver appeared in 451.Fx 2.0 452and 453.Nx 1.1 . 454.Sh AUTHORS 455The 456.Nm 457driver, the 458.Tn AIC7xxx 459sequencer-code assembler, 460and the firmware running on the aic7xxx chips was written by 461.An Justin T. Gibbs . 462.Nx 463porting is done by Stefan Grefen, Charles M. Hannum, 464Michael Graff, Jason R. Thorpe, Pete Bentley, 465Frank van der Linden and Noriyuki Soda. 466.Sh BUGS 467Some 468.Tn Quantum 469drives (at least the Empire 2100 and 1080s) will not run on an 470.Tn AIC7870 471Rev B in synchronous mode at 10MHz. Controllers with this problem have a 47242 MHz clock crystal on them and run slightly above 10MHz. This confuses 473the drive and hangs the bus. Setting a maximum synchronous negotiation rate 474of 8MHz in the 475.Tn SCSI-Select 476utility will allow normal operation. 477.Pp 478Double Transition clocking is not yet supported for Ultra160 controllers. 479This limits these controllers to 40MHz or 80MB/s. 480.Pp 481.ie 0 \{ 482Although the Ultra2 and Ultra160 products have sufficient instruction 483ram space to support both the initiator and target roles concurrently, 484this configuration is disabled in favor of allowing the target role 485to respond on multiple target ids. A method for configuring dual 486role mode should be provided. 487.Pp 488Tagged Queuing is not supported in target mode. 489.Pp 490Reselection in target mode fails to function correctly on all high 491voltage differential boards as shipped by Adaptec. Information on 492how to modify HVD board to work correctly in target mode is available 493from Adaptec. 494\} 495\{Target mode is not supported on 496.Nx 497version of this driver.\} 498