1.\" $NetBSD: ahc.4,v 1.31 2007/07/16 14:06:07 gdt Exp $ 2.\" 3.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 4.\" Justin T. Gibbs. All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 3. The name of the author may not be used to endorse or promote products 15.\" derived from this software without specific prior written permission. 16.\" 17.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27.\" 28.\" $FreeBSD: src/share/man/man4/ahc.4,v 1.22 2000/02/14 16:40:58 gibbs Exp $ 29.\" 30.Dd July 16, 2007 31.Dt AHC 4 32.Os 33.\".Os FreeBSD 34.Sh NAME 35.Nm ahc 36.Nd Adaptec VL/EISA/PCI/CardBus SCSI host adapter driver 37.Sh SYNOPSIS 38.ie 0 \{ 39For one or more VL/EISA cards: 40.Cd device eisa 41.Cd device ahc 42\} 43\{For VL cards: 44.Cd "ahc0 at isa? port ? irq ?" 45.Pp 46For EISA cards: 47.Cd "ahc* at eisa? slot ?"\} 48.Pp 49.ie 0 \{ 50For one or more PCI cards: 51.Cd device pci 52.Cd device ahc 53\} 54\{For PCI cards: 55.Cd "ahc* at pci? dev ? function ?" 56.Pp 57For CardBus cards: 58.Cd "ahc* at cardbus? function ?"\} 59.Pp 60To allow PCI adapters to use memory mapped I/O if enabled: 61.Cd options AHC_ALLOW_MEMIO 62.Pp 63Disable tagged queuing (avoids hangs on some hardware under load) 64.Cd options AHC_NO_TAGS 65.Pp 66Change the default SCSI id for cards without a SEEPROM (default 7): 67.Cd options AHC_CARDBUS_DEFAULT_SCSI_ID=integer 68.Pp 69.if 0 \{ 70To configure one or more controllers to assume the target role: 71.Cd options AHC_TMODE_ENABLE \*[Lt]bitmask of units\*[Gt] 72.Pp 73\} 74.ie 0 \{ 75For one or more SCSI buses: 76.Cd device scbus0 at ahc0 77\} 78\{For 79.Tn SCSI 80buses: 81.Cd scsibus* at ahc?\} 82.Sh DESCRIPTION 83.ie 0 \{ 84This driver provides access to the 85.Tn SCSI 86bus(es) connected to Adaptec 87.Tn AIC7770 , 88.Tn AIC7850 , 89.Tn AIC7860 , 90.Tn AIC7870 , 91.Tn AIC7880 , 92.Tn AIC7890 , 93.Tn AIC7891 , 94.Tn AIC7892 , 95.Tn AIC7895 , 96.Tn AIC7896 , 97.Tn AIC7897 98and 99.Tn AIC7899 100host adapter chips. 101These chips are found on many motherboards as well as the following 102Adaptec SCSI controller cards: 103.Tn 274X(W) , 104.Tn 274X(T) , 105.Tn 284X , 106.Tn 2910 , 107.Tn 2915 , 108.Tn 2920C , 109.Tn 2930C , 110.Tn 2930U2 , 111.Tn 2940 , 112.Tn 2940U , 113.Tn 2940AU , 114.Tn 2940UW , 115.Tn 2940UW Dual , 116.Tn 2940UW Pro , 117.Tn 2940U2W , 118.Tn 2940U2B , 119.Tn 2950U2W , 120.Tn 2950U2B , 121.Tn 19160B , 122.Tn 29160 , 123.Tn 29160B , 124.Tn 29160N , 125.Tn 3940 , 126.Tn 3940U , 127.Tn 3940AU , 128.Tn 3940UW , 129.Tn 3940AUW , 130.Tn 3940U2W , 131.Tn 3950U2 , 132.Tn 3960 , 133.Tn 39160 , 134.Tn 3985 , 135and 136.Tn 4944UW . 137\} 138\{The 139.Nm 140device driver supports 141.Tn SCSI 142controllers based on 143.Tn Adaptec 144.Tn AIC77xx 145and 146.Tn AIC78xx 147.Tn SCSI 148host adapter chips found on many motherboards as well as 149.Tn Adaptec 150.Tn SCSI 151controller cards.\} 152.Pp 153Driver features include support for twin and wide buses, 154fast, ultra or ultra2 synchronous transfers depending on controller type, 155.ie 0 \{ 156tagged queuing, SCB paging, and target mode. 157\} 158\{ 159tagged queuing and SCB paging.\} 160.Pp 161Memory mapped I/O can be enabled for PCI devices with the 162.Dq Dv AHC_ALLOW_MEMIO 163configuration option. 164Memory mapped I/O is more efficient than the alternative, programmed I/O. 165Most PCI BIOSes will map devices so that either technique for communicating 166with the card is available. 167In some cases, 168usually when the PCI device is sitting behind a PCI-\*[Gt]PCI bridge, 169the BIOS may fail to properly initialize the chip for memory mapped I/O. 170The typical symptom of this problem is a system hang if memory mapped I/O 171is attempted. 172Most modern motherboards perform the initialization correctly and work fine 173with this option enabled. 174.Pp 175.if 0 \{ 176Individual controllers may be configured to operate in the target role 177through the 178.Dq Dv AHC_TMODE_ENABLE 179configuration option. The value assigned to this option should be a bitmap 180of all units where target mode is desired. 181For example, a value of 0x25, would enable target mode on units 0, 2, and 5. 182.Pp 183\} 184Per target configuration performed in the 185.Tn SCSI-Select 186menu, accessible at boot 187in 188.No non- Ns Tn EISA 189models, 190or through an 191.Tn EISA 192configuration utility for 193.Tn EISA 194models, 195is honored by this driver. 196This includes synchronous/asynchronous transfers, 197maximum synchronous negotiation rate, 198wide transfers, 199disconnection, 200the host adapter's SCSI ID, 201and, 202in the case of 203.Tn EISA 204Twin Channel controllers, 205the primary channel selection. 206For systems that store non-volatile settings in a system specific manner 207rather than a serial EEPROM directly connected to the aic7xxx controller, 208the 209.Tn BIOS 210must be enabled for the driver to access this information. 211This restriction applies to all 212.Tn EISA 213and many motherboard configurations. 214.Pp 215Note that I/O addresses are determined automatically by the probe routines, 216but care should be taken when using a 284x 217.Pq Tn VESA No local bus controller 218in an 219.Tn EISA 220system. The jumpers setting the I/O area for the 284x should match the 221.Tn EISA 222slot into which the card is inserted to prevent conflicts with other 223.Tn EISA 224cards. 225.Pp 226Performance and feature sets vary throughout the aic7xxx product line. 227The following table provides a comparison of the different chips supported 228by the 229.Nm 230driver. Note that wide and twin channel features, although always supported 231by a particular chip, may be disabled in a particular motherboard or card 232design. 233.Pp 234.Bd -filled -offset indent 235.Bl -column "aic7770 " "10 " "EISA/VL " "10MHz " "16bit " "SCBs " Features 236.Em "Chip MIPS Bus MaxSync MaxWidth SCBs Features" 237aic7770 10 EISA/VL 10MHz 16Bit 4 1 238aic7850 10 PCI/32 10MHz 8Bit 3 239aic7860 10 PCI/32 20MHz 8Bit 3 240aic7870 10 PCI/32 10MHz 16Bit 16 241aic7880 10 PCI/32 20MHz 16Bit 16 242aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8 243aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8 244aic7892 20 PCI/64 80MHz 16Bit 16 3 4 5 6 7 8 245aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5 246aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8 247aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8 248aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8 249aic7899 20 PCI/64 80MHz 16Bit 16 2 3 4 5 6 7 8 250.El 251.Bl -enum -compact 252.It 253Multiplexed Twin Channel Device - One controller servicing two buses. 254.It 255Multi-function Twin Channel Device - Two controllers on one chip. 256.It 257Command Channel Secondary DMA Engine - Allows scatter gather list and 258SCB prefetch. 259.It 26064 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 261.It 262Block Move Instruction Support - Doubles the speed of certain sequencer 263operations. 264.It 265.Sq Bayonet 266style Scatter Gather Engine - Improves S/G prefetch performance. 267.It 268Queuing Registers - Allows queuing of new transactions without pausing the 269sequencer. 270.It 271Multiple Target IDs - Allows the controller to respond to selection as a 272target on multiple SCSI IDs. 273.El 274.Ed 275.Sh HARDWARE 276Supported 277.Tn SCSI 278controllers include: 279.Pp 280.Bl -item -offset indent 281.It 282.Tn Adaptec AHA-2742W 283EISA Fast Wide SCSI adapter 284.It 285.Tn Adaptec AHA-274xAT 286EISA dual channel Fast SCSI adapter 287.It 288.Tn Adaptec AHA-284x 289VL Fast SCSI adapter 290.It 291.Tn Adaptec AHA-2910 292PCI Fast SCSI adapter (no SCSI BIOS) 293.It 294.Tn Adaptec AHA-2915 295PCI Fast SCSI adapter (no SCSI BIOS) 296.It 297.Tn Adaptec AHA-2920C 298PCI Fast SCSI adapter 299.Bl -item -offset indent 300.It 301Note: 302Adaptec AHA-2920/A which use the Future Domain's chips are not supported 303by this driver. 304.El 305.It 306.Tn Adaptec AHA-2930C 307PCI Ultra SCSI adapter 308.It 309.Tn Adaptec AHA-2930U2 310PCI Ultra2 Wide LVD SCSI adapter 311.It 312.Tn Adaptec AHA-2940 313PCI Fast SCSI adapter 314.It 315.Tn Adaptec AHA-2940U 316PCI Ultra SCSI adapter 317.It 318.Tn Adaptec AHA-2940AU 319PCI Ultra SCSI adapter 320.It 321.Tn Adaptec AHA-2940UW 322PCI Ultra Wide SCSI adapter 323.It 324.Tn Adaptec AHA-2940UW Dual 325PCI dual channel Ultra Wide SCSI adapter 326.It 327.Tn Adaptec AHA-2940UW Pro 328PCI Ultra Wide SCSI adapter 329.It 330.Tn Adaptec AHA-2940U2W 331PCI Ultra2 Wide LVD SCSI adapter 332.It 333.Tn Adaptec AHA-2940U2B 334PCI Ultra2 Wide LVD SCSI adapter 335.It 336.Tn Adaptec AHA-2944W 337PCI Fast Wide Differential SCSI adapter 338.It 339.Tn Adaptec AHA-2944UW 340PCI Ultra Wide Differential SCSI adapter 341.It 342.Tn Adaptec AHA-2950U2W 343.It 344.Tn Adaptec AHA-2950U2B 34564bit PCI Ultra2 Wide LVD SCSI adapter 346.It 347.Tn Adaptec AHA-19160B 348PCI Ultra160 Wide LVD SCSI adapter 349.It 350.Tn Adaptec ASC-29160 351PCI Ultra160 Wide LVD SCSI adapter 352.It 353.Tn Adaptec AHA-29160N 354PCI Ultra160 Wide LVD SCSI adapter 355.It 356.Tn Adaptec AHA-29160B 35764bit PCI Ultra160 Wide LVD SCSI adapter 358.It 359.Tn Adaptec AHA-3940 360PCI dual channel Fast SCSI adapter 361.It 362.Tn Adaptec AHA-3940U 363PCI dual channel Ultra SCSI adapter 364.It 365.Tn Adaptec AHA-3940AU 366PCI dual channel Ultra SCSI adapter 367.It 368.Tn Adaptec AHA-3940UW 369PCI dual channel Ultra Wide SCSI adapter 370.It 371.Tn Adaptec AHA-3940AUW 372PCI dual channel Ultra Wide SCSI adapter 373.It 374.Tn Adaptec AHA-3940U2W 375PCI dual channel Ultra2 Wide LVD SCSI adapter 376.It 377.Tn Adaptec AHA-3950U2 37864bit PCI dual channel Ultra2 Wide LVD SCSI adapter 379.It 380.Tn Adaptec AHA-3960 38164bit PCI dual channel Ultra160 Wide LVD SCSI adapter 382.It 383.Tn Adaptec AHA-3985 384PCI dual channel Fast SCSI RAID adapter 385.It 386.Tn Adaptec AHA-39160 38764bit PCI dual channel Ultra160 Wide LVD SCSI adapter 388.It 389.Tn Adaptec AHA-4944UW 390PCI quad channel PCI Ultra Wide Differential SCSI adapter 391.It 392Other SCSI controllers based on the 393.Tn Adaptec 394.Tn AIC7770 , 395.Tn AIC7850 , 396.Tn AIC7860 , 397.Tn AIC7870 , 398.Tn AIC7880 , 399.Tn AIC7890 , 400.Tn AIC7891 , 401.Tn AIC7892 , 402.Tn AIC7895 , 403.Tn AIC7896 , 404.Tn AIC7897 405and 406.Tn AIC7899 407.Tn SCSI 408host adapter chips. 409.El 410.Sh SCSI CONTROL BLOCKS (SCBs) 411Every transaction sent to a device on the SCSI bus is assigned a 412.Sq SCSI Control Block 413(SCB). The SCB contains all of the information required by the 414controller to process a transaction. The chip feature table lists 415the number of SCBs that can be stored in on-chip memory. All chips 416with model numbers greater than or equal to 7870 allow for the on chip 417SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 418Very few Adaptec controller configurations have external SRAM. 419.Pp 420If external SRAM is not available, SCBs are a limited resource. 421Using the SCBs in a straight forward manner would only allow the driver to 422handle as many concurrent transactions as there are physical SCBs. 423To fully use the SCSI bus and the devices on it, 424requires much more concurrency. 425The solution to this problem is 426.Em SCB Paging , 427a concept similar to memory paging. SCB paging takes advantage of 428the fact that devices usually disconnect from the SCSI bus for long 429periods of time without talking to the controller. The SCBs 430for disconnected transactions are only of use to the controller 431when the transfer is resumed. When the host queues another transaction 432for the controller to execute, the controller firmware will use a 433free SCB if one is available. Otherwise, the state of the most recently 434disconnected (and therefor most likely to stay disconnected) SCB is 435saved, via DMA, to host memory, and the local SCB reused to start 436the new transaction. This allows the controller to queue up to 437255 transactions regardless of the amount of SCB space. Since the 438local SCB space serves as a cache for disconnected transactions, the 439more SCB space available, the less host bus traffic consumed saving 440and restoring SCB data. 441.Sh SEE ALSO 442.Xr aha 4 , 443.Xr ahb 4 , 444.Xr ahd 4 , 445.Xr cd 4 , 446.Xr ch 4 , 447.Xr intro 4 , 448.Xr scsi 4 , 449.Xr sd 4 , 450.Xr st 4 451.Sh HISTORY 452The 453.Nm 454driver appeared in 455.Fx 2.0 456and 457.Nx 1.1 . 458.Sh AUTHORS 459The 460.Nm 461driver, the 462.Tn AIC7xxx 463sequencer-code assembler, 464and the firmware running on the aic7xxx chips was written by 465.An Justin T. Gibbs . 466.Nx 467porting is done by Stefan Grefen, Charles M. Hannum, 468Michael Graff, Jason R. Thorpe, Pete Bentley, 469Frank van der Linden and Noriyuki Soda. 470.Sh BUGS 471Some 472.Tn Quantum 473drives (at least the Empire 2100 and 1080s) will not run on an 474.Tn AIC7870 475Rev B in synchronous mode at 10MHz. Controllers with this problem have a 47642 MHz clock crystal on them and run slightly above 10MHz. This confuses 477the drive and hangs the bus. Setting a maximum synchronous negotiation rate 478of 8MHz in the 479.Tn SCSI-Select 480utility will allow normal operation. 481.Pp 482.ie 0 \{ 483Although the Ultra2 and Ultra160 products have sufficient instruction 484ram space to support both the initiator and target roles concurrently, 485this configuration is disabled in favor of allowing the target role 486to respond on multiple target ids. A method for configuring dual 487role mode should be provided. 488.Pp 489Tagged Queuing is not supported in target mode. 490.Pp 491Reselection in target mode fails to function correctly on all high 492voltage differential boards as shipped by Adaptec. Information on 493how to modify HVD board to work correctly in target mode is available 494from Adaptec. 495\} 496\{Target mode is not supported on 497.Nx 498version of this driver.\} 499