1 /* $NetBSD: nvme.h,v 1.1 2016/06/04 16:29:35 nonaka Exp $ */ 2 3 /*- 4 * Copyright (C) 2012-2013 Intel Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/nvme/nvme.h 296617 2016-03-10 17:13:10Z mav $ 29 */ 30 31 #ifndef __NVME_H__ 32 #define __NVME_H__ 33 34 #define NVME_MAX_XFER_SIZE MAXPHYS 35 36 /* Get/Set Features */ 37 #define NVME_FEAT_ARBITRATION 0x01 38 #define NVME_FEAT_POWER_MANAGEMENT 0x02 39 #define NVME_FEAT_LBA_RANGE_TYPE 0x03 40 #define NVME_FEAT_TEMPERATURE_THRESHOLD 0x04 41 #define NVME_FEAT_ERROR_RECOVERY 0x05 42 #define NVME_FEAT_VOLATILE_WRITE_CACHE 0x06 43 #define NVME_FEAT_NUMBER_OF_QUEUES 0x07 44 #define NVME_FEAT_INTERRUPT_COALESCING 0x08 45 #define NVME_FEAT_INTERRUPT_VECTOR_CONFIGURATION 0x09 46 #define NVME_FEAT_WRITE_ATOMICITY_NORMAL 0x0a 47 #define NVME_FEAT_ASYNC_EVENT_CONFIGURATION 0x0b 48 #define NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION 0x0c 49 #define NVME_FEAT_HOST_MEMORY_BUFFER 0x0d 50 /* NVM Command Set specific */ 51 #define NVME_FEAT_SOFTWARE_PROGRESS_MARKER 0x80 52 #define NVME_FEAT_HOST_IDENTIFIER 0x81 53 #define NVME_FEAT_RESERVATION_NOTIFICATION_MASK 0x82 54 #define NVME_FEAT_RESERVATION_PERSISTANCE 0x83 55 56 /* Get Log Page */ 57 #define NVME_LOG_ERROR 0x01 58 #define NVME_LOG_HEALTH_INFORMATION 0x02 59 #define NVME_LOG_FIRMWARE_SLOT 0x03 60 #define NVME_LOG_CHANGED_NAMESPACE_LIST 0x04 61 #define NVME_LOG_COMMAND_EFFECTS_LOG 0x05 62 #define NVME_LOG_RESERVATION_NOTIFICATION 0x80 63 64 /* Error Information Log (Log Identifier 01h) */ 65 struct nvme_error_information_entry { 66 uint64_t error_count; 67 uint16_t sqid; 68 uint16_t cid; 69 uint16_t status; 70 uint16_t error_location; 71 uint64_t lba; 72 uint32_t nsid; 73 uint8_t vendor_specific; 74 uint8_t _reserved1[3]; 75 uint64_t command_specific; 76 uint8_t reserved[24]; 77 } __packed __aligned(4); 78 79 /* SMART / Health Information Log (Log Identifier 02h) */ 80 struct nvme_health_information_page { 81 uint8_t critical_warning; 82 #define NVME_HEALTH_PAGE_CW_VOLATILE_MEMORY_BACKUP __BIT(4) 83 #define NVME_HEALTH_PAGE_CW_READ_ONLY __BIT(3) 84 #define NVME_HEALTH_PAGE_CW_DEVICE_RELIABLITY __BIT(2) 85 #define NVME_HEALTH_PAGE_CW_TEMPERTURE __BIT(1) 86 #define NVME_HEALTH_PAGE_CW_AVAIL_SPARE __BIT(0) 87 uint16_t composite_temperature; 88 uint8_t available_spare; 89 uint8_t available_spare_threshold; 90 uint8_t percentage_used; 91 92 uint8_t _reserved1[26]; 93 94 uint64_t data_units_read[2]; 95 uint64_t data_units_written[2]; 96 uint64_t host_read_commands[2]; 97 uint64_t host_write_commands[2]; 98 uint64_t controller_busy_time[2]; 99 uint64_t power_cycles[2]; 100 uint64_t power_on_hours[2]; 101 uint64_t unsafe_shutdowns[2]; 102 uint64_t media_errors[2]; 103 uint64_t num_error_info_log_entries[2]; 104 uint32_t warning_composite_temperature_time; 105 uint32_t critical_composite_temperature_time; 106 uint16_t temperature_sensor[8]; 107 108 uint8_t reserved[296]; 109 } __packed __aligned(4); 110 111 /* Firmware Commit */ 112 #define NVME_COMMIT_ACTION_REPLACE_NO_ACTIVATE 0 113 #define NVME_COMMIT_ACTION_REPLACE_ACTIVATE 1 114 #define NVME_COMMIT_ACTION_ACTIVATE_RESET 2 115 #define NVME_COMMIT_ACTION_ACTIVATE_NO_RESET 3 116 117 /* Firmware Slot Information (Log Identifier 03h) */ 118 struct nvme_firmware_page { 119 uint8_t afi; 120 #define NVME_FW_PAGE_AFI_SLOT_RST __BITS(4, 6) 121 #define NVME_FW_PAGE_AFI_SLOT __BITS(0, 2) 122 uint8_t _reserved1[7]; 123 124 uint64_t revision[7]; /* revisions for 7 slots */ 125 126 uint8_t reserved[448]; 127 } __packed __aligned(4); 128 129 /* Commands Supported and Effects (Log Identifier 05h) */ 130 struct nvme_command_effeects_page { 131 uint32_t acs[256]; 132 #define NVME_CE_PAGE_CS_CSE __BITS(16, 18) 133 #define NVME_CE_PAGE_CS_CCC __BIT(4) 134 #define NVME_CE_PAGE_CS_NIC __BIT(3) 135 #define NVME_CE_PAGE_CS_NCC __BIT(2) 136 #define NVME_CE_PAGE_CS_LBCC __BIT(1) 137 #define NVME_CE_PAGE_CS_CSUPP __BIT(0) 138 uint32_t iocs[256]; 139 140 uint8_t reserved[2048]; 141 } __packed __aligned(4); 142 143 #endif /* __NVME_H__ */ 144