xref: /netbsd-src/lib/libpthread/arch/arm/pthread_md.h (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: pthread_md.h,v 1.3 2003/01/18 18:40:08 christos Exp $	*/
2 
3 /*
4  * Copyright (c) 2001 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef _LIB_PTHREAD_ARM_MD_H
39 #define	_LIB_PTHREAD_ARM_MD_H
40 
41 static __inline long
42 pthread__sp(void)
43 {
44 	long ret;
45 
46 	__asm __volatile("mov %0, sp"
47 		: "=r" (ret));
48 
49 	return (ret);
50 }
51 
52 #define	pthread__uc_sp(ucp)	((ucp)->uc_mcontext.__gregs[_REG_SP])
53 #define	pthread__uc_pc(ucp)	((ucp)->uc_mcontext.__gregs[_REG_PC])
54 
55 /*
56  * Set initial, sane values for registers whose values aren't just
57  * "don't care".
58  */
59 #ifdef __APCS_26__
60 #define _INITCONTEXT_U_MD(ucp)						\
61 /* Set R15_MODE_USR in the PC */					\
62 	(ucp)->uc_mcontext.__gregs[_REG_PC] =				\
63 	 ((ucp)->uc_mcontext.__gregs[_REG_PC] & 0x3fffffc) | 0x0;
64 #else
65 /* Set CPSR to PSR_USE32_MODE (0x10) from arm/armreg.h */
66 #define _INITCONTEXT_U_MD(ucp)						\
67 	(ucp)->uc_mcontext.__gregs[_REG_CPSR] = 0x10;
68 #endif
69 
70 /*
71  * Usable stack space below the ucontext_t.
72  *    For a good time, see comments in pthread_switch.S and
73  *    ../i386/pthread_switch.S about STACK_SWITCH.
74  */
75 #define	STACKSPACE		(6 * sizeof(long))
76 
77 /*
78  * Conversions between struct reg and struct mcontext.  Used by
79  * libpthread_dbg.
80  */
81 
82 #define	PTHREAD_ARM_UCONTEXT_TO_REG(reg, uc)				\
83 do {									\
84 	int _reg_;							\
85 									\
86 	for (_reg_ = 0; _reg_ <= 12; _reg_++)				\
87 		(reg)->r[_reg_] =					\
88 		    (uc)->uc_mcontext.__gregs[_REG_R0 + _reg_];		\
89 	(reg)->r_sp = (uc)->uc_mcontext.__gregs[_REG_SP];		\
90 	(reg)->r_lr = (uc)->uc_mcontext.__gregs[_REG_LR];		\
91 	(reg)->r_pc = (uc)->uc_mcontext.__gregs[_REG_PC];		\
92 	(reg)->r_cpsr = (uc)->uc_mcontext.__gregs[_REG_CPSR];		\
93 } while (/*CONSTCOND*/0)
94 
95 #ifdef __APCS_26__
96 #define PTHREAD_UCONTEXT_TO_REG(reg, uc) PTHREAD_ARM_UCONTEXT_TO_REG((reg), (uc))
97 #else
98 /* Need to signal in the CPSR that this is 32-bit ARM */
99 #define PTHREAD_UCONTEXT_TO_REG(reg, uc)				\
100 do {									\
101 	PTHREAD_ARM_UCONTEXT_TO_REG((reg), (uc));			\
102 	if ((uc)->uc_flags & _UC_USER)					\
103 		(reg)->r_cpsr = 0x10;					\
104 } while (/*CONSTCOND*/0)
105 #endif
106 
107 
108 #define	PTHREAD_REG_TO_UCONTEXT(uc, reg)				\
109 do {									\
110 	int _reg_;							\
111 									\
112 	for (_reg_ = 0; _reg_ <= 12; _reg_++)				\
113 		(uc)->uc_mcontext.__gregs[_REG_R0 + _reg_] =		\
114 		    (reg)->r[_reg_];					\
115 	(uc)->uc_mcontext.__gregs[_REG_SP] = (reg)->r_sp;		\
116 	(uc)->uc_mcontext.__gregs[_REG_LR] = (reg)->r_lr;		\
117 	(uc)->uc_mcontext.__gregs[_REG_PC] = (reg)->r_pc;		\
118 	(uc)->uc_mcontext.__gregs[_REG_CPSR] = (reg)->r_cpsr;		\
119 } while (/*CONSTCOND*/0)
120 
121 /*
122  * XXX Need to deal with VFP.
123  */
124 #define	PTHREAD_UCONTEXT_TO_FPREG(freg, uc)				\
125 do {									\
126 	(freg)->fpr_fpsr = (uc)->uc_mcontext.__fpu.__fpregs.__fp_fpsr;	\
127 	memcpy((freg)->fpr, (uc)->uc_mcontext.__fpu.__fpregs.__fp_fr,	\
128 	    sizeof((freg)->fpr));					\
129 } while (/*CONSTCOND*/0)
130 
131 #define	PTHREAD_FPREG_TO_UCONTEXT(uc, freg)				\
132 do {									\
133 	(uc)->uc_mcontext.__fpu.__fpregs.__fp_fpsr = (freg)->fpr_fpsr;	\
134 	memcpy((uc)->uc_mcontext.__fpu.__fpregs.__fp_fr, (freg)->fpr,	\
135 	    sizeof((uc)->uc_mcontext.__fpu.__fpregs.__fp_fr));		\
136 } while (/*CONSTCOND*/0)
137 
138 #endif /* _LIB_PTHREAD_ARM_MD_H */
139