xref: /netbsd-src/lib/libc/arch/arm/gen/setjmp.S (revision 7788a0781fe6ff2cce37368b4578a7ade0850cb1)
1/*	$NetBSD: setjmp.S,v 1.14 2013/04/19 13:45:45 matt Exp $	*/
2
3/*
4 * Copyright (c) 1997 Mark Brinicombe
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *	This product includes software developed by Mark Brinicombe
18 * 4. Neither the name of the University nor the names of its contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35#if !defined(__SOFTFP__) && !defined(__VFP_FP__) && !defined(__ARM_PCS)
36#error FPA is not supported anymore
37#endif
38
39#ifdef __ARM_EABI__
40	.fpu	vfp
41#endif
42
43#include <machine/asm.h>
44#include <machine/setjmp.h>
45
46/*
47 * C library -- setjmp, longjmp
48 *
49 *	longjmp(a,v)
50 * will generate a "return(v)" from the last call to
51 *	setjmp(a)
52 * by restoring registers from the stack.
53 * The previous signal state is restored.
54 */
55
56ENTRY(__setjmp14)
57	/* Get the signal mask. */
58	stmfd	sp!, {r0-r2, r14}
59	add	r2, r0, #(_JB_SIGMASK * 4)
60	mov	r1, #0x00000000
61	mov	r0, #0x00000000
62	bl	PIC_SYM(_C_LABEL(__sigprocmask14), PLT)
63	ldmfd	sp!, {r0-r2, r14}
64
65	ldr	r1, .Lsetjmp_magic
66
67#ifdef __ARM_EABI__
68	ldr	r2, .Lfpu_present
69#ifdef PIC
70	GOT_INIT(r3, .Lsetjmp_got, .Lsetjmp_gotinit)
71	ldr	r2, [r2, r3]
72#else
73	ldr	r2, [r2]
74#endif
75	teq	r2, #0		/* do we have a FPU? */
76	beq	1f		/*   no, don't save VFP registers */
77
78	orr	r1, r1, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP)
79				/* change magic to VFP magic */
80	add	r2, r0, #(_JB_REG_D8 * 4)
81	vstmia	r2, {d8-d15}
82	vmrs	r2, fpscr
83	str	r2, [r0, #(_JB_REG_FPSCR * 4)]
841:
85#endif /* __ARM_EABI__ */
86
87	str	r1, [r0]		/* store magic */
88
89	/* Store integer registers */
90	add	r0, r0, #(_JB_REG_R4 * 4)
91        stmia	r0, {r4-r14}
92        mov	r0, #0x00000000
93        RET
94
95.Lsetjmp_magic:
96	.word	_JB_MAGIC_SETJMP
97#ifdef __ARM_EABI__
98	GOT_INITSYM(.Lsetjmp_got, .Lsetjmp_gotinit)
99.Lfpu_present:
100	.word	PIC_SYM(_libc_arm_fpu_present, GOTOFF)
101#endif /* __ARM_EABI__ */
102
103ENTRY(__longjmp14)
104	ldr	r2, [r0]
105	ldr	ip, .Lsetjmp_magic
106	bic	r3, r2, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP)
107	teq	r3, ip
108	bne	.Lbotch
109
110	/* Restore the signal mask. */
111	stmfd	sp!, {r0-r2, r14}
112	mov	r2, #0x00000000
113	add	r1, r0, #(_JB_SIGMASK * 4)
114	mov	r0, #3				/* SIG_SETMASK */
115	bl	PIC_SYM(_C_LABEL(__sigprocmask14), PLT)
116	ldmfd	sp!, {r0-r2, r14}
117
118#ifdef __ARM_EABI__
119	tst	r2, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP)
120						/* is this a VFP magic? */
121	beq	1f				/*   no, don't restore VFP */
122	add	ip, r0, #(_JB_REG_D8 * 4)
123	vldmia	ip, {d8-d15}
124	ldr	ip, [r0, #(_JB_REG_FPSCR * 4)]
125	vmsr	fpscr, ip
1261:
127#endif /* __ARM_EABI__ */
128
129	add	r0, r0, #(_JB_REG_R4 * 4)
130	/* Restore integer registers */
131        ldmia	r0, {r4-r14}
132
133	/* Validate sp and r14 */
134	teq	sp, #0
135	teqne	r14, #0
136	beq	.Lbotch
137
138	/* Set return value */
139	movs	r0, r1
140	moveq	r0, #0x00000001
141	RET
142
143	/* validation failed, die die die. */
144.Lbotch:
145	bl	PIC_SYM(_C_LABEL(longjmperror), PLT)
146	bl	PIC_SYM(_C_LABEL(abort), PLT)
147	b	. - 8		/* Cannot get here */
148