1# $NetBSD: Makefile,v 1.4 2022/09/29 18:58:04 rjs Exp $ 2 3# Link the mesa_dri_drivers mega driver. 4 5# XXX: anonymous structs inside anonymous unions don't work. 6NOLINT=yes 7 8.include <bsd.own.mk> 9 10.include "../mesa-which.mk" 11 12.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" || \ 13 ${MACHINE} == "evbarm" 14 15LIBISMODULE= yes 16LIBISCXX= yes 17 18SHLIB_MAJOR= 0 19 20LIB= mesa_dri_drivers 21DRIDIR= ${X11USRLIBDIR}/modules/dri 22DRIDEBUGDIR= ${DEBUGDIR}${X11USRLIBDIR}/modules/dri 23 24LDFLAGS+= -Wl,--build-id=sha1 25 26# -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/${MODULE}/server \ 27 28CPPFLAGS+= \ 29 -I${X11SRCDIR.Mesa}/src/egl/main \ 30 -I${X11SRCDIR.Mesa}/src/egl/drivers/dri \ 31 -I${X11SRCDIR.Mesa}/../src/mesa/drivers/dri/common \ 32 -I${DESTDIR}${X11INCDIR}/libdrm \ 33 -I${X11SRCDIR.Mesa}/../src/util 34 35.if ${MACHINE_ARCH} == "i386" 36CPPFLAGS.brw_disk_cache.c+= -march=i586 37.endif 38 39#CPPFLAGS+= -D_NETBSD_SOURCE -DPTHREADS 40 41# We don't actually build this on non-x86/non-evbarm at all, currently. 42# The following if statements are not effective since we only 43# get here for x86 and evbarm 44.if ${MACHINE_ARCH} == "alpha" 45DRIVERS= r200 radeon 46.elif ${MACHINE} == "macppc" || ${MACHINE} == "ofppc" 47DRIVERS= r200 radeon 48.elif ${MACHINE_ARCH} == "sparc64" || ${MACHINE_ARCH} == "sparc" 49DRIVERS= r200 radeon 50.elif ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" 51DRIVERS= i915 i965 r200 radeon 52.elif ${MACHINE} == "prep" || ${MACHINE} == "bebox" 53DRIVERS= r200 radeon 54.elif ${MACHINE} == "evbarm" 55DRIVERS= r200 radeon 56.endif 57 58DRI_SUBDIRS= ${DRIVERS} 59 60DRI_SOURCES.i915+= \ 61 i830_context.c \ 62 i830_state.c \ 63 i830_texblend.c \ 64 i830_texstate.c \ 65 i830_vtbl.c \ 66 i915_context.c \ 67 i915_debug_fp.c \ 68 i915_fragprog.c \ 69 i915_program.c \ 70 i915_state.c \ 71 i915_texstate.c \ 72 i915_vtbl.c \ 73 i915_tex_layout.c 74 75I915_INTEL_FILES = \ 76 intel_batchbuffer.c \ 77 intel_blit.c \ 78 intel_buffer_objects.c \ 79 intel_buffers.c \ 80 intel_clear.c \ 81 intel_context.c \ 82 intel_extensions.c \ 83 intel_fbo.c \ 84 intel_mipmap_tree.c \ 85 intel_pixel.c \ 86 intel_pixel_bitmap.c \ 87 intel_pixel_copy.c \ 88 intel_pixel_draw.c \ 89 intel_pixel_read.c \ 90 intel_regions.c \ 91 intel_render.c \ 92 intel_screen.c \ 93 intel_state.c \ 94 intel_syncobj.c \ 95 intel_tex.c \ 96 intel_tex_copy.c \ 97 intel_tex_image.c \ 98 intel_tex_layout.c \ 99 intel_tex_subimage.c \ 100 intel_tex_validate.c \ 101 intel_tris.c 102 103.for _f in ${I915_INTEL_FILES} 104BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i915/${_f} i915_${_f} 105DRI_SOURCES.i915+= i915_${_f} 106CPPFLAGS.i915_${_f}+= -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i915 107.endfor 108 109.PATH: ${X11SRCDIR.Mesa}/src/intel/blorp 110.PATH: ${X11SRCDIR.Mesa}/src/intel/common 111.PATH: ${X11SRCDIR.Mesa}/src/intel/compiler 112.PATH: ${X11SRCDIR.Mesa}/src/intel/dev 113.PATH: ${X11SRCDIR.Mesa}/src/intel/isl 114.PATH: ${X11SRCDIR.Mesa}/src/intel/perf 115.PATH: ${X11SRCDIR.Mesa}/../src/intel/ 116.PATH: ${X11SRCDIR.Mesa}/../src/intel/perf 117 118DRI_SOURCES.i965+= \ 119 blorp.c \ 120 blorp_blit.c \ 121 blorp_clear.c \ 122 gen_batch_decoder.c \ 123 gen_debug.c \ 124 gen_decoder.c \ 125 gen_device_info.c \ 126 gen_disasm.c \ 127 gen_l3_config.c \ 128 gen_perf.c \ 129 gen_perf_mdapi.c \ 130 gen_perf_metrics.c \ 131 gen_urb_config.c \ 132 intel_log.c \ 133 brw_binding_tables.c \ 134 brw_blorp.c \ 135 brw_bufmgr.c \ 136 brw_cfg.cpp \ 137 brw_clear.c \ 138 brw_clip.c \ 139 brw_clip_line.c \ 140 brw_clip_point.c \ 141 brw_clip_tri.c \ 142 brw_clip_unfilled.c \ 143 brw_clip_util.c \ 144 brw_compile_clip.c \ 145 brw_compile_sf.c \ 146 brw_compiler.c \ 147 brw_compute.c \ 148 brw_conditional_render.c \ 149 brw_context.c \ 150 brw_cs.c \ 151 brw_curbe.c \ 152 brw_dead_control_flow.cpp \ 153 brw_debug_recompile.c \ 154 brw_disasm.c \ 155 brw_disasm_info.c \ 156 brw_disk_cache.c \ 157 brw_draw.c \ 158 brw_draw_upload.c \ 159 brw_eu.c \ 160 brw_eu_compact.c \ 161 brw_eu_emit.c \ 162 brw_eu_util.c \ 163 brw_eu_validate.c \ 164 brw_ff_gs.c \ 165 brw_ff_gs_emit.c \ 166 brw_formatquery.c \ 167 brw_fs.cpp \ 168 brw_fs_bank_conflicts.cpp \ 169 brw_fs_cmod_propagation.cpp \ 170 brw_fs_combine_constants.cpp \ 171 brw_fs_copy_propagation.cpp \ 172 brw_fs_cse.cpp \ 173 brw_fs_dead_code_eliminate.cpp \ 174 brw_fs_generator.cpp \ 175 brw_fs_live_variables.cpp \ 176 brw_fs_lower_pack.cpp \ 177 brw_fs_lower_regioning.cpp \ 178 brw_fs_nir.cpp \ 179 brw_fs_reg_allocate.cpp \ 180 brw_fs_register_coalesce.cpp \ 181 brw_fs_saturate_propagation.cpp \ 182 brw_fs_sel_peephole.cpp \ 183 brw_fs_validate.cpp \ 184 brw_fs_visitor.cpp \ 185 brw_generate_mipmap.c \ 186 brw_gs.c \ 187 brw_gs_surface_state.c \ 188 brw_interpolation_map.c \ 189 brw_link.cpp \ 190 brw_meta_util.c \ 191 brw_misc_state.c \ 192 brw_nir.c \ 193 brw_nir_analyze_boolean_resolves.c \ 194 brw_nir_analyze_ubo_ranges.c \ 195 brw_nir_attribute_workarounds.c \ 196 brw_nir_lower_conversions.c \ 197 brw_nir_lower_cs_intrinsics.c \ 198 brw_nir_lower_image_load_store.c \ 199 brw_nir_lower_mem_access_bit_sizes.c \ 200 brw_nir_opt_peephole_ffma.c \ 201 brw_nir_tcs_workarounds.c \ 202 brw_nir_trig_workarounds.c \ 203 brw_nir_uniforms.cpp \ 204 brw_object_purgeable.c \ 205 brw_packed_float.c \ 206 brw_performance_query.c \ 207 brw_performance_query_mdapi.c \ 208 brw_pipe_control.c \ 209 brw_predicated_break.cpp \ 210 brw_primitive_restart.c \ 211 brw_program.c \ 212 brw_program_binary.c \ 213 brw_program_cache.c \ 214 brw_queryobj.c \ 215 brw_reg_type.c \ 216 brw_reset.c \ 217 brw_schedule_instructions.cpp \ 218 brw_sf.c \ 219 brw_shader.cpp \ 220 brw_state_upload.c \ 221 brw_surface_formats.c \ 222 brw_sync.c \ 223 brw_tcs.c \ 224 brw_tcs_surface_state.c \ 225 brw_tes.c \ 226 brw_tes_surface_state.c \ 227 brw_urb.c \ 228 brw_util.c \ 229 brw_vec4.cpp \ 230 brw_vec4_cmod_propagation.cpp \ 231 brw_vec4_copy_propagation.cpp \ 232 brw_vec4_cse.cpp \ 233 brw_vec4_dead_code_eliminate.cpp \ 234 brw_vec4_generator.cpp \ 235 brw_vec4_gs_nir.cpp \ 236 brw_vec4_gs_visitor.cpp \ 237 brw_vec4_live_variables.cpp \ 238 brw_vec4_nir.cpp \ 239 brw_vec4_reg_allocate.cpp \ 240 brw_vec4_surface_builder.cpp \ 241 brw_vec4_tcs.cpp \ 242 brw_vec4_tes.cpp \ 243 brw_vec4_visitor.cpp \ 244 brw_vec4_vs_visitor.cpp \ 245 brw_vs.c \ 246 brw_vs_surface_state.c \ 247 brw_vue_map.c \ 248 brw_wm.c \ 249 brw_wm_iz.cpp \ 250 brw_wm_surface_state.c \ 251 gen6_clip_state.c \ 252 gen6_constant_state.c \ 253 gen6_gs_visitor.cpp \ 254 gen6_multisample_state.c \ 255 gen6_queryobj.c \ 256 gen6_sampler_state.c \ 257 gen6_sol.c \ 258 gen6_urb.c \ 259 gen7_l3_state.c \ 260 gen7_sol_state.c \ 261 gen7_urb.c \ 262 gen8_depth_state.c \ 263 gen8_multisample_state.c \ 264 hsw_queryobj.c \ 265 hsw_sol.c \ 266 isl.c \ 267 isl_drm.c \ 268 isl_format.c \ 269 isl_format_layout.c \ 270 isl_gen4.c \ 271 isl_gen6.c \ 272 isl_gen7.c \ 273 isl_gen8.c \ 274 isl_gen9.c \ 275 isl_storage_image.c \ 276 isl_tiled_memcpy.c \ 277 isl_tiled_memcpy_normal.c \ 278 isl_tiled_memcpy_sse41.c 279 280I965_INTEL_FILES = \ 281 intel_batchbuffer.c \ 282 intel_blit.c \ 283 intel_buffer_objects.c \ 284 intel_buffers.c \ 285 intel_copy_image.c \ 286 intel_extensions.c \ 287 intel_fbo.c \ 288 intel_mipmap_tree.c \ 289 intel_pixel.c \ 290 intel_pixel_bitmap.c \ 291 intel_pixel_copy.c \ 292 intel_pixel_draw.c \ 293 intel_pixel_read.c \ 294 intel_screen.c \ 295 intel_state.c \ 296 intel_tex.c \ 297 intel_tex_copy.c \ 298 intel_tex_image.c \ 299 intel_tex_validate.c \ 300 intel_upload.c 301 302 303INTEL_GENS_BLORP= 40 45 50 60 70 75 80 90 100 110 304 305.for _gen in ${INTEL_GENS_BLORP} 306BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/genX_state_upload.c ${_gen}_state_upload.c 307BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/genX_blorp_exec.c ${_gen}_blorp_exec.c 308BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/genX_pipe_control.c ${_gen}_pipe_control.c 309DRI_SOURCES.i965+= ${_gen}_state_upload.c ${_gen}_blorp_exec.c ${_gen}_pipe_control.c 310 311CPPFLAGS.${_gen}_state_upload.c+= -DGEN_VERSIONx10=${_gen} 312CPPFLAGS.${_gen}_blorp_exec.c+= -DGEN_VERSIONx10=${_gen} 313CPPFLAGS.${_gen}_pipe_control.c+= -DGEN_VERSIONx10=${_gen} 314.endfor 315 316INTEL_GENS_ISL= 40 50 60 70 75 80 90 100 110 317 318.for _gen in ${INTEL_GENS_ISL} 319BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/intel/isl/isl_emit_depth_stencil.c ${_gen}_isl_emit_depth_stencil.c 320BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/intel/isl/isl_surface_state.c ${_gen}_isl_surface_state.c 321DRI_SOURCES.i965+= ${_gen}_isl_emit_depth_stencil.c ${_gen}_isl_surface_state.c 322 323CPPFLAGS.${_gen}_isl_emit_depth_stencil.c+= -DGEN_VERSIONx10=${_gen} -I${X11SRCDIR.Mesa}/src/intel/isl/ 324CPPFLAGS.${_gen}_isl_surface_state.c+= -DGEN_VERSIONx10=${_gen} -I${X11SRCDIR.Mesa}/src/intel/isl/ 325.endfor 326 327.for _f in ${I965_INTEL_FILES} 328BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/${_f} i965_${_f} 329DRI_SOURCES.i965+= i965_${_f} 330.endfor 331 332.for _f in ${DRI_SOURCES.i965} 333CPPFLAGS.${_f} += -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965 \ 334 -I${X11SRCDIR.Mesa}/src/intel \ 335 -I${X11SRCDIR.Mesa}/src/intel/compiler \ 336 -I${X11SRCDIR.Mesa}/../src/intel \ 337 -I${X11SRCDIR.Mesa}/src/compiler/nir \ 338 -I${X11SRCDIR.Mesa}/../src/compiler/nir 339.endfor 340 341# Needs mfence 342CPPFLAGS.brw_bufmgr.c+= -msse2 343 344DRI_SOURCES.r200 = \ 345 r200_context.c \ 346 r200_ioctl.c \ 347 r200_state.c \ 348 r200_state_init.c \ 349 r200_cmdbuf.c \ 350 r200_tex.c \ 351 r200_texstate.c \ 352 r200_tcl.c \ 353 r200_swtcl.c \ 354 r200_maos.c \ 355 r200_sanity.c \ 356 r200_fragshader.c \ 357 r200_vertprog.c \ 358 r200_blit.c 359 360R200_RADEON_FILES= \ 361 radeon_buffer_objects.c \ 362 radeon_common_context.c \ 363 radeon_common.c \ 364 radeon_dma.c \ 365 radeon_debug.c \ 366 radeon_fbo.c \ 367 radeon_fog.c \ 368 radeon_mipmap_tree.c \ 369 radeon_pixel_read.c \ 370 radeon_queryobj.c \ 371 radeon_span.c \ 372 radeon_texture.c \ 373 radeon_tex_copy.c \ 374 radeon_tile.c \ 375 radeon_screen.c 376 377.for _f in ${R200_RADEON_FILES} 378BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon/${_f} r200_${_f} 379DRI_SOURCES.r200+= r200_${_f} 380.endfor 381 382.for _f in ${DRI_SOURCES.r200} 383CPPFLAGS.${_f} += -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/r200/server \ 384 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/r200 \ 385 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon/server \ 386 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon \ 387 -DRADEON_R200 388.endfor 389 390DRI_SOURCES.radeon = \ 391 radeon_buffer_objects.c \ 392 radeon_common_context.c \ 393 radeon_common.c \ 394 radeon_dma.c \ 395 radeon_debug.c \ 396 radeon_fbo.c \ 397 radeon_fog.c \ 398 radeon_mipmap_tree.c \ 399 radeon_pixel_read.c \ 400 radeon_queryobj.c \ 401 radeon_span.c \ 402 radeon_texture.c \ 403 radeon_tex_copy.c \ 404 radeon_tile.c \ 405 radeon_context.c \ 406 radeon_ioctl.c \ 407 radeon_screen.c \ 408 radeon_state.c \ 409 radeon_state_init.c \ 410 radeon_tex.c \ 411 radeon_texstate.c \ 412 radeon_tcl.c \ 413 radeon_swtcl.c \ 414 radeon_maos.c \ 415 radeon_sanity.c \ 416 radeon_blit.c 417 418.for _f in ${DRI_SOURCES.radeon} 419CPPFLAGS.${_f} += -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon/server \ 420 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon \ 421 -DRADEON_R100 422.endfor 423 424.for _d in ${DRI_SUBDIRS} 425SRCS+= ${DRI_SOURCES.${_d}} 426.PATH: ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/${_d} 427.endfor 428 429 430LIBDPLIBS+= expat ${NETBSDSRCDIR}/external/mit/expat/lib/libexpat 431LIBDPLIBS+= m ${NETBSDSRCDIR}/lib/libm 432LIBDPLIBS+= pthread ${NETBSDSRCDIR}/lib/libpthread 433LIBDPLIBS+= glapi ${.CURDIR}/../libglapi${OLD_SUFFIX} 434LIBDPLIBS+= drm ${.CURDIR}/../libdrm 435.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" 436LIBDPLIBS+= drm_intel ${.CURDIR}/../libdrm_intel 437.endif 438LIBDPLIBS+= drm_radeon ${.CURDIR}/../libdrm_radeon 439 440MESA_SRC_MODULES= main math math_xform vbo tnl swrast ss common asm_c program asm_s 441.include "../libmesa.old.mk" 442.include "../libglsl.old.mk" 443 444.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" 445SRCS+= streaming-load-memcpy.c 446CPPFLAGS.streaming-load-memcpy.c+= -msse4.1 447CPPFLAGS.isl_tiled_memcpy_sse41.c+= -msse4.1 448.endif 449 450CFLAGS+= ${${ACTIVE_CC} == "clang":? -Wno-error=atomic-alignment :} 451 452.include "../driver.mk" 453 454.for _d in ${DRIVERS} 455SYMLINKS+= mesa_dri_drivers.so.${SHLIB_MAJOR} ${DRIDIR}/${_d}_dri.so.${SHLIB_MAJOR} 456SYMLINKS+= ${_d}_dri.so.${SHLIB_MAJOR} ${DRIDIR}/${_d}_dri.so 457.if ${MKDEBUG} != "no" 458SYMLINKS+= mesa_dri_drivers.so.${SHLIB_MAJOR}.debug ${DRIDEBUGDIR}/${_d}_dri.so.${SHLIB_MAJOR}.debug 459.endif 460.endfor 461 462.endif 463 464PKGCONFIG= dri 465PKGDIST.dri= ${X11SRCDIR.Mesa}/../src/pkgconfig 466.include "${.CURDIR}/../libGL/mesa-ver.mk" 467PKGCONFIG_VERSION.dri= ${MESA_VER} 468 469# XXX remove these from bsd.x11.mk 470PKGCONFIG_SED_FLAGS= \ 471 -e "s,@DRI_DRIVER_INSTALL_DIR@,${X11USRLIBDIR}/modules/dri,; \ 472 s,@DRI_PC_REQ_PRIV@,," 473 474.PATH: ${X11SRCDIR.Mesa}/src/util 475 476FILESDIR= /etc 477BUILDSYMLINKS+= 00-mesa-defaults.conf drirc 478FILES= drirc 479 480.PATH: ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/common 481 482.include <bsd.x11.mk> 483.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" || \ 484 ${MACHINE} == "evbarm" 485LIBDIR= ${X11USRLIBDIR}/modules/dri 486 487CWARNFLAGS.clang+= -Wno-error=initializer-overrides -Wno-error=switch \ 488 -Wno-error=tautological-constant-out-of-range-compare \ 489 -Wno-error=enum-conversion \ 490 -Wno-error=implicit-int-float-conversion \ 491 -Wno-error=tautological-constant-compare \ 492 -Wno-c99-designator -Wno-xor-used-as-pow 493 494COPTS+= -Wno-error=stack-protector 495 496COPTS.u_atomic.c+= ${${ACTIVE_CC} == "gcc" && ${HAVE_GCC:U0} >= 10:? -Wno-builtin-declaration-mismatch :} 497 498COPTS.brw_eu_compact.c+= -Wno-error=stack-protector 499COPTS.brw_fs_copy_propagation.cpp+= -Wno-error=stack-protector 500COPTS.brw_fs.cpp+= -Wno-error=stack-protector 501COPTS.brw_fs_reg_allocate.cpp+= -Wno-error=stack-protector 502 503.include <bsd.lib.mk> 504.else 505.include <bsd.inc.mk> 506.endif 507# Don't re-build .c files when .y files change 508.y.c: 509