1dnl PowerPC-64/mode32 mpn_add_n -- Add two limb vectors of the same length > 0 2dnl and store sum in a third limb vector. 3 4dnl Copyright 1999, 2000, 2001, 2003, 2005 Free Software Foundation, Inc. 5 6dnl This file is part of the GNU MP Library. 7 8dnl The GNU MP Library is free software; you can redistribute it and/or modify 9dnl it under the terms of the GNU Lesser General Public License as published 10dnl by the Free Software Foundation; either version 3 of the License, or (at 11dnl your option) any later version. 12 13dnl The GNU MP Library is distributed in the hope that it will be useful, but 14dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public 16dnl License for more details. 17 18dnl You should have received a copy of the GNU Lesser General Public License 19dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. 20 21include(`../config.m4') 22 23C cycles/limb 24C POWER3/PPC630: ? 25C POWER4/PPC970: 4.25 26 27C INPUT PARAMETERS 28C rp r3 29C up r4 30C vp r5 31C n r6 32 33ASM_START() 34PROLOGUE(mpn_add_n) 35 mtctr r6 C copy size into CTR 36 addic r0, r0, 0 C clear cy 37 ld r8, 0(r4) C load least significant s1 limb 38 ld r0, 0(r5) C load least significant s2 limb 39 addi r3, r3, -8 C offset res_ptr, it's updated before it's used 40 bdz L(end) C If done, skip loop 41 42L(oop): ld r9, 8(r4) C load s1 limb 43 ld r10, 8(r5) C load s2 limb 44 adde r7, r0, r8 C add limbs with cy, set cy 45 srdi r6, r0, 32 46 srdi r11, r8, 32 47 adde r6, r6, r11 C add high limb parts, set cy 48 std r7, 8(r3) C store result limb 49 bdz L(exit) C decrement CTR and exit if done 50 ldu r8, 16(r4) C load s1 limb and update s1_ptr 51 ldu r0, 16(r5) C load s2 limb and update s2_ptr 52 adde r7, r10, r9 C add limbs with cy, set cy 53 srdi r6, r10, 32 54 srdi r11, r9, 32 55 adde r6, r6, r11 C add high limb parts, set cy 56 stdu r7, 16(r3) C store result limb and update res_ptr 57 bdnz L(oop) C decrement CTR and loop back 58 59L(end): adde r7, r0, r8 60 srdi r6, r0, 32 61 srdi r11, r8, 32 62 adde r6, r6, r11 C add limbs with cy, set cy 63 std r7, 8(r3) C store ultimate result limb 64 li r3, 0 C load cy into ... 65 addze r4, r3 C ... return value register 66 blr 67L(exit): adde r7, r10, r9 68 srdi r6, r10, 32 69 srdi r11, r9, 32 70 adde r6, r6, r11 C add limbs with cy, set cy 71 std r7, 16(r3) 72 li r3, 0 C load cy into ... 73 addze r4, r3 C ... return value register 74 blr 75EPILOGUE() 76