1*4b169a6bSchristos# Blackfin testcase for HW Loops and user->super transitions 2*4b169a6bSchristos# mach: bfin 3*4b169a6bSchristos# sim: --environment operating 4*4b169a6bSchristos 5*4b169a6bSchristos#include "test.h" 6*4b169a6bSchristos .include "testutils.inc" 7*4b169a6bSchristos 8*4b169a6bSchristos .macro check_hwloop_regs lc:req, lt:req, lb:req 9*4b169a6bSchristos R0 = LC0; 10*4b169a6bSchristos CC = R0 == \lc; 11*4b169a6bSchristos IF !CC JUMP fail; 12*4b169a6bSchristos 13*4b169a6bSchristos R0 = LT0; 14*4b169a6bSchristos CC = R0 == \lt; 15*4b169a6bSchristos IF !CC JUMP fail; 16*4b169a6bSchristos 17*4b169a6bSchristos R0 = LB0; 18*4b169a6bSchristos CC = R0 == \lb; 19*4b169a6bSchristos IF !CC JUMP fail; 20*4b169a6bSchristos 21*4b169a6bSchristos R0 = LC1; 22*4b169a6bSchristos CC = R0 == \lc; 23*4b169a6bSchristos IF !CC JUMP fail; 24*4b169a6bSchristos 25*4b169a6bSchristos R0 = LT1; 26*4b169a6bSchristos CC = R0 == \lt; 27*4b169a6bSchristos IF !CC JUMP fail; 28*4b169a6bSchristos 29*4b169a6bSchristos R0 = LB1; 30*4b169a6bSchristos CC = R0 == \lb; 31*4b169a6bSchristos IF !CC JUMP fail; 32*4b169a6bSchristos .endm 33*4b169a6bSchristos 34*4b169a6bSchristos start 35*4b169a6bSchristos 36*4b169a6bSchristos imm32 P0, EVT3; 37*4b169a6bSchristos loadsym R0, exception; 38*4b169a6bSchristos [P0] = R0; 39*4b169a6bSchristos 40*4b169a6bSchristos imm32 P0, EVT2; 41*4b169a6bSchristos loadsym R0, nmi; 42*4b169a6bSchristos [P0] = R0; 43*4b169a6bSchristos 44*4b169a6bSchristos loadsym R0, usermode; 45*4b169a6bSchristos RETI = R0; 46*4b169a6bSchristos 47*4b169a6bSchristos # Set the LC/LB/LT up with LSB set 48*4b169a6bSchristos # - Hardware clears LT LSB, but LB remains until we lower 49*4b169a6bSchristos imm32 R6, 0xaaaa5555 50*4b169a6bSchristos R4 = R6; 51*4b169a6bSchristos BITCLR (R4, 0); 52*4b169a6bSchristos imm32 R7, 0xaa55aa55 53*4b169a6bSchristos R5 = R7; 54*4b169a6bSchristos BITCLR (R5, 0); 55*4b169a6bSchristos 56*4b169a6bSchristos LC0 = R6; 57*4b169a6bSchristos LT0 = R6; 58*4b169a6bSchristos LB0 = R7; 59*4b169a6bSchristos LC1 = R6; 60*4b169a6bSchristos LT1 = R6; 61*4b169a6bSchristos LB1 = R7; 62*4b169a6bSchristos 63*4b169a6bSchristos # Sanity check 64*4b169a6bSchristos check_hwloop_regs R6, R4, R7 65*4b169a6bSchristos 66*4b169a6bSchristos RTI; 67*4b169a6bSchristos 68*4b169a6bSchristosusermode: 69*4b169a6bSchristos # Make sure LSB has been cleared in LB 70*4b169a6bSchristos check_hwloop_regs R6, R4, R5 71*4b169a6bSchristos 72*4b169a6bSchristos # Clear LSB in all LC/LT/LB 73*4b169a6bSchristos LC0 = R4; 74*4b169a6bSchristos LT0 = R4; 75*4b169a6bSchristos LB0 = R5; 76*4b169a6bSchristos LC1 = R4; 77*4b169a6bSchristos LT1 = R4; 78*4b169a6bSchristos LB1 = R5; 79*4b169a6bSchristos 80*4b169a6bSchristos # Now move back up to supervisor 81*4b169a6bSchristos EXCPT 4; 82*4b169a6bSchristos 83*4b169a6bSchristosexception: 84*4b169a6bSchristos # Make sure LSB is set in LB 85*4b169a6bSchristos check_hwloop_regs R4, R4, R7 86*4b169a6bSchristos 87*4b169a6bSchristos # Clear the LSB and move up another supervisor level 88*4b169a6bSchristos LC0 = R4; 89*4b169a6bSchristos LT0 = R4; 90*4b169a6bSchristos LB0 = R5; 91*4b169a6bSchristos LC1 = R4; 92*4b169a6bSchristos LT1 = R4; 93*4b169a6bSchristos LB1 = R5; 94*4b169a6bSchristos 95*4b169a6bSchristos RAISE 2; 96*4b169a6bSchristos 97*4b169a6bSchristosnmi: 98*4b169a6bSchristos # Make sure LSB stayed clear 99*4b169a6bSchristos check_hwloop_regs R4, R4, R5 100*4b169a6bSchristos 101*4b169a6bSchristos dbg_pass 102*4b169a6bSchristos 103*4b169a6bSchristosfail: 104*4b169a6bSchristos dbg_fail 105