1//Original:/testcases/core/c_dsp32shift_align8/c_dsp32shift_align8.dsp 2// Spec Reference: dsp32shift align8 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8imm32 r0, 0x00000001; 9imm32 r1, 0x01000801; 10imm32 r2, 0x08200802; 11imm32 r3, 0x08030803; 12imm32 r4, 0x08004804; 13imm32 r5, 0x08000505; 14imm32 r6, 0x08000866; 15imm32 r7, 0x08000807; 16R1 = ALIGN8 ( R1 , R0 ); 17R2 = ALIGN8 ( R2 , R0 ); 18R3 = ALIGN8 ( R3 , R0 ); 19R4 = ALIGN8 ( R4 , R0 ); 20R5 = ALIGN8 ( R5 , R0 ); 21R6 = ALIGN8 ( R6 , R0 ); 22R7 = ALIGN8 ( R7 , R0 ); 23R0 = ALIGN8 ( R0 , R0 ); 24CHECKREG r0, 0x01000000; 25CHECKREG r1, 0x01000000; 26CHECKREG r2, 0x02000000; 27CHECKREG r3, 0x03000000; 28CHECKREG r4, 0x04000000; 29CHECKREG r5, 0x05000000; 30CHECKREG r6, 0x66000000; 31CHECKREG r7, 0x07000000; 32 33imm32 r0, 0x0900d001; 34imm32 r1, 0x09000002; 35imm32 r2, 0x09400002; 36imm32 r3, 0x09100003; 37imm32 r4, 0x09020004; 38imm32 r5, 0x09003005; 39imm32 r6, 0x09000406; 40imm32 r7, 0x09000057; 41R0 = ALIGN8 ( R0 , R1 ); 42R2 = ALIGN8 ( R2 , R1 ); 43R3 = ALIGN8 ( R3 , R1 ); 44R4 = ALIGN8 ( R4 , R1 ); 45R5 = ALIGN8 ( R5 , R1 ); 46R6 = ALIGN8 ( R6 , R1 ); 47R7 = ALIGN8 ( R7 , R1 ); 48R1 = ALIGN8 ( R1 , R1 ); 49CHECKREG r0, 0x01090000; 50CHECKREG r1, 0x02090000; 51CHECKREG r2, 0x02090000; 52CHECKREG r3, 0x03090000; 53CHECKREG r4, 0x04090000; 54CHECKREG r5, 0x05090000; 55CHECKREG r6, 0x06090000; 56CHECKREG r7, 0x57090000; 57 58 59imm32 r0, 0x0a00e001; 60imm32 r1, 0x0a00e001; 61imm32 r2, 0x0a00000f; 62imm32 r3, 0x0a400010; 63imm32 r4, 0x0a05e004; 64imm32 r5, 0x0a006005; 65imm32 r6, 0x0a00e706; 66imm32 r7, 0x0a00e087; 67R0 = ALIGN8 ( R0 , R2 ); 68R1 = ALIGN8 ( R1 , R2 ); 69R3 = ALIGN8 ( R3 , R2 ); 70R4 = ALIGN8 ( R4 , R2 ); 71R5 = ALIGN8 ( R5 , R2 ); 72R6 = ALIGN8 ( R6 , R2 ); 73R7 = ALIGN8 ( R7 , R2 ); 74R2 = ALIGN8 ( R2 , R2 ); 75CHECKREG r0, 0x010A0000; 76CHECKREG r1, 0x010A0000; 77CHECKREG r2, 0x0F0A0000; 78CHECKREG r3, 0x100A0000; 79CHECKREG r4, 0x040A0000; 80CHECKREG r5, 0x050A0000; 81CHECKREG r6, 0x060A0000; 82CHECKREG r7, 0x870A0000; 83 84imm32 r0, 0x2b00f001; 85imm32 r1, 0x0300f001; 86imm32 r2, 0x0b40f002; 87imm32 r3, 0x0b050010; 88imm32 r4, 0x0b006004; 89imm32 r5, 0x0b00f705; 90imm32 r6, 0x0b00f086; 91imm32 r7, 0x0b00f009; 92R0 = ALIGN8 ( R0 , R3 ); 93R1 = ALIGN8 ( R1 , R3 ); 94R2 = ALIGN8 ( R2 , R3 ); 95R4 = ALIGN8 ( R4 , R3 ); 96R5 = ALIGN8 ( R5 , R3 ); 97R6 = ALIGN8 ( R6 , R3 ); 98R7 = ALIGN8 ( R7 , R3 ); 99R3 = ALIGN8 ( R3 , R3 ); 100CHECKREG r0, 0x010B0500; 101CHECKREG r1, 0x010B0500; 102CHECKREG r2, 0x020B0500; 103CHECKREG r3, 0x100B0500; 104CHECKREG r4, 0x040B0500; 105CHECKREG r5, 0x050B0500; 106CHECKREG r6, 0x860B0500; 107CHECKREG r7, 0x090B0500; 108 109imm32 r0, 0x4c0000c0; 110imm32 r1, 0x050100c0; 111imm32 r2, 0x0c6200c0; 112imm32 r3, 0x0c0700c0; 113imm32 r4, 0x0c04800c; 114imm32 r5, 0x0c0509c0; 115imm32 r6, 0x0c060000; 116imm32 r7, 0x0c0700ca; 117R0 = ALIGN8 ( R0 , R4 ); 118R1 = ALIGN8 ( R1 , R4 ); 119R2 = ALIGN8 ( R2 , R4 ); 120R3 = ALIGN8 ( R3 , R4 ); 121R5 = ALIGN8 ( R5 , R4 ); 122R6 = ALIGN8 ( R6 , R4 ); 123R7 = ALIGN8 ( R7 , R4 ); 124R4 = ALIGN8 ( R4 , R4 ); 125CHECKREG r0, 0xC00C0480; 126CHECKREG r1, 0xC00C0480; 127CHECKREG r2, 0xC00C0480; 128CHECKREG r3, 0xC00C0480; 129CHECKREG r4, 0x0C0C0480; 130CHECKREG r5, 0xC00C0480; 131CHECKREG r6, 0x000C0480; 132CHECKREG r7, 0xCA0C0480; 133 134imm32 r0, 0xa00100d0; 135imm32 r1, 0xa00100d1; 136imm32 r2, 0xa00200d0; 137imm32 r3, 0xa00300d0; 138imm32 r4, 0xa00400d0; 139imm32 r5, 0xa0050007; 140imm32 r6, 0xa00600d0; 141imm32 r7, 0xa00700d0; 142R0 = ALIGN8 ( R0 , R5 ); 143R1 = ALIGN8 ( R1 , R5 ); 144R2 = ALIGN8 ( R2 , R5 ); 145R3 = ALIGN8 ( R3 , R5 ); 146R4 = ALIGN8 ( R4 , R5 ); 147R6 = ALIGN8 ( R6 , R5 ); 148R7 = ALIGN8 ( R7 , R5 ); 149R5 = ALIGN8 ( R5 , R5 ); 150CHECKREG r0, 0xD0A00500; 151CHECKREG r1, 0xD1A00500; 152CHECKREG r2, 0xD0A00500; 153CHECKREG r3, 0xD0A00500; 154CHECKREG r4, 0xD0A00500; 155CHECKREG r5, 0x07A00500; 156CHECKREG r6, 0xD0A00500; 157CHECKREG r7, 0xD0A00500; 158 159imm32 r0, 0xb2010000; 160imm32 r1, 0xb0310000; 161imm32 r2, 0xb042000f; 162imm32 r3, 0xbf030000; 163imm32 r4, 0xba040000; 164imm32 r5, 0xbb050000; 165imm32 r6, 0xbc060009; 166imm32 r7, 0xb0e70000; 167R0 = ALIGN8 ( R0 , R6 ); 168R1 = ALIGN8 ( R1 , R6 ); 169R2 = ALIGN8 ( R2 , R6 ); 170R3 = ALIGN8 ( R3 , R6 ); 171R4 = ALIGN8 ( R4 , R6 ); 172R5 = ALIGN8 ( R5 , R6 ); 173R6 = ALIGN8 ( R6 , R6 ); 174R7 = ALIGN8 ( R7 , R6 ); 175CHECKREG r0, 0x00BC0600; 176CHECKREG r1, 0x00BC0600; 177CHECKREG r2, 0x0FBC0600; 178CHECKREG r3, 0x00BC0600; 179CHECKREG r4, 0x00BC0600; 180CHECKREG r5, 0x00BC0600; 181CHECKREG r6, 0x09BC0600; 182CHECKREG r7, 0x0009BC06; 183 184imm32 r0, 0xd23100e0; 185imm32 r1, 0xd04500e0; 186imm32 r2, 0xde32f0e0; 187imm32 r3, 0xd90300e0; 188imm32 r4, 0xd07400e0; 189imm32 r5, 0xdef500e0; 190imm32 r6, 0xd06600e0; 191imm32 r7, 0xd0080023; 192R1 = ALIGN8 ( R0 , R7 ); 193R2 = ALIGN8 ( R1 , R7 ); 194R3 = ALIGN8 ( R2 , R7 ); 195R4 = ALIGN8 ( R3 , R7 ); 196R5 = ALIGN8 ( R4 , R7 ); 197R6 = ALIGN8 ( R5 , R7 ); 198R7 = ALIGN8 ( R6 , R7 ); 199R0 = ALIGN8 ( R7 , R7 ); 200CHECKREG r0, 0x0000D008; 201CHECKREG r1, 0xE0D00800; 202CHECKREG r2, 0x00D00800; 203CHECKREG r3, 0x00D00800; 204CHECKREG r4, 0x00D00800; 205CHECKREG r5, 0x00D00800; 206CHECKREG r6, 0x00D00800; 207CHECKREG r7, 0x00D00800; 208 209 210pass 211